From 33df3af7abe37ae748f7f897bded92c7fca4cd51 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Fri, 21 May 2021 12:15:07 +0000 Subject: [PATCH] Added polling on wait states setup. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14409 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- os/hal/ports/STM32/STM32G4xx/hal_lld.c | 3 +++ os/hal/ports/STM32/STM32L4xx+/hal_lld.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/os/hal/ports/STM32/STM32G4xx/hal_lld.c b/os/hal/ports/STM32/STM32G4xx/hal_lld.c index cea0ae14e..2ba3ded4c 100644 --- a/os/hal/ports/STM32/STM32G4xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32G4xx/hal_lld.c @@ -461,6 +461,9 @@ bool hal_lld_clock_raw_switch(const halclkcfg_t *ccp) { /* Resetting flash ACR settings to the default value.*/ FLASH->ACR = 0x00040600U; + while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) != 0U) { + /* Waiting for flash wait states setup.*/ + } /* Resetting all other clock sources and PLLs.*/ RCC->CRRCR = 0U; diff --git a/os/hal/ports/STM32/STM32L4xx+/hal_lld.c b/os/hal/ports/STM32/STM32L4xx+/hal_lld.c index a3412d366..b7855fc65 100644 --- a/os/hal/ports/STM32/STM32L4xx+/hal_lld.c +++ b/os/hal/ports/STM32/STM32L4xx+/hal_lld.c @@ -537,6 +537,9 @@ bool hal_lld_clock_raw_switch(const halclkcfg_t *ccp) { /* Resetting flash ACR settings to the default value.*/ FLASH->ACR = 0x00000600U; + while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) != 0U) { + /* Waiting for flash wait states setup.*/ + } /* Resetting all other clock sources and PLLs.*/ RCC->CRRCR = 0U;