Small improvements and new functions.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@16412 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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@ -567,29 +567,6 @@ void gpdmaChannelFree(const stm32_gpdma_channel_t *dmachp) {
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osalSysUnlock();
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}
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/**
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* @brief GPDMA channel suspend.
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* @note This function can be invoked in both ISR or thread context.
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* @pre The channel must have been allocated using @p dmaChannelAlloc().
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* @post After use the channel can be released using @p dmaChannelRelease().
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*
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* @param[in] dmachp pointer to a @p stm32_gpdma_channel_t structure
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*
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* @special
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*/
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void gpdmaChannelSuspend(const stm32_gpdma_channel_t *dmachp) {
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osalDbgAssert((dmachp->channel->CCR & STM32_GPDMA_CCR_EN) != 0U,
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"not enabled");
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dmachp->channel->CCR |= STM32_GPDMA_CCR_SUSP;
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while ((dmachp->channel->CSR & STM32_GPDMA_CSR_SUSPF) != 0U) {
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/* Wait completion.*/
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}
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dmachp->channel->CFCR = STM32_GPDMA_CFCR_SUSPF;
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}
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/**
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* @brief GPDMA channel disable.
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* @details The function disables the specified channel and then clears any
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@ -606,26 +583,15 @@ void gpdmaChannelSuspend(const stm32_gpdma_channel_t *dmachp) {
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*/
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void gpdmaChannelDisable(const stm32_gpdma_channel_t *dmachp) {
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/* Suspending channel, note, we don't know if it is still active at this
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point because the EN bit can be reset in HW.*/
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dmachp->channel->CCR |= STM32_GPDMA_CCR_SUSP;
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/* If the channel was actually active.*/
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if ((dmachp->channel->CCR & STM32_GPDMA_CCR_EN) != 0U) {
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/* Waiting for completion if suspend operation then resetting the
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completion flag.*/
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while ((dmachp->channel->CSR & STM32_GPDMA_CSR_SUSPF) != 0U) {
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/* Wait completion.*/
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}
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dmachp->channel->CFCR = STM32_GPDMA_CFCR_SUSPF;
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}
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/* Suspending the channel, it needs to be in idle.*/
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gpdmaChannelSuspend(dmachp);
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gpdmaChannelWaitIdle(dmachp);
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/* Now resetting the channel.*/
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dmachp->channel->CCR |= STM32_GPDMA_CCR_RESET;
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dmachp->channel->CCR = 0U;
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gpdmaChannelReset(dmachp);
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/* Clearing all interrupts.*/
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/* Resetting all sources and clearing interrupts.*/
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dmachp->channel->CCR = 0U;
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dmachp->channel->CFCR = STM32_GPDMA_CFCR_ALL;
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}
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@ -569,7 +569,6 @@ extern "C" {
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void *param);
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void gpdmaChannelFreeI(const stm32_gpdma_channel_t *dmachp);
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void gpdmaChannelFree(const stm32_gpdma_channel_t *dmachp);
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void gpdmaChannelSuspend(const stm32_gpdma_channel_t *dmachp);
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void gpdmaChannelDisable(const stm32_gpdma_channel_t *dmachp);
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void gpdmaServeInterrupt(const stm32_gpdma_channel_t *dmachp);
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#ifdef __cplusplus
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@ -616,6 +615,7 @@ void gpdmaChannelInit(const stm32_gpdma_channel_t *dmachp,
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/**
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* @brief Prepares a GPDMA channel for transfer.
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* @note This function can be invoked in both ISR or thread context.
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*
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* @param[in] dmachp pointer to a @p stm32_gpdma_channel_t structure
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* @param[in] tr1 CTR1 register initialization value
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@ -645,6 +645,7 @@ void gpdmaChannelSetupTransfer(const stm32_gpdma_channel_t *dmachp,
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/**
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* @brief Prepares a GPDMA channel for a 2D transfer.
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* @note The channel must have 2D capability.
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* @note This function can be invoked in both ISR or thread context.
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*
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* @param[in] dmachp pointer to a @p stm32_gpdma_channel_t structure
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* @param[in] tr1 CTR1 register initialization value
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@ -677,6 +678,7 @@ void gpdmaChannelSetupTransfer2D(const stm32_gpdma_channel_t *dmachp,
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/**
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* @brief Channel enable.
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* @note This function can be invoked in both ISR or thread context.
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*
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* @param[in] dmachp pointer to a @p stm32_gpdma_channel_t structure
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*
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@ -684,13 +686,57 @@ void gpdmaChannelSetupTransfer2D(const stm32_gpdma_channel_t *dmachp,
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*/
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__STATIC_FORCEINLINE
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void gpdmaChannelEnable(const stm32_gpdma_channel_t *dmachp) {
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DMA_Channel_TypeDef *chp = dmachp->channel;
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chp->CCR |= STM32_GPDMA_CCR_EN;
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dmachp->channel->CCR |= STM32_GPDMA_CCR_EN;
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}
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/**
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* @brief GPDMA channel reset.
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* @note This function can be invoked in both ISR or thread context.
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*
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* @param[in] dmachp pointer to a @p stm32_gpdma_channel_t structure
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*
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* @special
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*/
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__STATIC_FORCEINLINE
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void gpdmaChannelReset(const stm32_gpdma_channel_t *dmachp) {
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dmachp->channel->CCR |= STM32_GPDMA_CCR_RESET;
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}
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/**
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* @brief GPDMA channel suspend.
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* @note This function can be invoked in both ISR or thread context.
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*
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* @param[in] dmachp pointer to a @p stm32_gpdma_channel_t structure
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*
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* @special
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*/
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__STATIC_FORCEINLINE
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void gpdmaChannelSuspend(const stm32_gpdma_channel_t *dmachp) {
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dmachp->channel->CCR |= STM32_GPDMA_CCR_SUSP;
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}
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/**
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* @brief GPDMA channel wait for idle state.
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* @note This function can be invoked in both ISR or thread context.
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*
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* @param[in] dmachp pointer to a @p stm32_gpdma_channel_t structure
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*
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* @special
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*/
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__STATIC_FORCEINLINE
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void gpdmaChannelWaitIdle(const stm32_gpdma_channel_t *dmachp) {
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while ((dmachp->channel->CSR & STM32_GPDMA_CSR_IDLEF) == 0U) {
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/* Wait completion.*/
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}
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}
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/**
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* @brief Set channel source pointer.
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* @note This function can be invoked in both ISR or thread context.
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*
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* @param[in] dmachp pointer to a @p stm32_gpdma_channel_t structure
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* @param[in] s source pointer
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@ -700,13 +746,13 @@ void gpdmaChannelEnable(const stm32_gpdma_channel_t *dmachp) {
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__STATIC_FORCEINLINE
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void gpdmaChannelSetSource(const stm32_gpdma_channel_t *dmachp,
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volatile const void *s) {
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DMA_Channel_TypeDef *chp = dmachp->channel;
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chp->CSAR = (uint32_t)s;
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dmachp->channel->CSAR = (uint32_t)s;
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}
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/**
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* @brief Set channel destination pointer.
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* @note This function can be invoked in both ISR or thread context.
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*
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* @param[in] dmachp pointer to a @p stm32_gpdma_channel_t structure
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* @param[in] d destination pointer
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@ -716,13 +762,13 @@ void gpdmaChannelSetSource(const stm32_gpdma_channel_t *dmachp,
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__STATIC_FORCEINLINE
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void gpdmaChannelSetDestination(const stm32_gpdma_channel_t *dmachp,
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volatile const void *d) {
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DMA_Channel_TypeDef *chp = dmachp->channel;
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chp->CDAR = (uint32_t)d;
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dmachp->channel->CDAR = (uint32_t)d;
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}
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/**
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* @brief Set channel transfer modes and triggers.
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* @note This function can be invoked in both ISR or thread context.
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*
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* @param[in] dmachp pointer to a @p stm32_gpdma_channel_t structure
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* @param[in] tr1 CTR1 register initialization value
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@ -743,6 +789,7 @@ void gpdmaChannelSetMode(const stm32_gpdma_channel_t *dmachp,
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/**
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* @brief Set channel counters.
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* @note This function can be invoked in both ISR or thread context.
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*
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* @param[in] dmachp pointer to a @p stm32_gpdma_channel_t structure
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* @param[in] n transaction size
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@ -752,9 +799,8 @@ void gpdmaChannelSetMode(const stm32_gpdma_channel_t *dmachp,
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__STATIC_FORCEINLINE
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void gpdmaChannelTransactionSize(const stm32_gpdma_channel_t *dmachp,
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size_t n) {
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DMA_Channel_TypeDef *chp = dmachp->channel;
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chp->CBR1 = (uint32_t)n;
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dmachp->channel->CBR1 = (uint32_t)n;
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}
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#endif /* STM32_GPDMA_H */
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