I2C. API BROKEN! Structure fields renamed in underscore naming style.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3055 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -148,15 +148,12 @@ struct I2CSlaveConfig{
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*/
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*/
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i2cerrorcallback_t id_err_callback;
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i2cerrorcallback_t id_err_callback;
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/**
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size_t txbytes; /*!< Number of bytes to transmitted. */
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* @brief Receive and transmit buffers.
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size_t rxbytes; /*!< Number of bytes to received. */
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*/
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size_t txbytes;
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size_t rxbytes;
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i2cblock_t *rxbuf; /*!< Pointer to receive buffer. */
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i2cblock_t *rxbuf; /*!< Pointer to receive buffer. */
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i2cblock_t *txbuf; /*!< Pointer to transmit buffer.*/
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i2cblock_t *txbuf; /*!< Pointer to transmit buffer.*/
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uint16_t slave_addr;
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uint16_t slave_addr; /*!< Slave device address.*/
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uint8_t nbit_address; /*!< Length of address (must be 7 or 10).*/
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uint8_t nbit_addr; /*!< Length of address (must be 7 or 10).*/
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i2cflags_t errors;
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i2cflags_t errors;
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i2cflags_t flags;
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i2cflags_t flags;
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/* Status Change @p EventSource.*/
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/* Status Change @p EventSource.*/
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@ -360,8 +360,8 @@ void i2c_lld_reset(I2CDriver *i2cp){
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void i2c_lld_set_clock(I2CDriver *i2cp) {
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void i2c_lld_set_clock(I2CDriver *i2cp) {
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volatile uint16_t regCCR, regCR2, freq, clock_div;
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volatile uint16_t regCCR, regCR2, freq, clock_div;
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volatile uint16_t pe_bit_saved;
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volatile uint16_t pe_bit_saved;
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int32_t clock_speed = i2cp->id_config->ClockSpeed;
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int32_t clock_speed = i2cp->id_config->clock_speed;
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I2C_DutyCycle_t duty = i2cp->id_config->FastModeDutyCycle;
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i2cdutycycle_t duty = i2cp->id_config->duty_cycle;
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chDbgCheck((i2cp != NULL) && (clock_speed > 0) && (clock_speed <= 4000000),
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chDbgCheck((i2cp != NULL) && (clock_speed > 0) && (clock_speed <= 4000000),
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"i2c_lld_set_clock");
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"i2c_lld_set_clock");
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@ -389,7 +389,7 @@ void i2c_lld_set_clock(I2CDriver *i2cp) {
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clock_div = I2C_CCR_CCR;
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clock_div = I2C_CCR_CCR;
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/* Configure clock_div in standard mode */
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/* Configure clock_div in standard mode */
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if (clock_speed <= 100000) {
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if (clock_speed <= 100000) {
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chDbgAssert(duty == stdDutyCycle,
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chDbgAssert(duty == STD_DUTY_CYCLE,
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"i2c_lld_set_clock(), #1", "Invalid standard mode duty cycle");
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"i2c_lld_set_clock(), #1", "Invalid standard mode duty cycle");
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/* Standard mode clock_div calculate: Tlow/Thigh = 1/1 */
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/* Standard mode clock_div calculate: Tlow/Thigh = 1/1 */
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clock_div = (uint16_t)(STM32_PCLK1 / (clock_speed * 2));
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clock_div = (uint16_t)(STM32_PCLK1 / (clock_speed * 2));
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@ -402,13 +402,13 @@ void i2c_lld_set_clock(I2CDriver *i2cp) {
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}
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}
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/* Configure clock_div in fast mode */
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/* Configure clock_div in fast mode */
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else if(clock_speed <= 400000) {
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else if(clock_speed <= 400000) {
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chDbgAssert((duty == fastDutyCycle_2) || (duty == fastDutyCycle_16_9),
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chDbgAssert((duty == FAST_DUTY_CYCLE_2) || (duty == FAST_DUTY_CYCLE_16_9),
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"i2c_lld_set_clock(), #2", "Invalid fast mode duty cycle");
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"i2c_lld_set_clock(), #2", "Invalid fast mode duty cycle");
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if(duty == fastDutyCycle_2) {
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if(duty == FAST_DUTY_CYCLE_2) {
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/* Fast mode clock_div calculate: Tlow/Thigh = 2/1 */
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/* Fast mode clock_div calculate: Tlow/Thigh = 2/1 */
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clock_div = (uint16_t)(STM32_PCLK1 / (clock_speed * 3));
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clock_div = (uint16_t)(STM32_PCLK1 / (clock_speed * 3));
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}
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}
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else if(duty == fastDutyCycle_16_9) {
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else if(duty == FAST_DUTY_CYCLE_16_9) {
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/* Fast mode clock_div calculate: Tlow/Thigh = 16/9 */
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/* Fast mode clock_div calculate: Tlow/Thigh = 16/9 */
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clock_div = (uint16_t)(STM32_PCLK1 / (clock_speed * 25));
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clock_div = (uint16_t)(STM32_PCLK1 / (clock_speed * 25));
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/* Set DUTY bit */
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/* Set DUTY bit */
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@ -437,21 +437,21 @@ void i2c_lld_set_clock(I2CDriver *i2cp) {
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* @param[in] i2cp pointer to the @p I2CDriver object
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* @param[in] i2cp pointer to the @p I2CDriver object
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*/
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*/
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void i2c_lld_set_opmode(I2CDriver *i2cp) {
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void i2c_lld_set_opmode(I2CDriver *i2cp) {
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I2C_opMode_t opmode = i2cp->id_config->opMode;
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i2copmode_t opmode = i2cp->id_config->op_mode;
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uint16_t regCR1;
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uint16_t regCR1;
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/*---------------------------- CR1 Configuration ------------------------*/
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/*---------------------------- CR1 Configuration ------------------------*/
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/* Get the I2Cx CR1 value */
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/* Get the I2Cx CR1 value */
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regCR1 = i2cp->id_i2c->CR1;
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regCR1 = i2cp->id_i2c->CR1;
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switch(opmode){
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switch(opmode){
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case opmodeI2C:
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case OPMODE_I2C:
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regCR1 &= (uint16_t)~(I2C_CR1_SMBUS|I2C_CR1_SMBTYPE);
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regCR1 &= (uint16_t)~(I2C_CR1_SMBUS|I2C_CR1_SMBTYPE);
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break;
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break;
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case opmodeSMBusDevice:
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case OPMODE_SMBUS_DEVICE:
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regCR1 |= I2C_CR1_SMBUS;
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regCR1 |= I2C_CR1_SMBUS;
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regCR1 &= (uint16_t)~(I2C_CR1_SMBTYPE);
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regCR1 &= (uint16_t)~(I2C_CR1_SMBTYPE);
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break;
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break;
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case opmodeSMBusHost:
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case OPMODE_SMBUS_HOST:
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regCR1 |= (I2C_CR1_SMBUS|I2C_CR1_SMBTYPE);
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regCR1 |= (I2C_CR1_SMBUS|I2C_CR1_SMBTYPE);
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break;
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break;
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}
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}
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@ -470,15 +470,15 @@ void i2c_lld_set_own_address(I2CDriver *i2cp) {
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/*---------------------------- OAR1 Configuration -----------------------*/
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/*---------------------------- OAR1 Configuration -----------------------*/
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i2cp->id_i2c->OAR1 |= 1 << 14;
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i2cp->id_i2c->OAR1 |= 1 << 14;
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if (&(i2cp->id_config->OwnAddress10) == NULL){// only 7-bit address
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if (&(i2cp->id_config->own_addr_10) == NULL){// only 7-bit address
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i2cp->id_i2c->OAR1 &= (~I2C_OAR1_ADDMODE);
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i2cp->id_i2c->OAR1 &= (~I2C_OAR1_ADDMODE);
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i2cp->id_i2c->OAR1 |= i2cp->id_config->OwnAddress7 << 1;
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i2cp->id_i2c->OAR1 |= i2cp->id_config->own_addr_7 << 1;
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}
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}
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else {
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else {
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chDbgAssert((i2cp->id_config->OwnAddress10 < 1024),
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chDbgAssert((i2cp->id_config->own_addr_10 < 1024),
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"i2c_lld_set_own_address(), #1", "10-bit address longer then 10 bit")
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"i2c_lld_set_own_address(), #1", "10-bit address longer then 10 bit")
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i2cp->id_i2c->OAR1 |= I2C_OAR1_ADDMODE;
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i2cp->id_i2c->OAR1 |= I2C_OAR1_ADDMODE;
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i2cp->id_i2c->OAR1 |= i2cp->id_config->OwnAddress10;
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i2cp->id_i2c->OAR1 |= i2cp->id_config->own_addr_10;
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}
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}
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}
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}
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@ -522,7 +522,7 @@ void i2c_lld_master_transmit(I2CDriver *i2cp) {
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i2cp->id_i2c->CR2 |= (I2C_CR2_ITERREN|I2C_CR2_ITEVTEN|I2C_CR2_ITBUFEN);
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i2cp->id_i2c->CR2 |= (I2C_CR2_ITERREN|I2C_CR2_ITEVTEN|I2C_CR2_ITBUFEN);
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i2cp->id_i2c->CR1 &= ~I2C_CR1_POS;
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i2cp->id_i2c->CR1 &= ~I2C_CR1_POS;
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switch(i2cp->id_slave_config->nbit_address){
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switch(i2cp->id_slave_config->nbit_addr){
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case 7:
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case 7:
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// LSB = 0 -> write
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// LSB = 0 -> write
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i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr <<1) & 0x00FE);
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i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr <<1) & 0x00FE);
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@ -564,7 +564,7 @@ void i2c_lld_master_receive(I2CDriver *i2cp){
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i2cp->id_i2c->CR1 |= I2C_CR1_ACK; // acknowledge returned
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i2cp->id_i2c->CR1 |= I2C_CR1_ACK; // acknowledge returned
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i2cp->id_i2c->CR1 &= ~I2C_CR1_POS;
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i2cp->id_i2c->CR1 &= ~I2C_CR1_POS;
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switch(i2cp->id_slave_config->nbit_address){
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switch(i2cp->id_slave_config->nbit_addr){
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case 7:
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case 7:
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// LSB = 1 -> receive
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// LSB = 1 -> receive
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i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr <<1) | 0x01);
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i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr <<1) | 0x01);
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@ -95,28 +95,28 @@
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typedef uint32_t i2cflags_t;
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typedef uint32_t i2cflags_t;
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typedef enum {
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typedef enum {
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opmodeI2C,
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OPMODE_I2C = 1,
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opmodeSMBusDevice,
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OPMODE_SMBUS_DEVICE = 2,
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opmodeSMBusHost,
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OPMODE_SMBUS_HOST = 3,
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} I2C_opMode_t;
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} i2copmode_t;
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typedef enum {
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typedef enum {
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stdDutyCycle,
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STD_DUTY_CYCLE = 1,
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fastDutyCycle_2,
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FAST_DUTY_CYCLE_2 = 2,
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fastDutyCycle_16_9,
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FAST_DUTY_CYCLE_16_9 = 3,
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} I2C_DutyCycle_t;
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} i2cdutycycle_t;
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/**
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/**
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* @brief Driver configuration structure.
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* @brief Driver configuration structure.
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*/
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*/
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typedef struct {
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typedef struct {
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I2C_opMode_t opMode; /*!< Specifies the I2C mode.*/
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i2copmode_t op_mode; /*!< Specifies the I2C mode.*/
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uint32_t ClockSpeed; /*!< Specifies the clock frequency. Must be set to a value lower than 400kHz */
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uint32_t clock_speed; /*!< Specifies the clock frequency. Must be set to a value lower than 400kHz */
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I2C_DutyCycle_t FastModeDutyCycle;/*!< Specifies the I2C fast mode duty cycle */
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i2cdutycycle_t duty_cycle; /*!< Specifies the I2C fast mode duty cycle */
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uint8_t OwnAddress7; /*!< Specifies the first device 7-bit own address. */
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uint8_t own_addr_7; /*!< Specifies the first device 7-bit own address. */
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uint16_t OwnAddress10; /*!< Specifies the second part of device own address in 10-bit mode. Set to NULL if not used. */
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uint16_t own_addr_10; /*!< Specifies the second part of device own address in 10-bit mode. Set to NULL if not used. */
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uint16_t Ack; /*!< Enables or disables the acknowledgement. */
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uint16_t ack; /*!< Enables or disables the acknowledgement. */
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uint8_t nBitAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged */
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uint8_t nbit_own_addr; /*!< Specifies if 7-bit or 10-bit address is acknowledged */
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} I2CConfig;
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} I2CConfig;
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@ -169,7 +169,7 @@ struct I2CDriver{
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uint8_t slave_addr1; // 7-bit address of the slave
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uint8_t slave_addr1; // 7-bit address of the slave
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uint8_t slave_addr2; // used in 10-bit address mode
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uint8_t slave_addr2; // used in 10-bit address mode
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uint8_t nbit_address;
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uint8_t nbit_addr;
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/*********** End of the mandatory fields. **********************************/
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/*********** End of the mandatory fields. **********************************/
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@ -144,7 +144,7 @@ void i2cMasterTransmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg) {
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uint8_t nbit_addr;
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uint8_t nbit_addr;
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txbuf = i2cscfg->txbuf;
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txbuf = i2cscfg->txbuf;
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nbit_addr = i2cscfg->nbit_address;
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nbit_addr = i2cscfg->nbit_addr;
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n = i2cscfg->txbytes;
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n = i2cscfg->txbytes;
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chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) && \
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chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) && \
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@ -194,7 +194,7 @@ void i2cMasterReceive(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){
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rxbuf = i2cscfg->rxbuf;
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rxbuf = i2cscfg->rxbuf;
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n = i2cscfg->rxbytes;
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n = i2cscfg->rxbytes;
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nbit_addr = i2cscfg->nbit_address;
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nbit_addr = i2cscfg->nbit_addr;
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chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) && (n > 0) && \
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chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) && (n > 0) && \
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((nbit_addr == 7) || (nbit_addr == 10)) && (rxbuf != NULL),
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((nbit_addr == 7) || (nbit_addr == 10)) && (rxbuf != NULL),
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@ -9,18 +9,22 @@
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/* I2C1 */
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/* I2C1 */
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static I2CConfig i2cfg1 = {
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static I2CConfig i2cfg1 = {
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opmodeI2C,
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OPMODE_I2C,
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100000,
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100000,
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stdDutyCycle,
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STD_DUTY_CYCLE,
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0,
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0,
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0,
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0,
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0,
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0,
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};
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};
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/* I2C2 */
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/* I2C2 */
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static I2CConfig i2cfg2 = {
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static I2CConfig i2cfg2 = {
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opmodeI2C,
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OPMODE_I2C,
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100000,
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100000,
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stdDutyCycle,
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STD_DUTY_CYCLE,
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0,
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0,
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0,
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0,
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0,
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0,
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};
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};
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