git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2371 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2010-11-16 18:39:47 +00:00
parent 5962467685
commit 354bd66eb0
18 changed files with 332 additions and 313 deletions

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@ -28,7 +28,7 @@
* Board identifier.
*/
#define BOARD_OLIMEX_STM32_H103
#define BOARD_NAME "Olimex STM32-H103"
#define BOARD_NAME "Olimex STM32-H103"
/*
* Board frequencies.
@ -39,7 +39,7 @@
/*
* MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
*/
#define STM32F103xB
#define STM32F10X_MD
/*
* IO pins assignments.

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@ -28,7 +28,7 @@
* Board identifier.
*/
#define BOARD_OLIMEX_STM32_P103
#define BOARD_NAME "Olimex STM32-P103"
#define BOARD_NAME "Olimex STM32-P103"
/*
* Board frequencies.
@ -39,7 +39,7 @@
/*
* MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
*/
#define STM32F103xB
#define STM32F10X_MD
/*
* IO pins assignments.

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@ -34,6 +34,7 @@ ROMCONST PALConfig pal_default_config =
{VAL_GPIOEODR, 0, VAL_GPIOEDDR, VAL_GPIOECR1, VAL_GPIOECR2},
{VAL_GPIOFODR, 0, VAL_GPIOFDDR, VAL_GPIOFCR1, VAL_GPIOFCR2},
{VAL_GPIOGODR, 0, VAL_GPIOGDDR, VAL_GPIOGCR1, VAL_GPIOGCR2},
}
};
/*
@ -71,13 +72,13 @@ void hwinit(void) {
/*
* TIM2 initialization as system tick.
*/
CLK->PCKENR1 |= 32; /* PCKEN15, TIM2 clock source.*/
CLK->PCKENR1 |= CLK_PCKENR1_TIM2;
TIM2->PSCR = 4; /* Prescaler divide by 2^4=16.*/
TIM2->ARRH = TIM2_ARR >> 8;
TIM2->ARRL = TIM2_ARR;
TIM2->ARRH = (uint8_t)(TIM2_ARR >> 8);
TIM2->ARRL = (uint8_t)(TIM2_ARR);
TIM2->CNTRH = 0;
TIM2->CNTRL = 0;
TIM2->SR1 = 0;
TIM2->IER = 1; /* UIE */
TIM2->CR1 = 1; /* CEN */
TIM2->IER = TIM2_IER_UIE;
TIM2->CR1 = TIM2_CR1_CEN;
}

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@ -28,12 +28,12 @@
* Board identifiers.
*/
#define BOARD_REVA_V3_STM8S208RB
#define BOARD_NAME "Raisonance REva V3 + STM8S208RB"
#define BOARD_NAME "Raisonance REva V3 + STM8S208RB"
/*
* Board frequencies.
*/
#define HSECLK 24000000
#define HSECLK 0
/*
* MCU model used on the board.

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@ -28,7 +28,7 @@
* Board identifier.
*/
#define BOARD_ST_STM3210C_EVAL
#define BOARD_NAME "ST STM3210C-EVAL"
#define BOARD_NAME "ST STM3210C-EVAL"
/*
* Board frequencies.
@ -39,7 +39,7 @@
/*
* MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
*/
#define STM32F107xC
#define STM32F10X_CL
/*
* IO pins assignments.

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@ -39,7 +39,7 @@
/*
* MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
*/
#define STM32F100xB
#define STM32F10X_MD_VL
/*
* IO pins assignments.

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@ -34,6 +34,7 @@ ROMCONST PALConfig pal_default_config =
{VAL_GPIOEODR, 0, VAL_GPIOEDDR, VAL_GPIOECR1, VAL_GPIOECR2},
{VAL_GPIOFODR, 0, VAL_GPIOFDDR, VAL_GPIOFCR1, VAL_GPIOFCR2},
{VAL_GPIOGODR, 0, VAL_GPIOGDDR, VAL_GPIOGCR1, VAL_GPIOGCR2},
}
};
/*
@ -71,13 +72,13 @@ void hwinit(void) {
/*
* TIM2 initialization as system tick.
*/
CLK->PCKENR1 |= 32; /* PCKEN15, TIM2 clock source.*/
CLK->PCKENR1 |= CLK_PCKENR1_TIM2;
TIM2->PSCR = 4; /* Prescaler divide by 2^4=16.*/
TIM2->ARRH = (uint8_t)(TIM2_ARR >> 8);
TIM2->ARRL = (uint8_t)(TIM2_ARR);
TIM2->CNTRH = 0;
TIM2->CNTRL = 0;
TIM2->SR1 = 0;
TIM2->IER = 1; /* UIE */
TIM2->CR1 = 1; /* CEN */
TIM2->IER = TIM2_IER_UIE;
TIM2->CR1 = TIM2_CR1_CEN;
}

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@ -28,7 +28,7 @@
* Board identifiers.
*/
#define BOARD_ST_STM8S_DISCOVERY
#define BOARD_NAME "ST STM8S-Discovery"
#define BOARD_NAME "ST STM8S-Discovery"
/*
* Board frequencies.

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@ -28,19 +28,19 @@
/*
* HAL general settings.
*/
#define STM8L_NO_CLOCK_INIT FALSE
#define STM8L_HSI_ENABLED TRUE
#define STM8L_LSI_ENABLED TRUE
#define STM8L_HSE_ENABLED FALSE
#define STM8L_LSE_ENABLED TRUE
#define STM8L_SYSCLK_SOURCE CLK_SYSSEL_HSI
#define STM8L_SYSCLK_DIVIDER CLK_SYSCLK_DIV1
#define STM8L_RTCCLK_SOURCE CLK_RTCSEL_LSE
#define STM8L_RTCCLK_DIVIDER CLK_RTCCLK_DIV1
#define STM8L_NO_CLOCK_INIT FALSE
#define STM8L_HSI_ENABLED TRUE
#define STM8L_LSI_ENABLED TRUE
#define STM8L_HSE_ENABLED FALSE
#define STM8L_LSE_ENABLED TRUE
#define STM8L_SYSCLK_SOURCE CLK_SYSSEL_HSI
#define STM8L_SYSCLK_DIVIDER CLK_SYSCLK_DIV1
#define STM8L_RTCCLK_SOURCE CLK_RTCSEL_LSE
#define STM8L_RTCCLK_DIVIDER CLK_RTCCLK_DIV1
/*
* SERIAL driver system settings.
*/
#define STM8L_SERIAL_USE_USART1 TRUE
#define STM8L_SERIAL_USE_USART2 FALSE
#define STM8L_SERIAL_USE_USART3 FALSE
#define STM8L_SERIAL_USE_USART1 TRUE
#define STM8L_SERIAL_USE_USART2 FALSE
#define STM8L_SERIAL_USE_USART3 FALSE

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@ -28,9 +28,14 @@
/*
* HAL general settings.
*/
#define STM8_CLOCK_SOURCE CLK_SOURCE_HSI
#define STM8_NO_CLOCK_INIT FALSE
#define STM8_HSI_ENABLED FALSE
#define STM8_LSI_ENABLED TRUE
#define STM8_HSE_ENABLED TRUE
#define STM8_SYSCLK_SOURCE CLK_SYSSEL_HSE
#define STM8_HSI_DIVIDER CLK_HSI_DIV1
#define STM8_CPU_DIVIDER CLK_CPU_DIV1
#define STM8_CAN_DIVIDER_VALUE 1
/*
* SERIAL driver system settings.
@ -42,5 +47,5 @@
/*
* SPI driver system settings.
*/
#define STM8_SPI_USE_SPI FALSE
#define STM8_SPI_USE_SPI TRUE
#define STM8_SPI_ERROR_HOOK(spip) chSysHalt()

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@ -28,13 +28,24 @@
/*
* HAL general settings.
*/
#define STM8_CLOCK_SOURCE CLK_SOURCE_HSI
#define STM8_HSI_DIVIDER CLK_HSI_DIV1
#define STM8_CPU_DIVIDER CLK_CPU_DIV1
#define STM8_NO_CLOCK_INIT FALSE
#define STM8_HSI_ENABLED FALSE
#define STM8_LSI_ENABLED TRUE
#define STM8_HSE_ENABLED TRUE
#define STM8_SYSCLK_SOURCE CLK_SYSSEL_HSI
#define STM8_HSI_DIVIDER CLK_HSI_DIV1
#define STM8_CPU_DIVIDER CLK_CPU_DIV1
#define STM8_CAN_DIVIDER_VALUE 1
/*
* SERIAL driver system settings.
*/
#define USE_STM8_UART1 TRUE
#define USE_STM8_UART2 FALSE
#define USE_STM8_UART3 FALSE
#define USE_STM8_UART1 TRUE
#define USE_STM8_UART2 FALSE
#define USE_STM8_UART3 FALSE
/*
* SPI driver system settings.
*/
#define STM8_SPI_USE_SPI TRUE
#define STM8_SPI_ERROR_HOOK(spip) chSysHalt()

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@ -26,16 +26,13 @@
* - STM32_HSECLK.
* .
* One of the following macros must also be defined:
* - STM32F100x4, STM32F100x6 for Value Line Low Density devices.
* - STM32F100x8, STM32F100xB for Value Line Medium Density devices.
* - STM32F103x4, STM32F103x6 for Performance Low Density devices.
* - STM32F103x8, STM32F103xB for Performance Medium Density devices.
* - STM32F103xC, STM32F103xD, STM32F103xE, STM32F103xG for
* Performance High Density devices.
* - STM32F105x8, STM32F105xB, STM32F105xC for Connectivity Line
* devices.
* - STM32F107xB, STM32F107xC for Connectivity Line devices with
* Ethernet.
* - STM32F10X_LD_VL for Value Line Low Density devices.
* - STM32F10X_MD_VL for Value Line Medium Density devices.
* - STM32F10X_LD for Performance Low Density devices.
* - STM32F10X_MD for Performance Medium Density devices.
* - STM32F10X_HD for Performance High Density devices.
* - STM32F10X_XD for Performance eXtra Density devices.
* - STM32F10X_CL for Connectivity Line devices.
* .
*
* @addtogroup HAL
@ -63,11 +60,10 @@
#if defined(__DOXYGEN__)
#define PLATFORM_NAME "STM32"
#elif defined(STM32F100x4) || defined(STM32F100x6)
#elif defined(STM32F10X_LD_VL)
/*
* Capability flags for Value Line Low Density devices.
*/
#define STM32F10X_LD_VL
#define PLATFORM_NAME "STM32 Value Line Low Density"
#include "hal_lld_f100.h"
@ -131,11 +127,10 @@
#define STM32_HAS_USB FALSE
#define STM32_HAS_USBOTG FALSE
#elif defined(STM32F100x8) || defined(STM32F100xB)
#elif defined(STM32F10X_MD_VL)
/*
* Capability flags for Value Line Medium Density devices.
*/
#define STM32F10X_MD_VL
#define PLATFORM_NAME "STM32 Value Line Medium Density"
#include "hal_lld_f100.h"
@ -199,11 +194,10 @@
#define STM32_HAS_USB FALSE
#define STM32_HAS_USBOTG FALSE
#elif defined(STM32F103x4) || defined(STM32F103x6)
#elif defined(STM32F10X_LD)
/*
* Capability flags for Performance Line Low Density devices.
*/
#define STM32F10X_LD
#define PLATFORM_NAME "STM32 Performance Line Low Density"
#include "hal_lld_f103.h"
@ -267,11 +261,10 @@
#define STM32_HAS_USB FALSE
#define STM32_HAS_USBOTG FALSE
#elif defined(STM32F103x8) || defined(STM32F103xB)
#elif defined(STM32F10X_MD)
/*
* Capability flags for Performance Line Medium Density devices.
*/
#define STM32F10X_MD
#define PLATFORM_NAME "STM32 Performance Line Medium Density"
#include "hal_lld_f103.h"
@ -335,12 +328,10 @@
#define STM32_HAS_USB TRUE
#define STM32_HAS_USBOTG FALSE
#elif defined(STM32F103xC) || defined(STM32F103xD) || \
defined(STM32F103xE) || defined(STM32F103xG)
#elif defined(STM32F10X_HD)
/*
* Capability flags for Performance Line High Density devices.
*/
#define STM32F10X_HD
#define PLATFORM_NAME "STM32 Performance Line High Density"
#include "hal_lld_f103.h"
@ -404,20 +395,19 @@
#define STM32_HAS_USB TRUE
#define STM32_HAS_USBOTG FALSE
#elif defined(STM32F105x8) || defined(STM32F105xB) || defined(STM32F105xC)
#elif defined(STM32F10X_XD)
/*
* Capability flags for Connectivity Line devices.
* Capability flags for Performance Line eXtra Density devices.
*/
#define STM32F10X_CL
#define PLATFORM_NAME "STM32 Connectivity Line"
#include "hal_lld_f105_f107.h"
#define PLATFORM_NAME "STM32 Performance Line eXtra Density"
#include "hal_lld_f103.h"
#define STM32_HAS_ADC1 TRUE
#define STM32_HAS_ADC2 TRUE
#define STM32_HAS_ADC3 FALSE
#define STM32_HAS_ADC3 TRUE
#define STM32_HAS_CAN1 TRUE
#define STM32_HAS_CAN2 TRUE
#define STM32_HAS_CAN2 FALSE
#define STM32_HAS_DAC TRUE
@ -431,15 +421,15 @@
#define STM32_HAS_GPIOC TRUE
#define STM32_HAS_GPIOD TRUE
#define STM32_HAS_GPIOE TRUE
#define STM32_HAS_GPIOF FALSE
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOF TRUE
#define STM32_HAS_GPIOG TRUE
#define STM32_HAS_I2C1 TRUE
#define STM32_HAS_I2C2 TRUE
#define STM32_HAS_RTC TRUE
#define STM32_HAS_SDIO FALSE
#define STM32_HAS_SDIO TRUE
#define STM32_HAS_SPI1 TRUE
#define STM32_HAS_SPI2 TRUE
@ -452,7 +442,7 @@
#define STM32_HAS_TIM5 TRUE
#define STM32_HAS_TIM6 TRUE
#define STM32_HAS_TIM7 TRUE
#define STM32_HAS_TIM8 FALSE
#define STM32_HAS_TIM8 TRUE
#define STM32_HAS_TIM9 FALSE
#define STM32_HAS_TIM10 FALSE
#define STM32_HAS_TIM11 FALSE
@ -469,15 +459,14 @@
#define STM32_HAS_UART3 TRUE
#define STM32_HAS_UART4 TRUE
#define STM32_HAS_USB FALSE
#define STM32_HAS_USBOTG TRUE
#define STM32_HAS_USB TRUE
#define STM32_HAS_USBOTG FALSE
#elif defined(STM32F107xB) || defined(STM32F107xC)
#elif defined(STM32F10X_CL)
/*
* Capability flags for Connectivity Line devices with Ethernet.
* Capability flags for Connectivity Line devices.
*/
#define STM32F10X_CL
#define PLATFORM_NAME "STM32 Connectivity Line with Ethernet"
#define PLATFORM_NAME "STM32 Connectivity Line"
#include "hal_lld_f105_f107.h"
#define STM32_HAS_ADC1 TRUE

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@ -50,36 +50,47 @@
/**
* @brief Low level HAL driver initialization.
* @details Clock sources initialization, HSI is assumed to be already
* started after reset.
* @note If the @p STM8_CLOCK_INIT option is set to @p FALSE then the
* initialization is not performed and is left to the application.
*
* @notapi
*/
void hal_lld_init(void) {
#if STM8_CLOCK_SOURCE != CLK_SOURCE_DEFAULT
#if STM8_CLOCK_SOURCE == CLK_SOURCE_HSI
CLK->ICKR = 1; /* HSIEN */
while ((CLK->ICKR & 2) == 0) /* HSIRDY */
#if !STM8_NO_CLOCK_INIT
/* Makes sure that HSI is stable before proceeding.*/
CLK->ICKR |= CLK_ICKR_HSIRDY;
while ((CLK->ICKR & CLK_ICKR_HSIRDY) == 0)
;
#elif STM8_CLOCK_SOURCE == CLK_SOURCE_LSI
CLK->ICKR = 8; /* LSIEN */
while ((CLK->ICKR & 16) == 0) /* LSIRDY */
;
#else /* STM8_CLOCK_SOURCE == CLK_SOURCE_HSE */
CLK->ECKR = 1; /* HSEEN */
while ((CLK->ECKR & 2) == 0) /* HSERDY */
/* LSI startup and stabilization if required.*/
#if STM8_LSI_ENABLED
CLK->ICKR |= CLK_ICKR_LSIEN;
while ((CLK->ICKR & CLK_ICKR_LSIRDY) == 0)
;
#endif
#if STM8_CLOCK_SOURCE != CLK_SOURCE_HSI
/* Switching clock (manual switch mode).*/
CLK->SWCR = 0;
CLK->SWR = STM8_CLOCK_SOURCE;
while ((CLK->SWCR & 8) == 0) /* SWIF */
/* HSE startup and stabilization if required.*/
#if STM8_HSE_ENABLED
CLK->ECKR |= CLK_ECKCR_HSEEN;
while ((CLK->ECKR & CLK_ECKR_HSERDY) == 0)
;
CLK->SWCR = 2; /* SWEN */
#endif
/* Setting up clock dividers.*/
CLK->CKDIVR = (STM8_HSI_DIVIDER << 3) | (STM8_CPU_DIVIDER << 0);
/* SYSCLK switch to the selected source, not necessary if it is HSI.*/
#if STM8_SYSCLK_SOURCE != CLK_SYSSEL_HSI
/* Switching clock (manual switch mode).*/
CLK->SWR = STM8_SYSCLK_SOURCE;
while ((CLK->SWCR & CLK_SWCR_SWIF) == 0)
;
CLK->SWCR = CLK_SWCR_SWEN;
#endif
/* Clocks initially all disabled.*/
CLK->PCKENR1 = 0;
CLK->PCKENR2 = 0;
@ -87,8 +98,13 @@ void hal_lld_init(void) {
/* Other clock related initializations.*/
CLK->CSSR = 0;
CLK->CCOR = 0;
CLK->CANCCR = 0;
#endif /* STM8_CLOCK_SOURCE != CLK_SOURCE_DEFAULT */
CLK->CANCCR = STM8_CAN_DIVIDER_VALUE;
/* HSI disabled if it is no more required.*/
#if !STM8_HSI_ENABLED
CLK->ICKR &= ~CLK_ICKR_HSION;
#endif
#endif /* !STM8_NO_CLOCK_INIT */
}
/** @} */

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@ -20,6 +20,17 @@
/**
* @file STM8/hal_lld.h
* @brief STM8 HAL subsystem low level driver source.
* @pre This module requires the following macros to be defined in the
* @p board.h file:
* - HSECLK (@p 0 if disabled or frequency in Hertz).
* .
* One of the following macros must also be defined:
* - STM8S103.
* - STM8S105.
* - STM8S207.
* - STM8S208.
* - STM8S903.
* .
*
* @addtogroup HAL
* @{
@ -37,15 +48,14 @@
/**
* @brief Platform name.
*/
#define PLATFORM_NAME "STM8x"
#define PLATFORM_NAME "STM8S"
#define LSICLK 128000 /**< Low speed internal clock. */
#define HSICLK 16000000 /**< High speed internal clock. */
#define CLK_SOURCE_DEFAULT 0 /**< No clock initialization. */
#define CLK_SOURCE_HSI 0xE1 /**< HSI clock selector. */
#define CLK_SOURCE_LSI 0xD2 /**< LSI clock selector. */
#define CLK_SOURCE_HSE 0xB4 /**< HSE clock selector. */
#define CLK_SYSSEL_HSI 0xE1 /**< HSI clock selector. */
#define CLK_SYSSEL_LSI 0xD2 /**< LSI clock selector. */
#define CLK_SYSSEL_HSE 0xB4 /**< HSE clock selector. */
#define CLK_HSI_DIV1 0 /**< HSI clock divided by 1. */
#define CLK_HSI_DIV2 1 /**< HSI clock divided by 2. */
@ -65,11 +75,39 @@
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @brief Disables the clock initialization in the HAL.
*/
#if !defined(STM8_NO_CLOCK_INIT) || defined(__DOXYGEN__)
#define STM8_NO_CLOCK_INIT FALSE
#endif
/**
* @brief Enables or disables the HSI clock source.
*/
#if !defined(STM8_HSI_ENABLED) || defined(__DOXYGEN__)
#define STM8_HSI_ENABLED FALSE
#endif
/**
* @brief Enables or disables the LSI clock source.
*/
#if !defined(STM8_LSI_ENABLED) || defined(__DOXYGEN__)
#define STM8_LSI_ENABLED TRUE
#endif
/**
* @brief Enables or disables the HSE clock source.
*/
#if !defined(STM8_HSE_ENABLED) || defined(__DOXYGEN__)
#define STM8_HSE_ENABLED TRUE
#endif
/**
* @brief Clock source setting.
*/
#if !defined(STM8_CLOCK_SOURCE) || defined(__DOXYGEN__)
#define STM8_CLOCK_SOURCE CLK_SOURCE_DEFAULT
#if !defined(STM8_SYSCLK_SOURCE) || defined(__DOXYGEN__)
#define STM8_SYSCLK_SOURCE CLK_SYSSEL_HSE
#endif
/**
@ -86,6 +124,13 @@
#define STM8_CPU_DIVIDER CLK_CPU_DIV1
#endif
/**
* @brief bxCAN divider value.
*/
#if !defined(STM8_CAN_DIVIDER_VALUE) || defined(__DOXYGEN__)
#define STM8_CAN_DIVIDER_VALUE 1
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
@ -108,18 +153,46 @@
#error "specified invalid CPU divider"
#endif
#if STM8_CLOCK_SOURCE == CLK_SOURCE_DEFAULT
#if (STM8_CAN_DIVIDER_VALUE < 1) || (STM8_CAN_DIVIDER_VALUE > 8)
#error "specified invalid CAN divider value"
#endif
#if STM8_HSE_ENABLED && (HSECLK == 0)
#error "impossible to activate HSE"
#endif
#if !STM8_HSI_ENABLED && (STM8_SYSCLK_SOURCE == CLK_SYSSEL_HSI)
#error "requested HSI clock is not enabled"
#endif
#if !STM8_LSI_ENABLED && (STM8_SYSCLK_SOURCE == CLK_SYSSEL_LSI)
#error "requested LSI clock is not enabled"
#endif
#if !STM8_HSE_ENABLED && (STM8_SYSCLK_SOURCE == CLK_SYSSEL_HSE)
#error "requested HSE clock is not enabled"
#endif
/**
* @brief System clock.
*/
#if STM8L_NO_CLOCK_INIT || defined(__DOXYGEN__)
#define SYSCLK (HSICLK / 8)
#elif STM8_CLOCK_SOURCE == CLK_SOURCE_HSI
#elif STM8_SYSCLK_SOURCE == CLK_SYSSEL_HSI
#define SYSCLK (HSICLK / (1 << STM8_HSI_DIVIDER))
#elif STM8_CLOCK_SOURCE == CLK_SOURCE_LSI
#elif STM8_SYSCLK_SOURCE == CLK_SYSSEL_LSI
#define SYSCLK LSICLK
#elif STM8_CLOCK_SOURCE == CLK_SOURCE_HSE
#elif STM8_SYSCLK_SOURCE == CLK_SYSSEL_HSE
#define SYSCLK HSECLK
#else
#error "specified invalid clock source"
#endif
/**
* @brief CPU clock.
* @details On the STM8S the CPU clock can be programmed to be a fraction of
* the system clock.
*/
#define CPUCLK (SYSCLK / (1 << STM8_CPU_DIVIDER))
/*===========================================================================*/

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@ -100,7 +100,7 @@ void hal_lld_init(void) {
/* SYSCLK switch to the selected source, not necessary if it is HSI.*/
#if STM8L_SYSCLK_SOURCE != CLK_SYSSEL_HSI
/* Switching clock (manual switch mode).*/
CLK->SWR = STM8_CLOCK_SOURCE;
CLK->SWR = STM8L_SYSCLK_SOURCE;
while ((CLK->SWCR & CLK_SWCR_SWIF) == 0)
;
CLK->SWCR = CLK_SWCR_SWEN;

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@ -42,9 +42,7 @@
#undef FALSE
#undef TRUE
#include "stm8l15x.h"
#define FALSE 0
#define TRUE (!FALSE)
@ -217,7 +215,10 @@
#error "requested LSE clock is not enabled"
#endif
#if STM8L_NO_CLOCK_INIT
/**
* @brief System clock.
*/
#if STM8L_NO_CLOCK_INIT || defined(__DOXYGEN__)
#define SYSCLK (HSICLK / 8)
#elif STM8L_SYSCLK_SOURCE == CLK_SYSSEL_HSI
#define SYSCLK (HSICLK / (1 << STM8L_SYSCLK_DIVIDER))
@ -231,7 +232,10 @@
#error "specified invalid SYSCLK source"
#endif
#if STM8L_NO_CLOCK_INIT
/**
* @brief RTC clock.
*/
#if STM8L_NO_CLOCK_INIT || defined(__DOXYGEN__)
#define RTCCLK 0
#elif STM8L_RTCCLK_SOURCE == CLK_RTCSEL_HSI
#define RTCCLK (HSICLK / (1 << STM8L_RTCCLK_DIVIDER))
@ -245,6 +249,12 @@
#error "specified invalid RTCCLK source"
#endif
/**
* @brief CPU clock.
* @details On the STM8L the CPU clock is always equal to the system clock.
*/
#define CPUCLK SYSCLK
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/

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@ -136,45 +136,34 @@ extern void Vector14C(void);
__attribute__ ((section("vectors")))
#endif
void (*_vectors[])(void) = {
__ram_end__,
ResetHandler,
NMIVector,
HardFaultVector,
MemManageVector,
BusFaultVector,
UsageFaultVector,
Vector1C,
Vector20,
Vector24,
Vector28,
SVCallVector,
DebugMonitorVector,
Vector34,
PendSVVector,
SysTickVector,
Vector40, Vector44, Vector48, Vector4C,
Vector50, Vector54, Vector58, Vector5C,
Vector60, Vector64, Vector68, Vector6C,
Vector70, Vector74, Vector78, Vector7C,
Vector80, Vector84, Vector88, Vector8C,
Vector90, Vector94, Vector98, Vector9C,
VectorA0, VectorA4, VectorA8, VectorAC,
VectorB0, VectorB4, VectorB8, VectorBC,
VectorC0, VectorC4, VectorC8, VectorCC,
VectorD0, VectorD4, VectorD8, VectorDC,
VectorE0, VectorE4, VectorE8,
#if defined(STM32F10X_MD_VL) || defined(STM32F10X_HD) || defined(STM32F10X_CL)
VectorEC, VectorF0, VectorF4,
__ram_end__, ResetHandler, NMIVector, HardFaultVector,
MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
Vector20, Vector24, Vector28, SVCallVector,
DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
Vector40, Vector44, Vector48, Vector4C,
Vector50, Vector54, Vector58, Vector5C,
Vector60, Vector64, Vector68, Vector6C,
Vector70, Vector74, Vector78, Vector7C,
Vector80, Vector84, Vector88, Vector8C,
Vector90, Vector94, Vector98, Vector9C,
VectorA0, VectorA4, VectorA8, VectorAC,
VectorB0, VectorB4, VectorB8, VectorBC,
VectorC0, VectorC4, VectorC8, VectorCC,
VectorD0, VectorD4, VectorD8, VectorDC,
VectorE0, VectorE4, VectorE8,
#if defined(STM32F10X_MD_VL) || defined(STM32F10X_HD) || \
defined(STM32F10X_XL) || defined(STM32F10X_CL)
VectorEC, VectorF0, VectorF4,
#endif
#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
VectorF8, VectorFC, Vector100, Vector104,
Vector108, Vector10C, Vector110, Vector114,
Vector118, Vector11C, Vector120, Vector124,
Vector128, Vector12C,
#if defined(STM32F10X_HD) || defined(STM32F10X_XL) || defined(STM32F10X_CL)
VectorF8, VectorFC, Vector100, Vector104,
Vector108, Vector10C, Vector110, Vector114,
Vector118, Vector11C, Vector120, Vector124,
Vector128, Vector12C,
#endif
#if defined(STM32F10X_CL)
Vector130, Vector134, Vector138, Vector13C,
Vector140, Vector144, Vector148, Vector14C
Vector130, Vector134, Vector138, Vector13C,
Vector140, Vector144, Vector148, Vector14C
#endif
};
@ -191,170 +180,95 @@ __attribute__ ((naked))
void _unhandled_exception(void) {
asm volatile (
".weak NMIVector \n"
"NMIVector: \n\t"
".weak HardFaultVector \n"
"HardFaultVector: \n\t"
".weak MemManageVector \n"
"MemManageVector: \n\t"
".weak BusFaultVector \n"
"BusFaultVector: \n\t"
".weak UsageFaultVector \n"
"UsageFaultVector: \n\t"
".weak Vector1C \n"
"Vector1C: \n\t"
".weak Vector20 \n"
"Vector20: \n\t"
".weak Vector24 \n"
"Vector24: \n\t"
".weak Vector28 \n"
"Vector28: \n\t"
".weak SVCallVector \n"
"SVCallVector: \n\t"
".weak DebugMonitorVector \n"
"DebugMonitorVector: \n\t"
".weak Vector34 \n"
"Vector34: \n\t"
".weak PendSVVector \n"
"PendSVVector: \n\t"
".weak SysTickVector \n"
"SysTickVector: \n\t"
".weak Vector40 \n"
"Vector40: \n\t"
".weak Vector44 \n"
"Vector44: \n\t"
".weak Vector48 \n"
"Vector48: \n\t"
".weak Vector4C \n"
"Vector4C: \n\t"
".weak Vector50 \n"
"Vector50: \n\t"
".weak Vector54 \n"
"Vector54: \n\t"
".weak Vector58 \n"
"Vector58: \n\t"
".weak Vector5C \n"
"Vector5C: \n\t"
".weak Vector60 \n"
"Vector60: \n\t"
".weak Vector64 \n"
"Vector64: \n\t"
".weak Vector68 \n"
"Vector68: \n\t"
".weak Vector6C \n"
"Vector6C: \n\t"
".weak Vector70 \n"
"Vector70: \n\t"
".weak Vector74 \n"
"Vector74: \n\t"
".weak Vector78 \n"
"Vector78: \n\t"
".weak Vector7C \n"
"Vector7C: \n\t"
".weak Vector80 \n"
"Vector80: \n\t"
".weak Vector84 \n"
"Vector84: \n\t"
".weak Vector88 \n"
"Vector88: \n\t"
".weak Vector8C \n"
"Vector8C: \n\t"
".weak Vector90 \n"
"Vector90: \n\t"
".weak Vector94 \n"
"Vector94: \n\t"
".weak Vector98 \n"
"Vector98: \n\t"
".weak Vector9C \n"
"Vector9C: \n\t"
".weak VectorA0 \n"
"VectorA0: \n\t"
".weak VectorA4 \n"
"VectorA4: \n\t"
".weak VectorA8 \n"
"VectorA8: \n\t"
".weak VectorAC \n"
"VectorAC: \n\t"
".weak VectorB0 \n"
"VectorB0: \n\t"
".weak VectorB4 \n"
"VectorB4: \n\t"
".weak VectorB8 \n"
"VectorB8: \n\t"
".weak VectorBC \n"
"VectorBC: \n\t"
".weak VectorC0 \n"
"VectorC0: \n\t"
".weak VectorC4 \n"
"VectorC4: \n\t"
".weak VectorC8 \n"
"VectorC8: \n\t"
".weak VectorCC \n"
"VectorCC: \n\t"
".weak VectorD0 \n"
"VectorD0: \n\t"
".weak VectorD4 \n"
"VectorD4: \n\t"
".weak VectorD8 \n"
"VectorD8: \n\t"
".weak VectorDC \n"
"VectorDC: \n\t"
".weak VectorE0 \n"
"VectorE0: \n\t"
".weak VectorE4 \n"
"VectorE4: \n\t"
".weak VectorE8 \n"
"VectorE8: \n\t"
".weak VectorEC \n"
"VectorEC: \n\t"
".weak VectorF0 \n"
"VectorF0: \n\t"
".weak VectorF4 \n"
"VectorF4: \n\t"
".weak VectorF8 \n"
"VectorF8: \n\t"
".weak VectorFC \n"
"VectorFC: \n\t"
".weak Vector100 \n"
"Vector100: \n\t"
".weak Vector104 \n"
"Vector104: \n\t"
".weak Vector108 \n"
"Vector108: \n\t"
".weak Vector10C \n"
"Vector10C: \n\t"
".weak Vector110 \n"
"Vector110: \n\t"
".weak Vector114 \n"
"Vector114: \n\t"
".weak Vector118 \n"
"Vector118: \n\t"
".weak Vector11C \n"
"Vector11C: \n\t"
".weak Vector120 \n"
"Vector120: \n\t"
".weak Vector124 \n"
"Vector124: \n\t"
".weak Vector128 \n"
"Vector128: \n\t"
".weak Vector12C \n"
"Vector12C: \n\t"
".weak Vector130 \n"
"Vector130: \n\t"
".weak Vector134 \n"
"Vector134: \n\t"
".weak Vector138 \n"
"Vector138: \n\t"
".weak Vector13C \n"
"Vector13C: \n\t"
".weak Vector140 \n"
"Vector140: \n\t"
".weak Vector144 \n"
"Vector144: \n\t"
".weak Vector148 \n"
"Vector148: \n\t"
".weak Vector14C \n"
"Vector14C: \n\t"
".weak NMIVector \nNMIVector: \n\t"
".weak HardFaultVector \nHardFaultVector: \n\t"
".weak MemManageVector \nMemManageVector: \n\t"
".weak BusFaultVector \nBusFaultVector: \n\t"
".weak UsageFaultVector \nUsageFaultVector: \n\t"
".weak Vector1C \nVector1C: \n\t"
".weak Vector20 \nVector20: \n\t"
".weak Vector24 \nVector24: \n\t"
".weak Vector28 \nVector28: \n\t"
".weak SVCallVector \nSVCallVector: \n\t"
".weak DebugMonitorVector \nDebugMonitorVector: \n\t"
".weak Vector34 \nVector34: \n\t"
".weak PendSVVector \nPendSVVector: \n\t"
".weak SysTickVector \nSysTickVector: \n\t"
".weak Vector40 \nVector40: \n\t"
".weak Vector44 \nVector44: \n\t"
".weak Vector48 \nVector48: \n\t"
".weak Vector4C \nVector4C: \n\t"
".weak Vector50 \nVector50: \n\t"
".weak Vector54 \nVector54: \n\t"
".weak Vector58 \nVector58: \n\t"
".weak Vector5C \nVector5C: \n\t"
".weak Vector60 \nVector60: \n\t"
".weak Vector64 \nVector64: \n\t"
".weak Vector68 \nVector68: \n\t"
".weak Vector6C \nVector6C: \n\t"
".weak Vector70 \nVector70: \n\t"
".weak Vector74 \nVector74: \n\t"
".weak Vector78 \nVector78: \n\t"
".weak Vector7C \nVector7C: \n\t"
".weak Vector80 \nVector80: \n\t"
".weak Vector84 \nVector84: \n\t"
".weak Vector88 \nVector88: \n\t"
".weak Vector8C \nVector8C: \n\t"
".weak Vector90 \nVector90: \n\t"
".weak Vector94 \nVector94: \n\t"
".weak Vector98 \nVector98: \n\t"
".weak Vector9C \nVector9C: \n\t"
".weak VectorA0 \nVectorA0: \n\t"
".weak VectorA4 \nVectorA4: \n\t"
".weak VectorA8 \nVectorA8: \n\t"
".weak VectorAC \nVectorAC: \n\t"
".weak VectorB0 \nVectorB0: \n\t"
".weak VectorB4 \nVectorB4: \n\t"
".weak VectorB8 \nVectorB8: \n\t"
".weak VectorBC \nVectorBC: \n\t"
".weak VectorC0 \nVectorC0: \n\t"
".weak VectorC4 \nVectorC4: \n\t"
".weak VectorC8 \nVectorC8: \n\t"
".weak VectorCC \nVectorCC: \n\t"
".weak VectorD0 \nVectorD0: \n\t"
".weak VectorD4 \nVectorD4: \n\t"
".weak VectorD8 \nVectorD8: \n\t"
".weak VectorDC \nVectorDC: \n\t"
".weak VectorE0 \nVectorE0: \n\t"
".weak VectorE4 \nVectorE4: \n\t"
".weak VectorE8 \nVectorE8: \n\t"
#if defined(STM32F10X_MD_VL) || defined(STM32F10X_HD) || \
defined(STM32F10X_XL) || defined(STM32F10X_CL)
".weak VectorEC \nVectorEC: \n\t"
".weak VectorF0 \nVectorF0: \n\t"
".weak VectorF4 \nVectorF4: \n\t"
#endif
#if defined(STM32F10X_HD) || defined(STM32F10X_XL) || defined(STM32F10X_CL)
".weak VectorF8 \nVectorF8: \n\t"
".weak VectorFC \nVectorFC: \n\t"
".weak Vector100 \nVector100: \n\t"
".weak Vector104 \nVector104: \n\t"
".weak Vector108 \nVector108: \n\t"
".weak Vector10C \nVector10C: \n\t"
".weak Vector110 \nVector110: \n\t"
".weak Vector114 \nVector114: \n\t"
".weak Vector118 \nVector118: \n\t"
".weak Vector11C \nVector11C: \n\t"
".weak Vector120 \nVector120: \n\t"
".weak Vector124 \nVector124: \n\t"
".weak Vector128 \nVector128: \n\t"
".weak Vector12C \nVector12C: \n\t"
#endif
#if defined(STM32F10X_CL)
".weak Vector130 \nVector130: \n\t"
".weak Vector134 \nVector134: \n\t"
".weak Vector138 \nVector138: \n\t"
".weak Vector13C \nVector13C: \n\t"
".weak Vector140 \nVector140: \n\t"
".weak Vector144 \nVector144: \n\t"
".weak Vector148 \nVector148: \n\t"
".weak Vector14C \nVector14C: \n\t"
#endif
);
while (TRUE)

View File

@ -71,8 +71,7 @@
- NEW: Added demo for the ST STM32VL-Discovery kit.
- CHANGE: Improved the STM32 HAL to support multiple sub-families, now it
is possible to test the presence of any single peripheral into the
specified STM32 device. Now in the board.h files the specific device
must be specified instead of the sub-family.
specified STM32 device.
- CHANGE: Separated dynamic threads code into dedicated files: chdynamic.c
and chdynamic.h.
- CHANGE: Moved the declaration of the variable pal_default_config from