diff --git a/os/hal/ports/STM32/LLD/SPIv1/driver_v2.mk b/os/hal/ports/STM32/LLD/SPIv1/driver_v2.mk index 03c4d02a0..60bf29698 100644 --- a/os/hal/ports/STM32/LLD/SPIv1/driver_v2.mk +++ b/os/hal/ports/STM32/LLD/SPIv1/driver_v2.mk @@ -1,8 +1,12 @@ ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_I2S TRUE,$(HALCONF)),) +PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c +endif ifneq ($(findstring HAL_USE_SPI TRUE,$(HALCONF)),) PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/hal_spi_v2_lld.c endif else +PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/hal_spi_v2_lld.c endif diff --git a/readme.txt b/readme.txt index c41498c6b..73b8cc85c 100644 --- a/readme.txt +++ b/readme.txt @@ -78,8 +78,8 @@ - NEW: Integrated FatFS with lwIP HTTPD, now it is possible to serve files using HTTP from a storage device. - NEW: Updated FatFS to version 0.14b. -- NEW: SPIv2 driver has been implemented on: STM32F0, STM32F3, STM32F7, - STM32G0, STM32G4, STM32L4, STM32L4+, STM32H7. +- NEW: SPIv2 driver has been implemented on: STM32F0, STM32F3, STM32F4, + STM32F7, STM32G0, STM32G4, STM32L4, STM32L4+, STM32H7. - NEW: New SPIv2 driver model, it is compatible with the previous SPI driver and introduces: better runtime errors handling, slave mode, data synchronization function, various other improvements. diff --git a/testhal/STM32/multi/SPI/cfg/stm32f407_discovery/portab.c b/testhal/STM32/multi/SPI/cfg/stm32f407_discovery/portab.c index 33aa6aac2..e29b5f80b 100644 --- a/testhal/STM32/multi/SPI/cfg/stm32f407_discovery/portab.c +++ b/testhal/STM32/multi/SPI/cfg/stm32f407_discovery/portab.c @@ -35,41 +35,48 @@ /*===========================================================================*/ void spi_circular_cb(SPIDriver *spip); +void spi_error_cb(SPIDriver *spip); /* * Circular SPI configuration (21MHz, CPHA=0, CPOL=0, MSb first). */ const SPIConfig c_spicfg = { - true, - spi_circular_cb, - GPIOB, - 12, - 0, - 0 + .circular = true, + .slave = false, + .data_cb = spi_circular_cb, + .error_cb = spi_error_cb, + .ssport = GPIOB, + .sspad = 12U, + .cr1 = 0U, + .cr2 = 0U }; /* * Maximum speed SPI configuration (21MHz, CPHA=0, CPOL=0, MSb first). */ const SPIConfig hs_spicfg = { - false, - NULL, - GPIOB, - 12, - 0, - 0 + .circular = false, + .slave = false, + .data_cb = NULL, + .error_cb = spi_error_cb, + .ssport = GPIOB, + .sspad = 12U, + .cr1 = 0U, + .cr2 = 0U }; /* * Low speed SPI configuration (328.125kHz, CPHA=0, CPOL=0, MSb first). */ const SPIConfig ls_spicfg = { - false, - NULL, - GPIOB, - 12, - SPI_CR1_BR_2 | SPI_CR1_BR_1, - 0 + .circular = false, + .slave = false, + .data_cb = NULL, + .error_cb = spi_error_cb, + .ssport = GPIOB, + .sspad = 12U, + .cr1 = SPI_CR1_BR_2 | SPI_CR1_BR_1, + .cr2 = 0U }; /*===========================================================================*/