From 36e66ea4f7dc9cbde7ddb1e5eb2e6dd87e32d015 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Thu, 26 Mar 2015 11:32:57 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7811 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/STM32/HAL-STM32F407-DISCOVERY/.cproject | 52 +++ demos/STM32/HAL-STM32F407-DISCOVERY/.project | 95 +++++ demos/STM32/HAL-STM32F407-DISCOVERY/Makefile | 199 +++++++++++ ...-DISCOVERY (OpenOCD, Flash and Run).launch | 52 +++ demos/STM32/HAL-STM32F407-DISCOVERY/halconf.h | 327 ++++++++++++++++++ demos/STM32/HAL-STM32F407-DISCOVERY/main.c | 49 +++ demos/STM32/HAL-STM32F407-DISCOVERY/mcuconf.h | 309 +++++++++++++++++ .../STM32/HAL-STM32F407-DISCOVERY/readme.txt | 26 ++ .../compilers/GCC/mk/startup_stm32f0xx.mk | 11 + .../compilers/GCC/mk/startup_stm32f1xx.mk | 11 + .../compilers/GCC/mk/startup_stm32f3xx.mk | 11 + .../compilers/GCC/mk/startup_stm32f4xx.mk | 11 + .../compilers/GCC/mk/startup_stm32l0xx.mk | 11 + .../compilers/GCC/mk/startup_stm32l1xx.mk | 11 + os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.h | 6 +- os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.h | 4 +- os/hal/ports/STM32/LLD/OTGv1/usb_lld.h | 4 +- os/hal/ports/STM32/LLD/SPIv1/i2s_lld.h | 4 +- os/hal/ports/STM32/LLD/SPIv1/spi_lld.h | 12 +- os/hal/ports/STM32/LLD/SPIv2/spi_lld.h | 6 +- os/hal/ports/STM32/LLD/TIMv1/gpt_lld.h | 24 +- os/hal/ports/STM32/LLD/TIMv1/icu_lld.h | 14 +- os/hal/ports/STM32/LLD/TIMv1/pwm_lld.h | 14 +- os/hal/ports/STM32/LLD/USARTv1/serial_lld.h | 12 +- os/hal/ports/STM32/LLD/USARTv1/uart_lld.h | 12 +- os/hal/ports/STM32/LLD/USARTv2/serial_lld.h | 12 +- os/hal/ports/STM32/LLD/USARTv2/uart_lld.h | 6 +- os/hal/ports/STM32/LLD/USBv1/usb_lld.h | 4 +- os/hal/ports/STM32/LLD/sdc_lld.h | 2 +- os/hal/ports/STM32/STM32F0xx/adc_lld.h | 4 +- os/hal/ports/STM32/STM32F37x/adc_lld.h | 16 +- os/hal/ports/STM32/STM32F3xx/adc_lld.h | 8 +- os/hal/ports/STM32/STM32L1xx/adc_lld.h | 4 +- 33 files changed, 1259 insertions(+), 84 deletions(-) create mode 100644 demos/STM32/HAL-STM32F407-DISCOVERY/.cproject create mode 100644 demos/STM32/HAL-STM32F407-DISCOVERY/.project create mode 100644 demos/STM32/HAL-STM32F407-DISCOVERY/Makefile create mode 100644 demos/STM32/HAL-STM32F407-DISCOVERY/debug/HAL-STM32F407-DISCOVERY (OpenOCD, Flash and Run).launch create mode 100644 demos/STM32/HAL-STM32F407-DISCOVERY/halconf.h create mode 100644 demos/STM32/HAL-STM32F407-DISCOVERY/main.c create mode 100644 demos/STM32/HAL-STM32F407-DISCOVERY/mcuconf.h create mode 100644 demos/STM32/HAL-STM32F407-DISCOVERY/readme.txt create mode 100644 os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk create mode 100644 os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk create mode 100644 os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk create mode 100644 os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk create mode 100644 os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk create mode 100644 os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk diff --git a/demos/STM32/HAL-STM32F407-DISCOVERY/.cproject b/demos/STM32/HAL-STM32F407-DISCOVERY/.cproject new file mode 100644 index 000000000..2b6cc5222 --- /dev/null +++ b/demos/STM32/HAL-STM32F407-DISCOVERY/.cproject @@ -0,0 +1,52 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/demos/STM32/HAL-STM32F407-DISCOVERY/.project b/demos/STM32/HAL-STM32F407-DISCOVERY/.project new file mode 100644 index 000000000..fbfc8f46a --- /dev/null +++ b/demos/STM32/HAL-STM32F407-DISCOVERY/.project @@ -0,0 +1,95 @@ + + + HAL-STM32F407-DISCOVERY + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -j1 + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/os/hal/boards/ST_STM32F4_DISCOVERY + + + os + 2 + CHIBIOS/os + + + test + 2 + CHIBIOS/test + + + diff --git a/demos/STM32/HAL-STM32F407-DISCOVERY/Makefile b/demos/STM32/HAL-STM32F407-DISCOVERY/Makefile new file mode 100644 index 000000000..467505d2c --- /dev/null +++ b/demos/STM32/HAL-STM32F407-DISCOVERY/Makefile @@ -0,0 +1,199 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO) +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/hal/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/osal/os-less/ARMCMx/osal.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(STARTUPSRC) \ + $(HALSRC) \ + $(OSALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(STARTUPASM) + +INCDIR = $(STARTUPINC) $(HALINC) $(OSALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +AR = $(TRGT)ar +OD = $(TRGT)objdump +SZ = $(TRGT)size +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC +include $(RULESPATH)/rules.mk diff --git a/demos/STM32/HAL-STM32F407-DISCOVERY/debug/HAL-STM32F407-DISCOVERY (OpenOCD, Flash and Run).launch b/demos/STM32/HAL-STM32F407-DISCOVERY/debug/HAL-STM32F407-DISCOVERY (OpenOCD, Flash and Run).launch new file mode 100644 index 000000000..d39095496 --- /dev/null +++ b/demos/STM32/HAL-STM32F407-DISCOVERY/debug/HAL-STM32F407-DISCOVERY (OpenOCD, Flash and Run).launch @@ -0,0 +1,52 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/demos/STM32/HAL-STM32F407-DISCOVERY/halconf.h b/demos/STM32/HAL-STM32F407-DISCOVERY/halconf.h new file mode 100644 index 000000000..fd040f82f --- /dev/null +++ b/demos/STM32/HAL-STM32F407-DISCOVERY/halconf.h @@ -0,0 +1,327 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/demos/STM32/HAL-STM32F407-DISCOVERY/main.c b/demos/STM32/HAL-STM32F407-DISCOVERY/main.c new file mode 100644 index 000000000..a59c0b8ff --- /dev/null +++ b/demos/STM32/HAL-STM32F407-DISCOVERY/main.c @@ -0,0 +1,49 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + */ + halInit(); + + /* + * Activates the serial driver 2 using the driver default configuration. + * PA2(TX) and PA3(RX) are routed to USART2. + */ + sdStart(&SD2, NULL); + palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOA, 3, PAL_MODE_ALTERNATE(7)); + + /* + * Normal main() thread activity, in this demo it just performs + * a shell respawn upon its termination. + */ + while (true) { + palSetPad(GPIOD, GPIOD_LED3); /* Orange. */ + osalThreadSleepMilliseconds(500); + palClearPad(GPIOD, GPIOD_LED3); /* Orange. */ + osalThreadSleepMilliseconds(500); + } +} diff --git a/demos/STM32/HAL-STM32F407-DISCOVERY/mcuconf.h b/demos/STM32/HAL-STM32F407-DISCOVERY/mcuconf.h new file mode 100644 index 000000000..21e8e1931 --- /dev/null +++ b/demos/STM32/HAL-STM32F407-DISCOVERY/mcuconf.h @@ -0,0 +1,309 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _MCUCONF_H_ +#define _MCUCONF_H_ + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F4xx_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2SSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 + +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 + +/* + * SDC driver system settings. + */ +#define STM32_SDC_SDIO_DMA_PRIORITY 3 +#define STM32_SDC_SDIO_IRQ_PRIORITY 9 +#define STM32_SDC_WRITE_TIMEOUT_MS 250 +#define STM32_SDC_READ_TIMEOUT_MS 25 +#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10 +#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE +#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 8 +#define STM32_ST_USE_TIMER 2 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_UART4 FALSE +#define STM32_UART_USE_UART5 FALSE +#define STM32_UART_USE_USART6 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_UART4_IRQ_PRIORITY 12 +#define STM32_UART_UART5_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_UART4_DMA_PRIORITY 0 +#define STM32_UART_UART5_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + +#endif /* _MCUCONF_H_ */ diff --git a/demos/STM32/HAL-STM32F407-DISCOVERY/readme.txt b/demos/STM32/HAL-STM32F407-DISCOVERY/readme.txt new file mode 100644 index 000000000..379b9a16b --- /dev/null +++ b/demos/STM32/HAL-STM32F407-DISCOVERY/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/HAL port for ARM-Cortex-M4 STM32F407. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an ST STM32F4-Discovery board. + +** The Demo ** + +The demo is an example of HAL use without underlying operating system, it uses +a bare-metal OSAL implementation for ARMCMx. + +** Build Procedure ** + +An arm-none-eabi-gcc compliant toolchain is required. Build by giving the "make" +command in the project directory. + +** Notes ** + +Some files used by the demo are not part of ChibiOS but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk new file mode 100644 index 000000000..f5974bd39 --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk @@ -0,0 +1,11 @@ +# List of the ChibiOS generic STM32F0xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s + +STARTUPINC = $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32F0xx \ + $(CHIBIOS)/os/ext/CMSIS/include \ + $(CHIBIOS)/os/ext/CMSIS/ST + +STARTUPLD = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk new file mode 100644 index 000000000..d9ee242b2 --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk @@ -0,0 +1,11 @@ +# List of the ChibiOS generic STM32F1xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s + +STARTUPINC = $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32F1xx \ + $(CHIBIOS)/os/ext/CMSIS/include \ + $(CHIBIOS)/os/ext/CMSIS/ST + +STARTUPLD = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk new file mode 100644 index 000000000..bfbb4f066 --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk @@ -0,0 +1,11 @@ +# List of the ChibiOS generic STM32F3xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s + +STARTUPINC = $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32F3xx \ + $(CHIBIOS)/os/ext/CMSIS/include \ + $(CHIBIOS)/os/ext/CMSIS/ST + +STARTUPLD = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk new file mode 100644 index 000000000..af4c99ada --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk @@ -0,0 +1,11 @@ +# List of the ChibiOS generic STM32F4xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s + +STARTUPINC = $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32F4xx \ + $(CHIBIOS)/os/ext/CMSIS/include \ + $(CHIBIOS)/os/ext/CMSIS/ST + +STARTUPLD = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk new file mode 100644 index 000000000..4539b970e --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk @@ -0,0 +1,11 @@ +# List of the ChibiOS generic STM32L0xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s + +STARTUPINC = $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32L0xx \ + $(CHIBIOS)/os/ext/CMSIS/include \ + $(CHIBIOS)/os/ext/CMSIS/ST + +STARTUPLD = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk new file mode 100644 index 000000000..96ec94c13 --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk @@ -0,0 +1,11 @@ +# List of the ChibiOS generic STM32L1xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s + +STARTUPINC = $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32L1xx \ + $(CHIBIOS)/os/ext/CMSIS/include \ + $(CHIBIOS)/os/ext/CMSIS/ST + +STARTUPLD = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.h b/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.h index 24c0ed830..0c027b50c 100644 --- a/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.h +++ b/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.h @@ -235,17 +235,17 @@ #endif #if STM32_I2C_USE_I2C1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_I2C_I2C1_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_I2C_I2C1_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to I2C1" #endif #if STM32_I2C_USE_I2C2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_I2C_I2C2_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_I2C_I2C2_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to I2C2" #endif #if STM32_I2C_USE_I2C3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_I2C_I2C3_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_I2C_I2C3_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to I2C3" #endif diff --git a/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.h b/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.h index 34c66570f..b5d07bd2c 100644 --- a/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.h +++ b/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.h @@ -146,12 +146,12 @@ #endif #if STM32_I2C_USE_I2C1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_I2C_I2C1_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_I2C_I2C1_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to I2C1" #endif #if STM32_I2C_USE_I2C2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_I2C_I2C2_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_I2C_I2C2_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to I2C2" #endif diff --git a/os/hal/ports/STM32/LLD/OTGv1/usb_lld.h b/os/hal/ports/STM32/LLD/OTGv1/usb_lld.h index 6051fd130..22b5509c8 100644 --- a/os/hal/ports/STM32/LLD/OTGv1/usb_lld.h +++ b/os/hal/ports/STM32/LLD/OTGv1/usb_lld.h @@ -159,12 +159,12 @@ #endif #if STM32_USB_USE_OTG1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_USB_OTG1_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_USB_OTG1_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to OTG1" #endif #if STM32_USB_USE_OTG2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_USB_OTG2_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_USB_OTG2_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to OTG2" #endif diff --git a/os/hal/ports/STM32/LLD/SPIv1/i2s_lld.h b/os/hal/ports/STM32/LLD/SPIv1/i2s_lld.h index 2c788e65a..3e007b7db 100644 --- a/os/hal/ports/STM32/LLD/SPIv1/i2s_lld.h +++ b/os/hal/ports/STM32/LLD/SPIv1/i2s_lld.h @@ -157,12 +157,12 @@ #endif #if STM32_I2S_USE_SPI2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_I2S_SPI2_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_I2S_SPI2_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SPI2" #endif #if STM32_I2S_USE_SPI3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_I2S_SPI3_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_I2S_SPI3_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SPI3" #endif diff --git a/os/hal/ports/STM32/LLD/SPIv1/spi_lld.h b/os/hal/ports/STM32/LLD/SPIv1/spi_lld.h index dedb62b95..2aab01daf 100644 --- a/os/hal/ports/STM32/LLD/SPIv1/spi_lld.h +++ b/os/hal/ports/STM32/LLD/SPIv1/spi_lld.h @@ -237,32 +237,32 @@ #endif #if STM32_SPI_USE_SPI1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SPI_SPI1_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SPI_SPI1_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SPI1" #endif #if STM32_SPI_USE_SPI2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SPI_SPI2_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SPI_SPI2_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SPI2" #endif #if STM32_SPI_USE_SPI3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SPI_SPI3_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SPI_SPI3_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SPI3" #endif #if STM32_SPI_USE_SPI4 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SPI_SPI4_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SPI_SPI4_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SPI4" #endif #if STM32_SPI_USE_SPI5 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SPI_SPI5_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SPI_SPI5_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SPI5" #endif #if STM32_SPI_USE_SPI6 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SPI_SPI6_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SPI_SPI6_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SPI6" #endif diff --git a/os/hal/ports/STM32/LLD/SPIv2/spi_lld.h b/os/hal/ports/STM32/LLD/SPIv2/spi_lld.h index 9cc375f83..bf7ddf700 100644 --- a/os/hal/ports/STM32/LLD/SPIv2/spi_lld.h +++ b/os/hal/ports/STM32/LLD/SPIv2/spi_lld.h @@ -146,17 +146,17 @@ #endif #if STM32_SPI_USE_SPI1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SPI_SPI1_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SPI_SPI1_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SPI1" #endif #if STM32_SPI_USE_SPI2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SPI_SPI2_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SPI_SPI2_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SPI2" #endif #if STM32_SPI_USE_SPI3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SPI_SPI3_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SPI_SPI3_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SPI3" #endif diff --git a/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.h b/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.h index ab32a2e76..94ee3ffc6 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.h +++ b/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.h @@ -296,62 +296,62 @@ #endif #if STM32_GPT_USE_TIM1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM1_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM1_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM1" #endif #if STM32_GPT_USE_TIM2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM2_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM2_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM2" #endif #if STM32_GPT_USE_TIM3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM3_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM3_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM3" #endif #if STM32_GPT_USE_TIM4 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM4_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM4_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM4" #endif #if STM32_GPT_USE_TIM5 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM5_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM5_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM5" #endif #if STM32_GPT_USE_TIM6 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM6_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM6_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM6" #endif #if STM32_GPT_USE_TIM7 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM7_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM7_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM7" #endif #if STM32_GPT_USE_TIM8 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM8_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM8_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM8" #endif #if STM32_GPT_USE_TIM9 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM9_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM9_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM9" #endif #if STM32_GPT_USE_TIM11 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM11_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM11_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM11" #endif #if STM32_GPT_USE_TIM12 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM12_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM12_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM12" #endif #if STM32_GPT_USE_TIM14 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM14_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_GPT_TIM14_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM14" #endif diff --git a/os/hal/ports/STM32/LLD/TIMv1/icu_lld.h b/os/hal/ports/STM32/LLD/TIMv1/icu_lld.h index c6ee12606..1b21f8246 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/icu_lld.h +++ b/os/hal/ports/STM32/LLD/TIMv1/icu_lld.h @@ -194,37 +194,37 @@ #endif #if STM32_ICU_USE_TIM1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ICU_TIM1_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ICU_TIM1_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM1" #endif #if STM32_ICU_USE_TIM2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ICU_TIM2_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ICU_TIM2_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM2" #endif #if STM32_ICU_USE_TIM3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ICU_TIM3_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ICU_TIM3_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM3" #endif #if STM32_ICU_USE_TIM4 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ICU_TIM4_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ICU_TIM4_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM4" #endif #if STM32_ICU_USE_TIM5 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ICU_TIM5_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ICU_TIM5_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM5" #endif #if STM32_ICU_USE_TIM8 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ICU_TIM8_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ICU_TIM8_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM8" #endif #if STM32_ICU_USE_TIM9 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ICU_TIM9_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ICU_TIM9_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM9" #endif diff --git a/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.h b/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.h index 193b91bf0..9956024ac 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.h +++ b/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.h @@ -249,37 +249,37 @@ #endif #if STM32_PWM_USE_TIM1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_PWM_TIM1_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_PWM_TIM1_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM1" #endif #if STM32_PWM_USE_TIM2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_PWM_TIM2_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_PWM_TIM2_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM2" #endif #if STM32_PWM_USE_TIM3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_PWM_TIM3_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_PWM_TIM3_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM3" #endif #if STM32_PWM_USE_TIM4 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_PWM_TIM4_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_PWM_TIM4_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM4" #endif #if STM32_PWM_USE_TIM5 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_PWM_TIM5_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_PWM_TIM5_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM5" #endif #if STM32_PWM_USE_TIM8 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_PWM_TIM8_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_PWM_TIM8_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM8" #endif #if STM32_PWM_USE_TIM9 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_PWM_TIM9_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_PWM_TIM9_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM9" #endif diff --git a/os/hal/ports/STM32/LLD/USARTv1/serial_lld.h b/os/hal/ports/STM32/LLD/USARTv1/serial_lld.h index 221619021..b8f669776 100644 --- a/os/hal/ports/STM32/LLD/USARTv1/serial_lld.h +++ b/os/hal/ports/STM32/LLD/USARTv1/serial_lld.h @@ -171,32 +171,32 @@ #endif #if STM32_SERIAL_USE_USART1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SERIAL_USART1_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART1_PRIORITY) #error "Invalid IRQ priority assigned to USART1" #endif #if STM32_SERIAL_USE_USART2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SERIAL_USART2_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART2_PRIORITY) #error "Invalid IRQ priority assigned to USART2" #endif #if STM32_SERIAL_USE_USART3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SERIAL_USART3_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART3_PRIORITY) #error "Invalid IRQ priority assigned to USART3" #endif #if STM32_SERIAL_USE_UART4 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SERIAL_UART4_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART4_PRIORITY) #error "Invalid IRQ priority assigned to UART4" #endif #if STM32_SERIAL_USE_UART5 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SERIAL_UART5_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART5_PRIORITY) #error "Invalid IRQ priority assigned to UART5" #endif #if STM32_SERIAL_USE_USART6 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SERIAL_USART6_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART6_PRIORITY) #error "Invalid IRQ priority assigned to USART6" #endif diff --git a/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h b/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h index 0d673c6d0..3f3bef590 100644 --- a/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h +++ b/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h @@ -252,32 +252,32 @@ #endif #if STM32_UART_USE_USART1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_UART_USART1_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_UART_USART1_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to USART1" #endif #if STM32_UART_USE_USART2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_UART_USART2_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_UART_USART2_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to USART2" #endif #if STM32_UART_USE_USART3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_UART_USART3_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_UART_USART3_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to USART3" #endif #if STM32_UART_USE_UART4 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_UART_UART4_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_UART_UART4_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to UART4" #endif #if STM32_UART_USE_UART5 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_UART_UART5_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_UART_UART5_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to UART5" #endif #if STM32_UART_USE_USART6 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_UART_USART6_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_UART_USART6_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to USART6" #endif diff --git a/os/hal/ports/STM32/LLD/USARTv2/serial_lld.h b/os/hal/ports/STM32/LLD/USARTv2/serial_lld.h index 103fa1ebc..522913aae 100644 --- a/os/hal/ports/STM32/LLD/USARTv2/serial_lld.h +++ b/os/hal/ports/STM32/LLD/USARTv2/serial_lld.h @@ -171,32 +171,32 @@ #endif #if STM32_SERIAL_USE_USART1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SERIAL_USART1_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART1_PRIORITY) #error "Invalid IRQ priority assigned to USART1" #endif #if STM32_SERIAL_USE_USART2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SERIAL_USART2_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART2_PRIORITY) #error "Invalid IRQ priority assigned to USART2" #endif #if STM32_SERIAL_USE_USART3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SERIAL_USART3_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART3_PRIORITY) #error "Invalid IRQ priority assigned to USART3" #endif #if STM32_SERIAL_USE_UART4 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SERIAL_UART4_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART4_PRIORITY) #error "Invalid IRQ priority assigned to UART4" #endif #if STM32_SERIAL_USE_UART5 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SERIAL_UART5_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART5_PRIORITY) #error "Invalid IRQ priority assigned to UART5" #endif #if STM32_SERIAL_USE_USART6 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SERIAL_USART6_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART6_PRIORITY) #error "Invalid IRQ priority assigned to USART6" #endif diff --git a/os/hal/ports/STM32/LLD/USARTv2/uart_lld.h b/os/hal/ports/STM32/LLD/USARTv2/uart_lld.h index 2e3e1a747..ebd2e34fd 100644 --- a/os/hal/ports/STM32/LLD/USARTv2/uart_lld.h +++ b/os/hal/ports/STM32/LLD/USARTv2/uart_lld.h @@ -149,17 +149,17 @@ #endif #if STM32_UART_USE_USART1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_UART_USART1_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_UART_USART1_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to USART1" #endif #if STM32_UART_USE_USART2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_UART_USART2_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_UART_USART2_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to USART2" #endif #if STM32_UART_USE_USART3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_UART_USART3_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_UART_USART3_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to USART3" #endif diff --git a/os/hal/ports/STM32/LLD/USBv1/usb_lld.h b/os/hal/ports/STM32/LLD/USBv1/usb_lld.h index ba4edfd6a..d1bb6b75c 100644 --- a/os/hal/ports/STM32/LLD/USBv1/usb_lld.h +++ b/os/hal/ports/STM32/LLD/USBv1/usb_lld.h @@ -102,12 +102,12 @@ #if STM32_USB_USE_USB1 && \ (STM32_USB1_HP_NUMBER != STM32_USB1_LP_NUMBER) && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_USB_USB1_HP_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_USB_USB1_HP_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to USB HP" #endif #if STM32_USB_USE_USB1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_USB_USB1_LP_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_USB_USB1_LP_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to USB LP" #endif diff --git a/os/hal/ports/STM32/LLD/sdc_lld.h b/os/hal/ports/STM32/LLD/sdc_lld.h index 719fe90fa..8b960fb97 100644 --- a/os/hal/ports/STM32/LLD/sdc_lld.h +++ b/os/hal/ports/STM32/LLD/sdc_lld.h @@ -109,7 +109,7 @@ #error "SDIO not present in the selected device" #endif -#if !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_SDC_SDIO_IRQ_PRIORITY) +#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SDC_SDIO_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SDIO" #endif diff --git a/os/hal/ports/STM32/STM32F0xx/adc_lld.h b/os/hal/ports/STM32/STM32F0xx/adc_lld.h index 7d9fe469f..8b9141a76 100644 --- a/os/hal/ports/STM32/STM32F0xx/adc_lld.h +++ b/os/hal/ports/STM32/STM32F0xx/adc_lld.h @@ -125,12 +125,12 @@ #endif #if STM32_ADC_USE_ADC1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to ADC1" #endif #if STM32_ADC_USE_ADC1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_ADC1_DMA_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_ADC1_DMA_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to ADC1 DMA" #endif diff --git a/os/hal/ports/STM32/STM32F37x/adc_lld.h b/os/hal/ports/STM32/STM32F37x/adc_lld.h index 6833af814..ce20e4e1b 100644 --- a/os/hal/ports/STM32/STM32F37x/adc_lld.h +++ b/os/hal/ports/STM32/STM32F37x/adc_lld.h @@ -273,12 +273,12 @@ #endif #if STM32_ADC_USE_ADC1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_ADC1_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_ADC1_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to ADC1" #endif #if STM32_ADC_USE_ADC1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_ADC1_DMA_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_ADC1_DMA_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to ADC1 DMA" #endif @@ -288,12 +288,12 @@ #endif #if STM32_ADC_USE_SDADC1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_SDADC1_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_SDADC1_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SDADC1" #endif #if STM32_ADC_USE_SDADC1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_SDADC1_DMA_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_SDADC1_DMA_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SDADC1 DMA" #endif @@ -303,12 +303,12 @@ #endif #if STM32_ADC_USE_SDADC2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_SDADC2_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_SDADC2_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SDADC2" #endif #if STM32_ADC_USE_SDADC2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_SDADC2_DMA_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_SDADC2_DMA_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SDADC2 DMA" #endif @@ -318,12 +318,12 @@ #endif #if STM32_ADC_USE_SDADC3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_SDADC3_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_SDADC3_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SDADC3" #endif #if STM32_ADC_USE_SDADC3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_SDADC3_DMA_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_SDADC3_DMA_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SDADC3 DMA" #endif diff --git a/os/hal/ports/STM32/STM32F3xx/adc_lld.h b/os/hal/ports/STM32/STM32F3xx/adc_lld.h index f1ba3f4b2..ffaf94a1c 100644 --- a/os/hal/ports/STM32/STM32F3xx/adc_lld.h +++ b/os/hal/ports/STM32/STM32F3xx/adc_lld.h @@ -265,12 +265,12 @@ #endif #if STM32_ADC_USE_ADC1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_ADC12_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_ADC12_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to ADC1" #endif #if STM32_ADC_USE_ADC1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_ADC12_DMA_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_ADC12_DMA_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to ADC1 DMA" #endif @@ -280,12 +280,12 @@ #endif #if STM32_ADC_USE_ADC3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_ADC34_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_ADC34_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to ADC3" #endif #if STM32_ADC_USE_ADC3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_ADC34_DMA_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_ADC34_DMA_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to ADC3 DMA" #endif diff --git a/os/hal/ports/STM32/STM32L1xx/adc_lld.h b/os/hal/ports/STM32/STM32L1xx/adc_lld.h index 453ccf4f4..acc2493f2 100644 --- a/os/hal/ports/STM32/STM32L1xx/adc_lld.h +++ b/os/hal/ports/STM32/STM32L1xx/adc_lld.h @@ -157,12 +157,12 @@ #endif #if STM32_ADC_USE_ADC1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to ADC1" #endif #if STM32_ADC_USE_ADC1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_ADC1_DMA_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_ADC1_DMA_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to ADC1 DMA" #endif