diff --git a/demos/ARM7-AT91SAM7S-FATFS-GCC/Makefile b/demos/ARM7-AT91SAM7S-FATFS-GCC/Makefile index 576b7ecbc..58fe3829a 100644 --- a/demos/ARM7-AT91SAM7S-FATFS-GCC/Makefile +++ b/demos/ARM7-AT91SAM7S-FATFS-GCC/Makefile @@ -47,7 +47,7 @@ CHIBIOS = ../.. include $(CHIBIOS)/boards/OLIMEX_SAM7_P256/board.mk include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk +include $(CHIBIOS)/os/ports/GCC/ARM/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk include $(CHIBIOS)/ext/fatfs/fatfs.mk @@ -91,13 +91,13 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7/vectors.s + $(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7/vectors.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ $(FATFSINC) \ $(CHIBIOS)/os/various \ - $(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7 + $(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7 # # Project, sources and paths diff --git a/demos/ARM7-AT91SAM7S-GCC/Makefile b/demos/ARM7-AT91SAM7S-GCC/Makefile index fcb9ae999..515224c81 100644 --- a/demos/ARM7-AT91SAM7S-GCC/Makefile +++ b/demos/ARM7-AT91SAM7S-GCC/Makefile @@ -47,7 +47,7 @@ CHIBIOS = ../.. include $(CHIBIOS)/boards/OLIMEX_SAM7_P256/board.mk include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk +include $(CHIBIOS)/os/ports/GCC/ARM/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk @@ -87,12 +87,12 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7/vectors.s + $(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7/vectors.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ $(CHIBIOS)/os/various \ - $(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7 + $(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7 # # Project, sources and paths diff --git a/demos/ARM7-AT91SAM7X-FATFS-GCC/Makefile b/demos/ARM7-AT91SAM7X-FATFS-GCC/Makefile index c74d12ab6..6b1542c2c 100644 --- a/demos/ARM7-AT91SAM7X-FATFS-GCC/Makefile +++ b/demos/ARM7-AT91SAM7X-FATFS-GCC/Makefile @@ -47,7 +47,7 @@ CHIBIOS = ../.. include $(CHIBIOS)/boards/OLIMEX_SAM7_EX256/board.mk include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk +include $(CHIBIOS)/os/ports/GCC/ARM/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk include $(CHIBIOS)/ext/fatfs/fatfs.mk @@ -91,13 +91,13 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7/vectors.s + $(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7/vectors.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ $(FATFSINC) \ $(CHIBIOS)/os/various \ - $(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7 + $(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7 # # Project, sources and paths diff --git a/demos/ARM7-AT91SAM7X-GCC/Makefile b/demos/ARM7-AT91SAM7X-GCC/Makefile index f9db0679b..e6480eb1c 100644 --- a/demos/ARM7-AT91SAM7X-GCC/Makefile +++ b/demos/ARM7-AT91SAM7X-GCC/Makefile @@ -47,7 +47,7 @@ CHIBIOS = ../.. include $(CHIBIOS)/boards/OLIMEX_SAM7_EX256/board.mk include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk +include $(CHIBIOS)/os/ports/GCC/ARM/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk @@ -87,12 +87,12 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7/vectors.s + $(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7/vectors.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ $(CHIBIOS)/os/various \ - $(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7 + $(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7 # # Project, sources and paths diff --git a/demos/ARM7-AT91SAM7X-LWIP-GCC/Makefile b/demos/ARM7-AT91SAM7X-LWIP-GCC/Makefile index 3890b27ed..4caf96ebf 100644 --- a/demos/ARM7-AT91SAM7X-LWIP-GCC/Makefile +++ b/demos/ARM7-AT91SAM7X-LWIP-GCC/Makefile @@ -47,7 +47,7 @@ CHIBIOS = ../.. include $(CHIBIOS)/boards/OLIMEX_SAM7_EX256/board.mk include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk +include $(CHIBIOS)/os/ports/GCC/ARM/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk include ./lwip/lwip.mk @@ -96,12 +96,12 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7/vectors.s + $(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7/vectors.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) $(LWINC) \ $(CHIBIOS)/os/various \ - $(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7 \ + $(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7 \ ./lwip # diff --git a/demos/ARM7-AT91SAM7X-UIP-GCC/Makefile b/demos/ARM7-AT91SAM7X-UIP-GCC/Makefile index 641cbdb76..bad6e49f8 100644 --- a/demos/ARM7-AT91SAM7X-UIP-GCC/Makefile +++ b/demos/ARM7-AT91SAM7X-UIP-GCC/Makefile @@ -47,7 +47,7 @@ CHIBIOS = ../.. include $(CHIBIOS)/boards/OLIMEX_SAM7_EX256/board.mk include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk +include $(CHIBIOS)/os/ports/GCC/ARM/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk @@ -100,12 +100,12 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7/vectors.s + $(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7/vectors.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ $(CHIBIOS)/os/various \ - $(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7 \ + $(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7 \ ./web $(CHIBIOS)/ext/uip-1.0/uip $(CHIBIOS)/ext/uip-1.0/apps/webserver # diff --git a/demos/ARM7-LPC214x-FATFS-GCC/Makefile b/demos/ARM7-LPC214x-FATFS-GCC/Makefile index 99ff790e9..d69954793 100644 --- a/demos/ARM7-LPC214x-FATFS-GCC/Makefile +++ b/demos/ARM7-LPC214x-FATFS-GCC/Makefile @@ -47,7 +47,7 @@ CHIBIOS = ../.. include $(CHIBIOS)/boards/OLIMEX_LPC_P2148/board.mk include $(CHIBIOS)/os/hal/platforms/LPC214x/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk +include $(CHIBIOS)/os/ports/GCC/ARM/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk include $(CHIBIOS)/ext/fatfs/fatfs.mk @@ -92,13 +92,13 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARM7/LPC214x/vectors.s + $(CHIBIOS)/os/ports/GCC/ARM/LPC214x/vectors.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ $(FATFSINC) \ $(CHIBIOS)/os/various \ - $(CHIBIOS)/os/ports/GCC/ARM7/LPC214x + $(CHIBIOS)/os/ports/GCC/ARM/LPC214x # # Project, sources and paths diff --git a/demos/ARM7-LPC214x-G++/Makefile b/demos/ARM7-LPC214x-G++/Makefile index 549fd8f1f..118ec0cae 100644 --- a/demos/ARM7-LPC214x-G++/Makefile +++ b/demos/ARM7-LPC214x-G++/Makefile @@ -47,7 +47,7 @@ CHIBIOS = ../.. include $(CHIBIOS)/boards/OLIMEX_LPC_P2148/board.mk include $(CHIBIOS)/os/hal/platforms/LPC214x/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk +include $(CHIBIOS)/os/ports/GCC/ARM/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk @@ -87,12 +87,12 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARM7/LPC214x/vectors.s + $(CHIBIOS)/os/ports/GCC/ARM/LPC214x/vectors.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ $(CHIBIOS)/os/various \ - $(CHIBIOS)/os/ports/GCC/ARM7/LPC214x + $(CHIBIOS)/os/ports/GCC/ARM/LPC214x # # Project, sources and paths diff --git a/demos/ARM7-LPC214x-GCC/Makefile b/demos/ARM7-LPC214x-GCC/Makefile index 99b7202cd..ac9a4d653 100644 --- a/demos/ARM7-LPC214x-GCC/Makefile +++ b/demos/ARM7-LPC214x-GCC/Makefile @@ -47,7 +47,7 @@ CHIBIOS = ../.. include $(CHIBIOS)/boards/OLIMEX_LPC_P2148/board.mk include $(CHIBIOS)/os/hal/platforms/LPC214x/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk +include $(CHIBIOS)/os/ports/GCC/ARM/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk @@ -87,12 +87,12 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARM7/LPC214x/vectors.s + $(CHIBIOS)/os/ports/GCC/ARM/LPC214x/vectors.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ $(CHIBIOS)/os/various \ - $(CHIBIOS)/os/ports/GCC/ARM7/LPC214x + $(CHIBIOS)/os/ports/GCC/ARM/LPC214x # # Project, sources and paths diff --git a/docs/Doxyfile b/docs/Doxyfile index 37e3a152f..a4d7719c7 100644 --- a/docs/Doxyfile +++ b/docs/Doxyfile @@ -616,13 +616,15 @@ INPUT = ../docs/src \ ../os/kernel/src \ ../os/kernel/templates \ ../os/ports \ - ../os/ports/GCC/AVR \ ../os/ports/GCC/ARM \ + ../os/ports/GCC/ARM\LPC214x \ + ../os/ports/GCC/ARM\AT91SAM7 \ ../os/ports/GCC/ARMCMx \ ../os/ports/GCC/ARMCMx/STM32 \ ../os/ports/GCC/ARMCMx/LPC11xx \ ../os/ports/GCC/ARMCMx/LPC13xx \ ../os/ports/GCC/PPC \ + ../os/ports/GCC/AVR \ ../os/ports/GCC/MSP430 \ ../os/ports/cosmic/STM8 \ ../os/ports/RC/STM8 \ @@ -640,7 +642,8 @@ INPUT = ../docs/src \ ../os/hal/platforms/MSP430/platform.dox \ ../os/hal/platforms/SPC56x/platform.dox \ ../os/hal/platforms/STM32/platform.dox \ - ../os/hal/platforms/STM8/platform.dox \ + ../os/hal/platforms/STM8L/platform.dox \ + ../os/hal/platforms/STM8S/platform.dox \ ../os/various \ ../test \ ../ext/ext.dox diff --git a/os/hal/platforms/LPC214x/vic.c b/os/hal/platforms/LPC214x/vic.c index 97dbf4851..f1b75aa80 100644 --- a/os/hal/platforms/LPC214x/vic.c +++ b/os/hal/platforms/LPC214x/vic.c @@ -26,6 +26,7 @@ */ #include "ch.h" +#include "hal.h" /** * @brief VIC Initialization. diff --git a/os/hal/platforms/STM8L/platform.dox b/os/hal/platforms/STM8L/platform.dox index 8646b5978..b1b74251e 100644 --- a/os/hal/platforms/STM8L/platform.dox +++ b/os/hal/platforms/STM8L/platform.dox @@ -45,7 +45,6 @@ * @details The STM8L PAL driver uses the GPIO peripherals. * * @section stm8l_pal_1 Supported HW resources - * - AFIO. * - GPIOA. * - GPIOB. * - GPIOC. diff --git a/os/hal/platforms/STM8S/platform.dox b/os/hal/platforms/STM8S/platform.dox index 2bf6f73a3..d05bb4af6 100644 --- a/os/hal/platforms/STM8S/platform.dox +++ b/os/hal/platforms/STM8S/platform.dox @@ -18,7 +18,7 @@ */ /** - * @defgroup STM8S STM8Sx Drivers + * @defgroup STM8S STM8S Drivers * @details This section describes all the supported drivers on the STM8S * platform and the implementation details of the single drivers. * @@ -44,7 +44,6 @@ * @details The STM8S PAL driver uses the GPIO peripherals. * * @section stm8s_pal_1 Supported HW resources - * - AFIO. * - GPIOA. * - GPIOB. * - GPIOC. diff --git a/os/ports/GCC/ARM/AT91SAM7/armparams.h b/os/ports/GCC/ARM/AT91SAM7/armparams.h new file mode 100644 index 000000000..8b53605ea --- /dev/null +++ b/os/ports/GCC/ARM/AT91SAM7/armparams.h @@ -0,0 +1,55 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file ARM/AT91SAM7/armparams.h + * @brief ARM7 AT91SAM7 Specific Parameters. + * + * @defgroup ARM_AT91SAM7 AT91SAM7 Specific Parameters + * @ingroup ARM_SPECIFIC + * @details This file contains the ARM specific parameters for the + * AT91SAM7 platform. + * @{ + */ + +#ifndef _ARMPARAMS_H_ +#define _ARMPARAMS_H_ + +/** + * @brief ARM core model. + */ +#define ARM_CORE ARM_CORE_ARM7TDMI + +/** + * @brief AT91SAM7-specific wait for interrupt. + * @details This implementation writes 1 into the PMC_SCDR register. + */ +#if !defined(port_wait_for_interrupt) || defined(__DOXYGEN__) +#if ENABLE_WFI_IDLE || defined(__DOXYGEN__) +#define port_wait_for_interrupt() { \ + (*((volatile uint32_t *)0xFFFFFC04)) = 1; \ +} +#else +#define port_wait_for_interrupt() +#endif +#endif + +#endif /* _ARMPARAMS_H_ */ + +/** @} */ diff --git a/os/ports/GCC/ARM/AT91SAM7/vectors.s b/os/ports/GCC/ARM/AT91SAM7/vectors.s index ee0c01a19..f27ecd0dd 100644 --- a/os/ports/GCC/ARM/AT91SAM7/vectors.s +++ b/os/ports/GCC/ARM/AT91SAM7/vectors.s @@ -17,6 +17,29 @@ along with this program. If not, see . */ +/** + * @file ARM/AT91SAM7/vectors.s + * @brief Interrupt vectors for the AT91SAM7 family. + * + * @defgroup ARM_AT91SAM7_VECTORS AT91SAM7 Interrupt Vectors + * @ingroup ARM_SPECIFIC + * @details Interrupt vectors for the AT91SAM7 family. + * @{ + */ + +#if defined(__DOXYGEN__) +/** + * @brief Unhandled exceptions handler. + * @details Any undefined exception vector points to this function by default. + * This function simply stops the system into an infinite loop. + * + * @notapi + */ +void _unhandled_exception(void) {} +#endif + +#if !defined(__DOXYGEN__) + .section vectors .code 32 .balign 4 @@ -71,4 +94,10 @@ AbortHandler: .weak FiqHandler FiqHandler: -.loop: b .loop +.global _unhandled_exception +_unhandled_exception: + b _unhandled_exception + +#endif + +/** @} */ diff --git a/os/ports/GCC/ARM/LPC214x/armparams.h b/os/ports/GCC/ARM/LPC214x/armparams.h new file mode 100644 index 000000000..5688fbab4 --- /dev/null +++ b/os/ports/GCC/ARM/LPC214x/armparams.h @@ -0,0 +1,55 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file ARM/LPC214x/armparams.h + * @brief ARM7 LPC214x Specific Parameters. + * + * @defgroup ARM_LPC214x LPC214x Specific Parameters + * @ingroup ARM_SPECIFIC + * @details This file contains the ARM specific parameters for the + * LPC214x platform. + * @{ + */ + +#ifndef _ARMPARAMS_H_ +#define _ARMPARAMS_H_ + +/** + * @brief ARM core model. + */ +#define ARM_CORE ARM_CORE_ARM7TDMI + +/** + * @brief LPC214x-specific wait for interrupt code. + * @details This implementation writes 1 into the PCON register. + */ +#if !defined(port_wait_for_interrupt) || defined(__DOXYGEN__) +#if ENABLE_WFI_IDLE || defined(__DOXYGEN__) +#define port_wait_for_interrupt() { \ + (*((volatile uint32_t *)0xE01FC0C0)) = 1; \ +} +#else +#define port_wait_for_interrupt() +#endif +#endif + +#endif /* _ARMPARAMS_H_ */ + +/** @} */ diff --git a/os/ports/GCC/ARM/LPC214x/vectors.s b/os/ports/GCC/ARM/LPC214x/vectors.s index 9f904ead9..6b0235c62 100644 --- a/os/ports/GCC/ARM/LPC214x/vectors.s +++ b/os/ports/GCC/ARM/LPC214x/vectors.s @@ -17,6 +17,29 @@ along with this program. If not, see . */ +/** + * @file ARM/LPC214x/vectors.s + * @brief Interrupt vectors for the LPC214x family. + * + * @defgroup ARM_LPC214x_VECTORS LPC214x Interrupt Vectors + * @ingroup ARM_SPECIFIC + * @details Interrupt vectors for the LPC214x family. + * @{ + */ + +#if defined(__DOXYGEN__) +/** + * @brief Unhandled exceptions handler. + * @details Any undefined exception vector points to this function by default. + * This function simply stops the system into an infinite loop. + * + * @notapi + */ +void _unhandled_exception(void) {} +#endif + +#if !defined(__DOXYGEN__) + .section vectors .code 32 .balign 4 @@ -68,4 +91,10 @@ AbortHandler: .weak FiqHandler FiqHandler: -.loop: b .loop +.global _unhandled_exception +_unhandled_exception: + b _unhandled_exception + +#endif + +/** @} */ diff --git a/os/ports/GCC/ARM/chcore.c b/os/ports/GCC/ARM/chcore.c index 51ed31fc3..db4793f0e 100644 --- a/os/ports/GCC/ARM/chcore.c +++ b/os/ports/GCC/ARM/chcore.c @@ -18,10 +18,10 @@ */ /** - * @file ARM7/chcore.c - * @brief ARM7 architecture port code. + * @file ARM/chcore.c + * @brief ARM7/9 architecture port code. * - * @addtogroup ARM7_CORE + * @addtogroup ARM_CORE * @{ */ diff --git a/os/ports/GCC/ARM/chcore.h b/os/ports/GCC/ARM/chcore.h index cd88cf0cc..a532e7048 100644 --- a/os/ports/GCC/ARM/chcore.h +++ b/os/ports/GCC/ARM/chcore.h @@ -18,38 +18,106 @@ */ /** - * @file ARM7/chcore.h - * @brief ARM7 architecture port macros and structures. + * @file ARM/chcore.h + * @brief ARM7/9 architecture port macros and structures. * - * @addtogroup ARM7_CORE + * @addtogroup ARM_CORE * @{ */ #ifndef _CHCORE_H_ #define _CHCORE_H_ +/*===========================================================================*/ +/* Port constants. */ +/*===========================================================================*/ + +/* Core variants identifiers.*/ +#define ARM_CORE_ARM7TDMI 7 /**< ARM77TDMI core identifier. */ +#define ARM_CORE_ARM9 9 /**< ARM9 core identifier. */ + +/* Inclusion of the ARM implementation specific parameters.*/ +#include "armparams.h" + +/* ARM core check, only ARM7TDMI and ARM9 supported right now.*/ +#if (ARM_CORE == ARM_CORE_ARM7TDMI) || (ARM_CORE == ARM_CORE_ARM9) +#else +#error "unknown or unsupported ARM core" +#endif + +/*===========================================================================*/ +/* Port statically derived parameters. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Port macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Port configurable parameters. */ +/*===========================================================================*/ + /** * @brief If enabled allows the idle thread to enter a low power mode. */ -#ifndef ENABLE_WFI_IDLE -#define ENABLE_WFI_IDLE 0 +#ifndef ARM_ENABLE_WFI_IDLE +#define ARM_ENABLE_WFI_IDLE FALSE #endif -#include + +/*===========================================================================*/ +/* Port exported info. */ +/*===========================================================================*/ /** - * @brief Macro defining the ARM7 architecture. + * @brief Macro defining a generic ARM architecture. */ -#define CH_ARCHITECTURE_ARM7 +#define CH_ARCHITECTURE_ARM + +#if defined(__DOXYGEN__) +/** + * @brief Macro defining the specific ARM architecture. + * @note This macro is for documentation only, the real name changes + * depending on the selected architecture, the possible names are: + * - CH_ARCHITECTURE_ARM7TDMI. + * - CH_ARCHITECTURE_ARM9. + * . + */ +#define CH_ARCHITECTURE_ARMx /** * @brief Name of the implemented architecture. + * @note The value is for documentation only, the real value changes + * depending on the selected architecture, the possible values are: + * - "ARM7". + * - "ARM9". + * . */ -#define CH_ARCHITECTURE_NAME "ARM" +#define CH_ARCHITECTURE_NAME "ARMx" /** * @brief Name of the architecture variant (optional). + * @note The value is for documentation only, the real value changes + * depending on the selected architecture, the possible values are: + * - "ARM7TDMI" + * - "ARM9" + * . */ -#define CH_CORE_VARIANT_NAME "ARM7TDMI" +#define CH_CORE_VARIANT_NAME "ARMxy" + +#elif ARM_CORE == ARM_CORE_ARM7TDMI +#define CH_ARCHITECTURE_ARM7TDMI +#define CH_ARCHITECTURE_NAME "ARM7" +#define CH_CORE_VARIANT_NAME "ARM7TDMI" + +#elif ARM_MODEL == ARM_VARIANT_ARM9 +#define CH_ARCHITECTURE_ARM9 +#define CH_ARCHITECTURE_NAME "ARM9" +#define CH_CORE_VARIANT_NAME "ARM9" +#endif + +/*===========================================================================*/ +/* Port implementation part (common). */ +/*===========================================================================*/ /** * @brief 32 bits stack and memory alignment enforcement. diff --git a/os/ports/GCC/ARM/chcoreasm.s b/os/ports/GCC/ARM/chcoreasm.s index e7d68a061..22ffa2c40 100644 --- a/os/ports/GCC/ARM/chcoreasm.s +++ b/os/ports/GCC/ARM/chcoreasm.s @@ -18,10 +18,10 @@ */ /** - * @file ARM7/chcoreasm.s - * @brief ARM7 architecture port low level code. + * @file ARM/chcoreasm.s + * @brief ARM7/9 architecture port low level code. * - * @addtogroup ARM7_CORE + * @addtogroup ARM_CORE * @{ */ diff --git a/os/ports/GCC/ARM/chtypes.h b/os/ports/GCC/ARM/chtypes.h index 6fcfe1af0..ba906f4f1 100644 --- a/os/ports/GCC/ARM/chtypes.h +++ b/os/ports/GCC/ARM/chtypes.h @@ -18,10 +18,10 @@ */ /** - * @file ARM7/chtypes.h - * @brief ARM7 architecture port system types. + * @file ARM/chtypes.h + * @brief ARM7/9 architecture port system types. * - * @addtogroup ARM7_CORE + * @addtogroup ARM_CORE * @{ */ diff --git a/os/ports/GCC/ARM/crt0.s b/os/ports/GCC/ARM/crt0.s index e5a39b520..1ce42ce57 100644 --- a/os/ports/GCC/ARM/crt0.s +++ b/os/ports/GCC/ARM/crt0.s @@ -18,10 +18,10 @@ */ /** - * @file ARM7/crt0.s - * @brief Generic ARM7 startup file for ChibiOS/RT. + * @file ARM/crt0.s + * @brief Generic ARM7/9 startup file for ChibiOS/RT. * - * @addtogroup ARM7_CORE + * @addtogroup ARM_CORE * @{ */ diff --git a/os/ports/GCC/ARM/port.dox b/os/ports/GCC/ARM/port.dox index f72f3c435..1e1fb4b64 100644 --- a/os/ports/GCC/ARM/port.dox +++ b/os/ports/GCC/ARM/port.dox @@ -18,41 +18,42 @@ */ /** - * @defgroup ARM7 ARM7 - * @details ARM7 port for the GCC compiler. + * @defgroup ARM ARM7/9 + * @details ARM7/9 port for the GCC compiler. * - * @section ARM7_INTRO Introduction - * The ARM7-GCC port supports the ARM7 code in the following three modes: - * - Pure ARM mode, this is the preferred mode for code speed. The code size - * is larger however. This mode is enabled when all the modules are compiled - * in ARM mode, see the Makefiles. - * - Pure THUMB mode, this is the preferred mode for code size. In this mode - * the execution speed is slower than the ARM mode. This mode is enabled - * when all the modules are compiled in THUMB mode, see the Makefiles. - * - Interworking mode, when in the system there are ARM modules mixed with - * THUMB modules then the interworking compiler option is enabled. This is - * usually the slowest mode and the code size is not as good as in pure - * THUMB mode. + * @section ARM_INTRO Introduction + * The ARM7/9-GCC port supports the ARM7/9 core in the following three modes: + * - Pure ARM mode, this is the preferred mode for code speed, this + * mode increases the memory footprint however. This mode is enabled when + * all the modules are compiled in ARM mode, see the Makefiles. + * - Pure THUMB mode, this is the preferred mode for code size. In + * this mode the execution speed is slower than the ARM mode. This mode + * is enabled when all the modules are compiled in THUMB mode, see the + * Makefiles. + * - Interworking mode, when in the system there are ARM modules mixed + * with THUMB modules then the interworking compiler option is enabled. + * This is usually the slowest mode and the code size is not as good as + * in pure THUMB mode. * . - * @section ARM7_STATES Mapping of the System States in the ARM7 port - * The ChibiOS/RT logical system states are mapped as follow in the ARM7 + * @section ARM_STATES Mapping of the System States in the ARM7/9 port + * The ChibiOS/RT logical system states are mapped as follow in the ARM7/9 * port: * - Init. This state is represented by the startup code and the * initialization code before @p chSysInit() is executed. It has not a * special hardware state associated, usually the CPU goes through several * hardware states during the startup phase. * - Normal. This is the state the system has after executing - * @p chSysInit(). In this state the ARM7TDMI has both the interrupt sources + * @p chSysInit(). In this state the CPU has both the interrupt sources * (IRQ and FIQ) enabled and is running in ARM System Mode. * - Suspended. In this state the IRQ sources are disabled but the FIQ * sources are served, the core is running in ARM System Mode. * - Disabled. Both the IRQ and FIQ sources are disabled, the core is * running in ARM System Mode. - * - Sleep. The ARM7 code does not have any built-in low power mode but - * there are clock stop modes implemented in custom ways by the various - * silicon vendors. This state is implemented in each microcontroller support - * code in a different way, the core is running (or freezed...) in ARM - * System Mode. + * - Sleep. ARM7/9 cores does not have an explicit built-in low power + * mode but there are clock stop modes implemented in custom ways by the + * various silicon vendors. This state is implemented in each microcontroller + * support code in a different way, the core is running (or freezed...) + * in ARM System Mode. * - S-Locked. IRQ sources disabled, core running in ARM System Mode. * - I-Locked. IRQ sources disabled, core running in ARM IRQ Mode. Note * that this state is not different from the SRI state in this port, the @@ -63,14 +64,14 @@ * - Serving Fast Interrupt. IRQ and FIQ sources disabled, core running * in ARM FIQ Mode. * - Serving Non-Maskable Interrupt. There are no asynchronous NMI - * sources in ARM7 architecture but synchronous SVC, ABT and UND exception + * sources in ARM7/9 architecture but synchronous SVC, ABT and UND exception * handlers can be seen as belonging to this category. * - Halted. Implemented as an infinite loop after disabling both IRQ * and FIQ sources. The ARM state is whatever the processor was running when * @p chSysHalt() was invoked. * . - * @section ARM7_NOTES The ARM7 port notes - * The ARM7 port is organized as follow: + * @section ARM_NOTES The ARM7/9 port notes + * The ARM7/9 port is organized as follow: * - The @p main() function is invoked in system mode. * - Each thread has a private user/system stack, the system has a single * interrupt stack where all the interrupts are processed. @@ -83,18 +84,18 @@ * - Other modes are not preempt-able because the system code assumes the * threads running in system mode. When running in supervisor or other * modes make sure that the interrupts are globally disabled. - * - Interrupts nesting is not supported in the ARM7 code because their + * - Interrupts nesting is not supported in the ARM7/9 port because their * implementation, even if possible, is not really efficient in this * architecture. * - FIQ sources can preempt the kernel (by design) so it is not possible to * invoke the kernel APIs from inside a FIQ handler. FIQ handlers are not * affected by the kernel activity so there is not added jitter. * . - * @section ARM7_IH ARM7 Interrupt Handlers - * ARM7 Interrupt handlers do not save function-saved registers so you need to - * make sure your code saves them or does not use them (this happens - * because in the ARM7 port all the OS interrupt handler functions are declared - * naked).
+ * @section ARM_IH ARM7/9 Interrupt Handlers + * In the current implementation the ARM7/9 Interrupt handlers do not save + * function-saved registers so you need to make sure your code saves them + * or does not use them (this happens because in the ARM7/9 port all the + * OS interrupt handler functions are declared naked).
* Function-trashed registers (R0-R3, R12, LR, SR) are saved/restored by the * system macros @p CH_IRQ_PROLOGUE() and @p CH_IRQ_EPILOGUE().
* The easiest way to ensure this is to just invoke a normal function from @@ -136,8 +137,8 @@ */ /** - * @defgroup ARM7_CONF Configuration Options - * @details ARM7 specific configuration options. The ARM7 port allows some + * @defgroup ARM_CONF Configuration Options + * @details ARM7/9 specific configuration options. The ARM7/9 port allows some * architecture-specific configurations settings that can be overridden by * redefining them in @p chconf.h. Usually there is no need to change the * default values. @@ -151,28 +152,33 @@ * The default for this value is @p 0x10 which should be a safe value, you * can trim this down by defining the macro externally. This would save * some valuable RAM space for each thread present in the system.
- * The default value is set into ./os/ports/GCC/ARM7/chcore.h. + * The default value is set into ./os/ports/GCC/ARM/chcore.h. * - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE * thread. Usually there is no need to change this value unless inserting - * code in the IDLE thread hook macro. + * code in the IDLE thread using the @p IDLE_LOOP_HOOK hook macro. + * - @p ARM_ENABLE_WFI_IDLE, if set to @p TRUE enables the use of the + * an implementation-specific clock stop mode from within the idle loop. + * This option is defaulted to FALSE because it can create problems with + * some debuggers. Setting this option to TRUE reduces the system power + * requirements. * . - * @ingroup ARM7 + * @ingroup ARM */ /** - * @defgroup ARM7_CORE Core Port Implementation - * @details ARM7 specific port code, structures and macros. + * @defgroup ARM_CORE Core Port Implementation + * @details ARM7/9 specific port code, structures and macros. * - * @ingroup ARM7 + * @ingroup ARM */ /** - * @defgroup ARM7_STARTUP Startup Support - * @details ARM7 startup code support. ChibiOS/RT provides its own generic - * startup file for the ARM7 port. Of course it is not mandatory to use it + * @defgroup ARM_STARTUP Startup Support + * @details ARM7/9 startup code support. ChibiOS/RT provides its own generic + * startup file for the ARM7/9 port. Of course it is not mandatory to use it * but care should be taken about the startup phase details. * - * @section ARM7_STARTUP_1 Startup Process + * @section ARM_STARTUP_1 Startup Process * The startup process, as implemented, is the following: * -# The stacks are initialized by assigning them the sizes defined in the * linker script (usually named @p ch.ld). Stack areas are allocated from @@ -191,7 +197,7 @@ * -# Should the @p main() function return a branch is performed to the weak * symbol MainExitHandler. The default code is an endless empty loop. * . - * @section ARM7_STARTUP_2 Expected linker symbols + * @section ARM_STARTUP_2 Expected linker symbols * The startup code starts at the symbol @p ResetHandler and expects the * following symbols to be defined in the linker script: * - @p __ram_end__ RAM end location +1. @@ -208,6 +214,12 @@ * - @p _bss_start BSS start location. * - @p _bss_end BSS end location +1. * . - * @ingroup ARM7 - * @file ARM7/crt0.s Startup code. + * @ingroup ARM + */ + +/** + * @defgroup ARM_SPECIFIC Specific Implementations + * @details Platform-specific port code. + * + * @ingroup ARM */ diff --git a/os/ports/GCC/ARMCMx/LPC11xx/cmparams.h b/os/ports/GCC/ARMCMx/LPC11xx/cmparams.h index f5bf1e3fb..b3dfd2949 100644 --- a/os/ports/GCC/ARMCMx/LPC11xx/cmparams.h +++ b/os/ports/GCC/ARMCMx/LPC11xx/cmparams.h @@ -22,7 +22,7 @@ * @brief ARM Cortex-M0 LPC11xx Specific Parameters. * * @defgroup ARMCMx_LPC11xx LPC11xx Specific Parameters - * @ingroup ARMCMx + * @ingroup ARMCMx_SPECIFIC * @details This file contains the Cortex-M0 specific parameters for the * LPC11xx platform. * @{ diff --git a/os/ports/GCC/ARMCMx/LPC13xx/cmparams.h b/os/ports/GCC/ARMCMx/LPC13xx/cmparams.h index bc8d76b77..1822647d3 100644 --- a/os/ports/GCC/ARMCMx/LPC13xx/cmparams.h +++ b/os/ports/GCC/ARMCMx/LPC13xx/cmparams.h @@ -22,7 +22,7 @@ * @brief ARM Cortex-M3 LPC13xx Specific Parameters. * * @defgroup ARMCMx_LPC13xx LPC13xx Specific Parameters - * @ingroup ARMCMx + * @ingroup ARMCMx_SPECIFIC * @details This file contains the Cortex-M3 specific parameters for the * LPC13xx platform. * @{ diff --git a/os/ports/GCC/ARMCMx/STM32/cmparams.h b/os/ports/GCC/ARMCMx/STM32/cmparams.h index 06dfa8954..de07b7c67 100644 --- a/os/ports/GCC/ARMCMx/STM32/cmparams.h +++ b/os/ports/GCC/ARMCMx/STM32/cmparams.h @@ -22,7 +22,7 @@ * @brief ARM Cortex-M3 parameters for the STM32. * * @defgroup ARMCMx_STM32 STM32 Specific Parameters - * @ingroup ARMCMx + * @ingroup ARMCMx_SPECIFIC * @details This file contains the Cortex-M3 specific parameters for the * STM32 platform. * @{ diff --git a/os/ports/GCC/ARMCMx/STM32/vectors.c b/os/ports/GCC/ARMCMx/STM32/vectors.c index 59bad352b..d2306add0 100644 --- a/os/ports/GCC/ARMCMx/STM32/vectors.c +++ b/os/ports/GCC/ARMCMx/STM32/vectors.c @@ -22,7 +22,7 @@ * @brief Interrupt vectors for the STM32 family. * * @defgroup ARMCMx_STM32_VECTORS STM32 Interrupt Vectors - * @ingroup ARMCMx + * @ingroup ARMCMx_SPECIFIC * @details Interrupt vectors for the STM32 family. * @{ */ diff --git a/os/ports/GCC/ARMCMx/chcore.h b/os/ports/GCC/ARMCMx/chcore.h index db02d6bc1..41d433508 100644 --- a/os/ports/GCC/ARMCMx/chcore.h +++ b/os/ports/GCC/ARMCMx/chcore.h @@ -34,10 +34,10 @@ /* Port constants. */ /*===========================================================================*/ -#define CORTEX_M0 0 /**< @brief Cortex-M0 variant. */ -#define CORTEX_M1 1 /**< @brief Cortex-M1 variant. */ -#define CORTEX_M3 3 /**< @brief Cortex-M3 variant. */ -#define CORTEX_M4 4 /**< @brief Cortex-M4 variant. */ +#define CORTEX_M0 0 /**< @brief Cortex-M0 variant. */ +#define CORTEX_M1 1 /**< @brief Cortex-M1 variant. */ +#define CORTEX_M3 3 /**< @brief Cortex-M3 variant. */ +#define CORTEX_M4 4 /**< @brief Cortex-M4 variant. */ /* Inclusion of the Cortex-Mx implementation specific parameters.*/ #include "cmparams.h" @@ -57,26 +57,26 @@ /** * @brief Total priority levels. */ -#define CORTEX_PRIORITY_LEVELS (1 << CORTEX_PRIORITY_BITS) +#define CORTEX_PRIORITY_LEVELS (1 << CORTEX_PRIORITY_BITS) /** * @brief Minimum priority level. * @details This minimum priority level is calculated from the number of * priority bits supported by the specific Cortex-Mx implementation. */ -#define CORTEX_MINIMUM_PRIORITY (CORTEX_PRIORITY_LEVELS - 1) +#define CORTEX_MINIMUM_PRIORITY (CORTEX_PRIORITY_LEVELS - 1) /** * @brief Maximum priority level. * @details The maximum allowed priority level is always zero. */ -#define CORTEX_MAXIMUM_PRIORITY 0 +#define CORTEX_MAXIMUM_PRIORITY 0 /** * @brief Disabled value for BASEPRI register. * @note ARMv7-M architecture only. */ -#define CORTEX_BASEPRI_DISABLED 0 +#define CORTEX_BASEPRI_DISABLED 0 /*===========================================================================*/ /* Port macros. */ @@ -91,7 +91,8 @@ /** * @brief Priority level to priority mask conversion macro. */ -#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS)) +#define CORTEX_PRIORITY_MASK(n) \ + ((n) << (8 - CORTEX_PRIORITY_BITS)) /*===========================================================================*/ /* Port configurable parameters. */ @@ -101,7 +102,7 @@ * @brief Enables the use of the WFI instruction in the idle thread loop. */ #ifndef CORTEX_ENABLE_WFI_IDLE -#define CORTEX_ENABLE_WFI_IDLE FALSE +#define CORTEX_ENABLE_WFI_IDLE FALSE #endif /** @@ -110,7 +111,7 @@ * level in the middle of the numeric priorities range. */ #ifndef CORTEX_PRIORITY_SYSTICK -#define CORTEX_PRIORITY_SYSTICK (CORTEX_PRIORITY_LEVELS >> 1) +#define CORTEX_PRIORITY_SYSTICK (CORTEX_PRIORITY_LEVELS >> 1) #else /* If it is externally redefined then better perform a validity check on it.*/ #if !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SYSTICK) @@ -128,7 +129,7 @@ * to user in the ARMv6-M port. */ #ifndef CORTEX_PRIORITY_SVCALL -#define CORTEX_PRIORITY_SVCALL (CORTEX_MAXIMUM_PRIORITY + 1) +#define CORTEX_PRIORITY_SVCALL (CORTEX_MAXIMUM_PRIORITY + 1) #else /* If it is externally redefined then better perform a validity check on it.*/ #if !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SVCALL) @@ -146,7 +147,7 @@ * the minimum priority level. */ #ifndef CORTEX_PRIORITY_PENDSV -#define CORTEX_PRIORITY_PENDSV CORTEX_MINIMUM_PRIORITY +#define CORTEX_PRIORITY_PENDSV CORTEX_MINIMUM_PRIORITY #else /* If it is externally redefined then better perform a validity check on it.*/ #if !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_PENDSV) @@ -161,7 +162,8 @@ * @note ARMv7-M architecture only. */ #ifndef CORTEX_BASEPRI_KERNEL -#define CORTEX_BASEPRI_KERNEL CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SVCALL+1) +#define CORTEX_BASEPRI_KERNEL \ + CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SVCALL+1) #endif /** @@ -172,7 +174,7 @@ * @note Allowed values are 32 or 64. */ #ifndef CORTEX_STACK_ALIGNMENT -#define CORTEX_STACK_ALIGNMENT 64 +#define CORTEX_STACK_ALIGNMENT 64 #endif /*===========================================================================*/ @@ -204,7 +206,7 @@ * - "ARMv7-ME". * . */ -#define CH_ARCHITECTURE_NAME "ARMvx-M" +#define CH_ARCHITECTURE_NAME "ARMvx-M" /** * @brief Name of the architecture variant (optional). @@ -216,24 +218,24 @@ * - "Cortex-M4" * . */ -#define CH_CORE_VARIANT_NAME "Cortex-Mx" +#define CH_CORE_VARIANT_NAME "Cortex-Mx" #elif CORTEX_MODEL == CORTEX_M4 #define CH_ARCHITECTURE_ARM_v7M -#define CH_ARCHITECTURE_NAME "ARMv7-ME" -#define CH_CORE_VARIANT_NAME "Cortex-M4" +#define CH_ARCHITECTURE_NAME "ARMv7-ME" +#define CH_CORE_VARIANT_NAME "Cortex-M4" #elif CORTEX_MODEL == CORTEX_M3 #define CH_ARCHITECTURE_ARM_v7M -#define CH_ARCHITECTURE_NAME "ARMv7-M" -#define CH_CORE_VARIANT_NAME "Cortex-M3" +#define CH_ARCHITECTURE_NAME "ARMv7-M" +#define CH_CORE_VARIANT_NAME "Cortex-M3" #elif CORTEX_MODEL == CORTEX_M1 #define CH_ARCHITECTURE_ARM_v6M -#define CH_ARCHITECTURE_NAME "ARMv6-M" -#define CH_CORE_VARIANT_NAME "Cortex-M1" +#define CH_ARCHITECTURE_NAME "ARMv6-M" +#define CH_CORE_VARIANT_NAME "Cortex-M1" #elif CORTEX_MODEL == CORTEX_M0 #define CH_ARCHITECTURE_ARM_v6M -#define CH_ARCHITECTURE_NAME "ARMv6-M" -#define CH_CORE_VARIANT_NAME "Cortex-M0" +#define CH_ARCHITECTURE_NAME "ARMv6-M" +#define CH_CORE_VARIANT_NAME "Cortex-M0" #endif /*===========================================================================*/ diff --git a/os/ports/GCC/ARMCMx/port.dox b/os/ports/GCC/ARMCMx/port.dox index 2f91f27f3..adfd49981 100644 --- a/os/ports/GCC/ARMCMx/port.dox +++ b/os/ports/GCC/ARMCMx/port.dox @@ -135,7 +135,7 @@ * structures. * - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE * thread. Usually there is no need to change this value unless inserting - * code in the IDLE thread hook macro. + * code in the IDLE thread using the @p IDLE_LOOP_HOOK hook macro. * - @p CORTEX_BASEPRI_KERNEL, this is the @p BASEPRI value for the kernel lock * code. Code running at higher priority levels must not invoke any OS API. * This setting is specific to the ARMv7-M architecture. @@ -143,9 +143,9 @@ * - @p CORTEX_PRIORITY_SVCALL, priority of the SVCALL handler. * - @p CORTEX_PRIORITY_PENDSV, priority of the PENDSV handler. * - @p CORTEX_ENABLE_WFI_IDLE, if set to @p TRUE enables the use of the - * @p wfi instruction from within the idle loop. This is defaulted to - * FALSE because it can create problems with some debuggers. Setting this - * option to TRUE reduces the system power requirements. + * @p wfi instruction from within the idle loop. This option is + * defaulted to FALSE because it can create problems with some debuggers. + * Setting this option to TRUE reduces the system power requirements. * . * @ingroup ARMCMx */ @@ -219,3 +219,10 @@ * * @ingroup ARMCMx */ + +/** + * @defgroup ARMCMx_SPECIFIC Specific Implementations + * @details Platform-specific port code. + * + * @ingroup ARMCMx + */ diff --git a/readme.txt b/readme.txt index a97e6c683..dbc1df130 100644 --- a/readme.txt +++ b/readme.txt @@ -31,8 +31,8 @@ | | | +--MSP430/ - Drivers for MSP430 platform. | | | +--SPC56x/ - Drivers for SPC56x/MPC563xx platforms. | | | +--STM32/ - Drivers for STM32 platform. - | | | +--STM8S/ - Drivers for STM8S platform. | | | +--STM8L/ - Drivers for STM8L platform. + | | | +--STM8S/ - Drivers for STM8S platform. | | | +--Posix/ - Drivers for x86 Linux/OSX simulator platform. | | | +--Win32/ - Drivers for x86 Win32 simulator platform. | | +--templates/ - Driver template files. @@ -40,7 +40,7 @@ | +--ports/ - Port files for the various architectures. | | +--GCC/ - Ports for the GCC compiler. | | | +--ARM/ - Port files for ARM7 and ARM9 architectures. - | | | +--ARMCM3/ - Port files for ARMCMx architectures (ARMv6/7-M). + | | | +--ARMCMx/ - Port files for ARMCMx architectures (ARMv6/7-M). | | | +--PPC/ - Port files for PowerPC architecture. | | | +--AVR/ - Port files for AVR architecture. | | | +--MSP430/ - Port files for MSP430 architecture. @@ -65,13 +65,17 @@ ***************************************************************************** *** 2.1.4 *** +- NEW: ARM7 port reorganization following the same pattern of the ARMCMx + one, on now the port is also supports the ARM9 architecture (but not + tested yet hardware). Removed the dependencies between the port layer + and the vendors-provided headers. - NEW: Initial STM8L support: HAL, PAL and Serial drivers. - NEW: Added demo for the ST STM8L-Discovery kit. - NEW: Added support for the STM32 Value Line to the HAL. - NEW: Added demo for the ST STM32VL-Discovery kit. -- CHANGE: Improved the STM32 HAL to support multiple sub-families, now it - is possible to test the presence of any single peripheral into the - specified STM32 device. +- CHANGE: Improved the STM32 HAL to support multiple sub-families, at compile + time now it is possible to test the presence of any single peripheral into + the specified STM32 device. - CHANGE: Separated dynamic threads code into dedicated files: chdynamic.c and chdynamic.h. - CHANGE: Moved the declaration of the variable pal_default_config from @@ -80,11 +84,11 @@ - CHANGE: Removed the various assembler files for the STM32 interrupt vectors, now it is a single vectors.c file. - CHANGE: Deleted ./os/ports/GCC/ARM. -- CHANGE: Renamed ./os/ports/GCC/ARM7 in ./os/ports/GCC/ARM. Now the port is - meant for ARM9 too (requires more testing). +- CHANGE: Renamed ./os/ports/GCC/ARM7 in ./os/ports/GCC/ARM. - CHANGE: Renamed ./os/hal/platforms/STM8 in ./os/hal/platforms/STM8S. - CHANGE: Renamed ./testhal/STM8 in ./testhal/STM8S. - Added SPI driver to the STM8S documentation, it was missing. +- Improved documentation for the ARM and ARMCMx ports. *** 2.1.3 *** - FIX: Fixed broken STM32 synchronous UART driver (bug 3100946).