From 3af7b3c54348b1828a808f048598f2449f07bddc Mon Sep 17 00:00:00 2001
From: roccomarco <roccomarco@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Wed, 4 Jan 2017 16:04:16 +0000
Subject: [PATCH] Fixed Bug #809

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_16.1.x@10015 35acf78f-673a-0410-8e92-d51de3d6d3f4
---
 os/hal/ports/STM32/STM32F0xx/stm32_registry.h | 1 -
 readme.txt                                    | 1 +
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
index 1c9688664..d75faee03 100644
--- a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
@@ -247,7 +247,6 @@
 #define STM32_HAS_TIM2                      FALSE
 #define STM32_HAS_TIM4                      FALSE
 #define STM32_HAS_TIM5                      FALSE
-#define STM32_HAS_TIM7                      FALSE
 #define STM32_HAS_TIM8                      FALSE
 #define STM32_HAS_TIM9                      FALSE
 #define STM32_HAS_TIM10                     FALSE
diff --git a/readme.txt b/readme.txt
index c249822f3..0bc2aa893 100644
--- a/readme.txt
+++ b/readme.txt
@@ -72,6 +72,7 @@
 *** Releases and Change Log                                               ***
 *****************************************************************************
 *** 16.1.7 ***
+- HAL: Fixed redefined TIM in STM32F030 registry (bug #809).
 - HAL: Fixed clock init in STM32F0x port which doesn't take in account
        PLL_XTPRE and PREDIV_0 are hard-wired (bug #808).