git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7394 35acf78f-673a-0410-8e92-d51de3d6d3f4

os/common/ports/ARM/compilers/GCC/irq.s

@@ -1,59 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006,2007,2008,2009,2010,
-              2011,2012,2013,2014 Giovanni Di Sirio.
-
-    This file is part of ChibiOS.
-
-    ChibiOS is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 3 of the License, or
-    (at your option) any later version.
-
-    ChibiOS is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file    ARM/compilers/GCC/irq.s
- * @brief   IRQ handling for ARM devices.
- *
- * @defgroup ARM_IRQ ARM IRQ Handling
- * @{
- */
-
-#define __FROM_ASM__
-#include "armparams.h"
-
-#if !defined(__DOXYGEN__)
-
-                .section irq, "ax"
-                .code   32
-                .balign 4
-
-/*
- * IRQ entry point, note this code is always located at address 0x40, the
- * IRQ controller data register offset must be calculated accordingly.
- */
-                .global Irq_Handler
-Irq_Handler:
-                stmfd   sp!, {r0-r3, r12, lr}
-                ldr     r0, =ARM_IRQ_VECTOR_REG
-                ldr     r0, [r0]
-                ldr     lr, =_port_irq_common
-                bx      r0
-
-                .weak   _port_irq_common
-_port_irq_common:
-                // This exit sequence is usually replaced by the RTOS
-                // specific one.
-                ldmfd   sp!, {r0-r3, r12, lr}
-                subs    pc, lr, #4
-
-#endif
-
-/** @} */

os/common/ports/ARM/compilers/GCC/rules.ld

@@ -40,7 +40,6 @@ SECTIONS
     startup : ALIGN(16) SUBALIGN(16)
     {
         KEEP(*(vectors))
-        KEEP(*(irq))
     } > flash
 
     constructors : ALIGN(4) SUBALIGN(4)

os/rt/ports/ARM/compilers/GCC/chcoreasm.s

@@ -26,7 +26,9 @@
  * @{
  */
 
+#define __FROM_ASM__
 #include "chconf.h"
+#include "armparams.h"
 
 #define FALSE 0
 #define TRUE 1
@@ -136,6 +138,22 @@ _port_switch_arm:
                 ldmfd   sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc}
 #endif /* !defined(THUMB_PRESENT) */
 
+/*
+ * Common IRQ code. It expects a macro ARM_IRQ_VECTOR_REG with the address
+ * of a register holding the address of the ISR to be invoked, the IRS will
+ * then return in the common epilogue code where the context switch will
+ * be performed if required.
+ */
+                .code   32
+                .func
+                .global Irq_Handler
+Irq_Handler:
+                stmfd   sp!, {r0-r3, r12, lr}
+                ldr     r0, =ARM_IRQ_VECTOR_REG
+                ldr     r0, [r0]
+                ldr     lr, =_port_irq_common
+                bx      r0
+
 /*
  * Common exit point for all IRQ routines, it performs the rescheduling if
  * required.

os/rt/ports/ARM/compilers/GCC/mk/port_lpc214x.mk

@@ -2,7 +2,6 @@
 PORTSRC = ${CHIBIOS}/os/rt/ports/ARM/chcore.c
 
 PORTASM = $(CHIBIOS)/os/common/ports/ARM/compilers/GCC/vectors.s \
-          $(CHIBIOS)/os/common/ports/ARM/compilers/GCC/irq.s \
           $(CHIBIOS)/os/common/ports/ARM/compilers/GCC/crt0.s \
           $(CHIBIOS)/os/rt/ports/ARM/compilers/GCC/chcoreasm.s