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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5250 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2013-02-18 14:30:38 +00:00
parent 5a99b9e5bf
commit 3b951cfb37
2 changed files with 5 additions and 1 deletions
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4
os/hal/platforms/SPC56ELxx/spc56el_registry.h
View File

@ -40,6 +40,8 @@
#define SPC5_LINFLEX0_RXI_NUMBER 79
#define SPC5_LINFLEX0_TXI_NUMBER 80
#define SPC5_LINFLEX0_ERR_NUMBER 81
#define SPC5_LINFLEX0_CLK (halSPCGetSystemClock() / \
SPC5_SYSCLK_DIVIDER_VALUE)
#define SPC5_HAS_LINFLEX1 TRUE
#define SPC5_LINFLEX1_PCTL 49
@ -49,6 +51,8 @@
#define SPC5_LINFLEX1_RXI_NUMBER 99
#define SPC5_LINFLEX1_TXI_NUMBER 100
#define SPC5_LINFLEX1_ERR_NUMBER 101
#define SPC5_LINFLEX1_CLK (halSPCGetSystemClock() / \
SPC5_SYSCLK_DIVIDER_VALUE)
#define SPC5_HAS_LINFLEX2 FALSE

2
os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c
View File

@ -91,7 +91,7 @@ static void spc5_linflex_init(SerialDriver *sdp, const SerialConfig *config) {
parameters.*/
linflexp->UARTCR.R = SPC5_UARTCR_UART; /* UART mode FIRST. */
linflexp->UARTCR.R = SPC5_UARTCR_UART | SPC5_UARTCR_RXEN | config->mode;
div = halSPCGetSystemClock() / config->speed;
div = SPC5_LINFLEX0_CLK / config->speed;
linflexp->LINFBRR.R = (uint16_t)(div & 15); /* Fractional divider. */
linflexp->LINIBRR.R = (uint16_t)(div >> 4); /* Integer divider. */
linflexp->UARTSR.R = 0xFFFF; /* Clearing UARTSR register.*/