diff --git a/os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.c b/os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.c
index 4594c934f..a6571e974 100644
--- a/os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.c
+++ b/os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.c
@@ -217,6 +217,26 @@ void can_lld_init(void) {
   CAND3.fdcan = FDCAN3;
   CAND3.ram_base = (uint32_t *)(SRAMCAN_BASE + 2U * SRAMCAN_SIZE);
 #endif
+
+  /* Configure global CKDIV for STM32G4XX */
+#if defined(STM32G4XX) && STM32_CAN_CKDIV != 0
+  /* CAND1 needs to be put into configuration mode to allow CKDIV configuration */
+  rccEnableFDCAN(true);
+  if (fdcan_clock_stop(&CAND1)) {
+    osalDbgAssert(false, "CAN clock stop failed, check clocks and pin config");
+    return;
+  }
+  if (fdcan_init_mode(&CAND1)) {
+    osalDbgAssert(false, "CAN initialization failed, check clocks and pin config");
+    return;
+  }
+  CAND1.fdcan->CCCR |= FDCAN_CCCR_CCE;
+
+  /* Write actual configuration into CKDIV register */
+  FDCAN_CONFIG->CKDIV = STM32_CAN_CKDIV;
+
+  rccDisableFDCAN();
+#endif
 }
 
 /**
diff --git a/os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.h b/os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.h
index 3846b9357..29d78c80b 100644
--- a/os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.h
+++ b/os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.h
@@ -54,6 +54,13 @@
  * @name    Configuration options
  * @{
  */
+
+/**
+ * @brief   Global clock divisor configuration (requires FDCAN1)
+ */
+#if (defined(STM32G4XX) && !defined(STM32_CAN_CKDIV)) || defined(__DOXYGEN__)
+#define STM32_CAN_CKDIV                     0
+#endif
 /**
  * @brief   CAN1 driver enable switch.
  * @details If set to @p TRUE the support for FDCAN1 is included.
@@ -143,6 +150,10 @@
 #error "STM32_FDCAN_TM_NBR not defined in registry"
 #endif
 
+#if defined(STM32G4XX) && ((STM32_CAN_CKDIV != 0) && !defined(STM32_CAN_USE_FDCAN1))
+#error "STM32_HAS_FDCAN1 is required for configuring STM32_CAN_CKDIV != 0"
+#endif
+
 /*===========================================================================*/
 /* Driver data structures and types.                                         */
 /*===========================================================================*/