From 3c9f0ee67a50ae65892a94ba3deaa466d5a8390e Mon Sep 17 00:00:00 2001
From: Giovanni Di Sirio <gdisirio@gmail.com>
Date: Sat, 25 Jun 2022 05:53:43 +0000
Subject: [PATCH] Added EFL driver support for STM32H401/411.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@15660 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
---
 os/hal/ports/STM32/STM32F4xx/hal_efl_lld.c | 62 ++++++++++++++++++++++
 os/hal/ports/STM32/STM32F4xx/hal_efl_lld.h | 17 ++++++
 2 files changed, 79 insertions(+)

diff --git a/os/hal/ports/STM32/STM32F4xx/hal_efl_lld.c b/os/hal/ports/STM32/STM32F4xx/hal_efl_lld.c
index b204e22ea..836c7447c 100644
--- a/os/hal/ports/STM32/STM32F4xx/hal_efl_lld.c
+++ b/os/hal/ports/STM32/STM32F4xx/hal_efl_lld.c
@@ -132,6 +132,68 @@ static const flash_descriptor_t efl_lld_size2[STM32_FLASH_NUMBER_OF_BANKS] = {
       }
 };
 
+/* Table describing possible flash sizes and descriptors for this device. */
+static const efl_lld_size_t efl_lld_flash_sizes[] = {
+      {
+       .desc = efl_lld_size1
+      },
+      {
+       .desc = efl_lld_size2
+      }
+};
+#elif defined(STM32F401xx) || defined(STM32F411xx) ||                         \
+    defined(__DOXYGEN__)
+
+/* Sector table for 256k device. */
+static const flash_sector_descriptor_t efl_lld_sect1[STM32_FLASH1_SECTORS_TOTAL] = {
+  {         0,                        16384},   /* Sector  0. */
+  { 1 * 16384,                        16384},   /* Sector  1. */
+  { 2 * 16384,                        16384},   /* Sector  2. */
+  { 3 * 16384,                        16384},   /* Sector  3. */
+  { 4 * 16384,                        65536},   /* Sector  4. */
+  { 4 * 16384 + 65536,               131072},   /* Sector  5. */
+};
+
+/* Sector table for 512k device. */
+static const flash_sector_descriptor_t efl_lld_sect2[STM32_FLASH2_SECTORS_TOTAL] = {
+  {         0,                        16384},   /* Sector  0. */
+  { 1 * 16384,                        16384},   /* Sector  1. */
+  { 2 * 16384,                        16384},   /* Sector  2. */
+  { 3 * 16384,                        16384},   /* Sector  3. */
+  { 4 * 16384,                        65536},   /* Sector  4. */
+  { 4 * 16384 + 65536,               131072},   /* Sector  5. */
+  { 4 * 16384 + 65536 +  1 * 131072, 131072},   /* Sector  6. */
+  { 4 * 16384 + 65536 +  2 * 131072, 131072},   /* Sector  7. */
+};
+
+/* The descriptors for 256k device. */
+static const flash_descriptor_t efl_lld_size1[STM32_FLASH_NUMBER_OF_BANKS] = {
+      { /* Single bank organisation. */
+       .attributes        = FLASH_ATTR_ERASED_IS_ONE |
+                            FLASH_ATTR_MEMORY_MAPPED,
+       .page_size         = STM32_FLASH_LINE_SIZE,
+       .sectors_count     = STM32_FLASH1_SECTORS_TOTAL,
+       .sectors           = efl_lld_sect1,
+       .sectors_size      = 0,
+       .address           = (uint8_t *)FLASH_BASE,
+       .size              = STM32_FLASH1_SIZE * STM32_FLASH_SIZE_SCALE
+      }
+};
+
+/* The descriptors for 512k device. */
+static const flash_descriptor_t efl_lld_size2[STM32_FLASH_NUMBER_OF_BANKS] = {
+      { /* Single bank organisation. */
+       .attributes        = FLASH_ATTR_ERASED_IS_ONE |
+                            FLASH_ATTR_MEMORY_MAPPED,
+       .page_size         = STM32_FLASH_LINE_SIZE,
+       .sectors_count     = STM32_FLASH2_SECTORS_TOTAL,
+       .sectors           = efl_lld_sect2,
+       .sectors_size      = 0,
+       .address           = (uint8_t *)FLASH_BASE,
+       .size              = STM32_FLASH2_SIZE * STM32_FLASH_SIZE_SCALE
+      }
+};
+
 /* Table describing possible flash sizes and descriptors for this device. */
 static const efl_lld_size_t efl_lld_flash_sizes[] = {
       {
diff --git a/os/hal/ports/STM32/STM32F4xx/hal_efl_lld.h b/os/hal/ports/STM32/STM32F4xx/hal_efl_lld.h
index 1f3fd1a7a..5d31f6bd1 100644
--- a/os/hal/ports/STM32/STM32F4xx/hal_efl_lld.h
+++ b/os/hal/ports/STM32/STM32F4xx/hal_efl_lld.h
@@ -68,6 +68,23 @@
 #define STM32_FLASH1_SECTORS_TOTAL          16
 #define STM32_FLASH2_SECTORS_TOTAL          12
 
+#elif defined(STM32F401xx) || defined(STM32F411xx) ||                         \
+    defined(__DOXYGEN__)
+
+/* Flash size register. */
+#define STM32_FLASH_SIZE_REGISTER           0x1FFF7A22
+#define STM32_FLASH_SIZE_SCALE              1024U
+
+/*
+ * Device flash size...
+ *
+ */
+#define STM32_FLASH_NUMBER_OF_BANKS         1
+#define STM32_FLASH1_SIZE                   256U
+#define STM32_FLASH2_SIZE                   512U
+#define STM32_FLASH1_SECTORS_TOTAL          6
+#define STM32_FLASH2_SECTORS_TOTAL          8
+
 #elif defined(STM32F429_439xx) || defined(STM32F427_437xx) || \
       defined(__DOXYGEN__)