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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2364 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2010-11-14 13:38:45 +00:00
parent 7ab0cff418
commit 3d8808a39e
3 changed files with 9 additions and 9 deletions
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6
docs/reports/STM32F103-72.txt
View File

@ -5,11 +5,11 @@ Settings: SYSCLK=72, ACR=0x12 (2 wait states)
*** ChibiOS/RT test suite *** ChibiOS/RT test suite
*** ***
*** Kernel: 2.1.3unstable *** Kernel: 2.1.4unstable
*** GCC Version: 4.5.1 *** GCC Version: 4.5.1
*** Architecture: ARMv7-M *** Architecture: ARMv7-M
*** Core Variant: Cortex-M3 *** Core Variant: Cortex-M3
*** Platform: STM32 MD *** Platform: STM32 Performance Line Medium Density
*** Test Board: Olimex STM32-P103 *** Test Board: Olimex STM32-P103
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
@ -126,7 +126,7 @@ Settings: SYSCLK=72, ACR=0x12 (2 wait states)
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.8 (Benchmark, round robin context switching) --- Test Case 11.8 (Benchmark, round robin context switching)
--- Score : 478124 ctxswc/S --- Score : 478128 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 11.9 (Benchmark, I/O Queues throughput) --- Test Case 11.9 (Benchmark, I/O Queues throughput)

8
os/hal/platforms/STM32/stm32_dma.c
View File

@ -37,7 +37,7 @@
/*===========================================================================*/ /*===========================================================================*/
static cnt_t dmacnt1; static cnt_t dmacnt1;
#if defined(STM32_HAS_DMA2) #if STM32_HAS_DMA2
static cnt_t dmacnt2; static cnt_t dmacnt2;
#endif #endif
@ -65,7 +65,7 @@ void dmaInit(void) {
for (i = STM32_DMA_CHANNEL_7; i >= STM32_DMA_CHANNEL_1; i--) for (i = STM32_DMA_CHANNEL_7; i >= STM32_DMA_CHANNEL_1; i--)
dmaDisableChannel(STM32_DMA1, i); dmaDisableChannel(STM32_DMA1, i);
STM32_DMA1->IFCR = 0xFFFFFFFF; STM32_DMA1->IFCR = 0xFFFFFFFF;
#if defined(STM32_HAS_DMA2) #if STM32_HAS_DMA2
dmacnt2 = 0; dmacnt2 = 0;
for (i = STM32_DMA_CHANNEL_5; i >= STM32_DMA_CHANNEL_1; i--) for (i = STM32_DMA_CHANNEL_5; i >= STM32_DMA_CHANNEL_1; i--)
dmaDisableChannel(STM32_DMA2, i); dmaDisableChannel(STM32_DMA2, i);
@ -89,7 +89,7 @@ void dmaEnable(uint32_t dma) {
DMA1->IFCR = 0x0FFFFFFF; DMA1->IFCR = 0x0FFFFFFF;
} }
break; break;
#if defined(STM32_HAS_DMA2) #if STM32_HAS_DMA2
case DMA2_ID: case DMA2_ID:
if (dmacnt2++ == 0) { if (dmacnt2++ == 0) {
RCC->AHBENR |= RCC_AHBENR_DMA2EN; RCC->AHBENR |= RCC_AHBENR_DMA2EN;
@ -114,7 +114,7 @@ void dmaDisable(uint32_t dma) {
if (--dmacnt1 == 0) if (--dmacnt1 == 0)
RCC->AHBENR &= ~RCC_AHBENR_DMA1EN; RCC->AHBENR &= ~RCC_AHBENR_DMA1EN;
break; break;
#if defined(STM32_HAS_DMA2) #if STM32_HAS_DMA2
case DMA2_ID: case DMA2_ID:
if (--dmacnt2 == 0) if (--dmacnt2 == 0)
RCC->AHBENR &= ~RCC_AHBENR_DMA2EN; RCC->AHBENR &= ~RCC_AHBENR_DMA2EN;

4
os/hal/platforms/STM32/stm32_dma.h
View File

@ -38,7 +38,7 @@
#define DMA1_ID 0 #define DMA1_ID 0
/** @brief DMA2 identifier.*/ /** @brief DMA2 identifier.*/
#if defined(STM32_HAS_DMA2) || defined(__DOXYGEN__) #if STM32_HAS_DMA2 || defined(__DOXYGEN__)
#define DMA2_ID 1 #define DMA2_ID 1
#endif #endif
@ -100,7 +100,7 @@ typedef struct {
/** Pointer to the DMA1 channel 7 registers block.*/ /** Pointer to the DMA1 channel 7 registers block.*/
#define STM32_DMA1_CH7 (&STM32_DMA1->channels[6]) #define STM32_DMA1_CH7 (&STM32_DMA1->channels[6])
#if defined(STM32_HAS_DMA2) || defined(__DOXYGEN__) #if STM32_HAS_DMA2 || defined(__DOXYGEN__)
/** DMA2 registers block numeric address.*/ /** DMA2 registers block numeric address.*/
#define STM32_DMA2_BASE (AHBPERIPH_BASE + 0x0400) #define STM32_DMA2_BASE (AHBPERIPH_BASE + 0x0400)
/** Pointer to the DMA2 registers block.*/ /** Pointer to the DMA2 registers block.*/