Renamed ports/ARMCMAx-TZ as ports/ARMCAx-TZ
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10342 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -120,7 +120,7 @@ include $(CHIBIOS)/os/common/startup/ARM/compilers/GCC/mk/startup_sama5d2.mk
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#include $(CHIBIOS)/os/hal/osal/rt/osal.mk
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# RTOS files (optional).
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include $(CHIBIOS)/os/rt/rt.mk
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include $(CHIBIOS)/os/common/ports/ARMCMAx-TZ/compilers/GCC/mk/port_generic.mk
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include $(CHIBIOS)/os/common/ports/ARMCAx-TZ/compilers/GCC/mk/port_generic.mk
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# Other files (optional).
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#include $(CHIBIOS)/test/rt/test.mk
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os/common/ports/ARMCMAx-TZ/chcore.c → os/common/ports/ARMCAx-TZ/chcore.c
Executable file → Normal file
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os/common/ports/ARMCMAx-TZ/chcore.c → os/common/ports/ARMCAx-TZ/chcore.c
Executable file → Normal file
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os/common/ports/ARMCMAx-TZ/chcore.h → os/common/ports/ARMCAx-TZ/chcore.h
Executable file → Normal file
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os/common/ports/ARMCMAx-TZ/chcore.h → os/common/ports/ARMCAx-TZ/chcore.h
Executable file → Normal file
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os/common/ports/ARMCMAx-TZ/chcore_timer.h → os/common/ports/ARMCAx-TZ/chcore_timer.h
Executable file → Normal file
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os/common/ports/ARMCMAx-TZ/chcore_timer.h → os/common/ports/ARMCAx-TZ/chcore_timer.h
Executable file → Normal file
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@ -64,8 +64,8 @@
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.equ SCR_FW, 0x10
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.equ SCR_AW, 0x20
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.set MON_S_SCR, SCR_IRQ
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.set MON_NS_SCR, SCR_FIQ|SCR_NS
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.equ MON_S_SCR, SCR_IRQ
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.equ MON_NS_SCR, SCR_FIQ|SCR_NS
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.text
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@ -161,7 +161,7 @@ Mon_Irq_Handler:
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ldmfd sp!, {r0-r3, r12, lr}
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msr CPSR_c, #MODE_MON | I_BIT | F_BIT
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stmfd sp!, {lr} // save lr into monitor stack
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ldr lr, =#MON_NS_SCR // set non-secure SCR before return
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ldr lr, =MON_NS_SCR // set non-secure SCR before return
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mrc p15, 0, lr, c1, c1, 0
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ldmfd sp!, {lr}
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subs pc, lr, #4 // return into non-secure world
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@ -173,7 +173,7 @@ Mon_Fiq_Handler:
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// here the fiq is taken from non-secure state
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// current mode is monitor (so current state is secure)
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stmfd sp!, {lr} // save lr into monitor stack
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ldr lr, =#MON_S_SCR // set secure SCR before to switch to FIQ mode
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ldr lr, =MON_S_SCR // set secure SCR before to switch to FIQ mode
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mrc p15, 0, lr, c1, c1, 0
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cpsid if, #MODE_FIQ // secure FIQ mode
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stmfd sp!, {r0-r3, r12} // IRQ frame, save scratch registers
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@ -185,7 +185,7 @@ _mon_fiq_ret_arm:
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cmp r0, #0
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ldmfd sp!, {r0-r3, r12}
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cpsid if, #MODE_MON
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ldr lr, =#MON_NS_SCR // set non-secure SCR before return
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ldr lr, =MON_NS_SCR // set non-secure SCR before return
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mrceq p15, 0, lr, c1, c1, 0 // only if it will return
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ldmfd sp!, {lr}
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subeqs pc, lr, #4 // No reschedule, returns.
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@ -218,7 +218,7 @@ _mon_fiq_ret_arm:
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ldmfd sp!, {r0-r3, r12, lr}
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msr CPSR_c, #MODE_MON | I_BIT | F_BIT
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stmfd sp!, {lr} // save lr into monitor stack
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ldr lr, =#MON_NS_SCR // set non-secure SCR before return
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ldr lr, =MON_NS_SCR // set non-secure SCR before return
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mrc p15, 0, lr, c1, c1, 0
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ldmfd sp!, {lr}
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subs pc, lr, #4 // return into non-secure world
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os/common/ports/ARMCMAx-TZ/compilers/GCC/chtypes.h → os/common/ports/ARMCAx-TZ/compilers/GCC/chtypes.h
Executable file → Normal file
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os/common/ports/ARMCMAx-TZ/compilers/GCC/chtypes.h → os/common/ports/ARMCAx-TZ/compilers/GCC/chtypes.h
Executable file → Normal file
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@ -0,0 +1,7 @@
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# List of the ChibiOS/RT ARMCAx-TZ generic port files.
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PORTSRC = ${CHIBIOS}/os/common/ports/ARMCAx-TZ/chcore.c
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PORTASM = $(CHIBIOS)/os/common/ports/ARMCAx-TZ/compilers/GCC/chcoreasm.S
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PORTINC = ${CHIBIOS}/os/common/ports/ARMCAx-TZ \
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${CHIBIOS}/os/common/ports/ARMCAx-TZ/compilers/GCC
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@ -1,7 +0,0 @@
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# List of the ChibiOS/RT ARMCMAx-TZ generic port files.
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PORTSRC = ${CHIBIOS}/os/common/ports/ARMCMAx-TZ/chcore.c
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PORTASM = $(CHIBIOS)/os/common/ports/ARMCMAx-TZ/compilers/GCC/chcoreasm.S
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PORTINC = ${CHIBIOS}/os/common/ports/ARMCMAx-TZ \
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${CHIBIOS}/os/common/ports/ARMCMAx-TZ/compilers/GCC
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