Split plain ARMv6-M and ARMv6-M-RP2 ports.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14127 27425a3e-05d8-49a3-a47f-9c15f0e5edd8

os/common/ports/ARMv6-M-RP2/compilers/GCC/chcoreasm.S

@@ -0,0 +1,163 @@
+/*
+    ChibiOS - Copyright (C) 2006,2007,2008,2009,2010,2011,2012,2013,2014,
+              2015,2016,2017,2018,2019,2020,2021 Giovanni Di Sirio.
+
+    This file is part of ChibiOS.
+
+    ChibiOS is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation version 3 of the License.
+
+    ChibiOS is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file    ARMv6-M/compilers/GCC/chcoreasm.S
+ * @brief   ARMv6-M port low level code.
+ *
+ * @addtogroup ARMv6_M_GCC_CORE
+ * @{
+ */
+
+#if !defined(FALSE) || defined(__DOXYGEN__)
+#define FALSE   0
+#endif
+
+#if !defined(TRUE) || defined(__DOXYGEN__)
+#define TRUE    1
+#endif
+
+#define _FROM_ASM_
+#include "chlicense.h"
+#include "chconf.h"
+#include "chcore.h"
+
+#if !defined(__DOXYGEN__)
+
+/*
+ * RTOS-specific context offset.
+ */
+#if defined(_CHIBIOS_RT_CONF_)
+#if CH_CFG_USE_REGISTRY
+#define CURRENT_OFFSET  20          /* ch.rlist.current */
+#define CONTEXT_OFFSET  20
+#else
+#define CURRENT_OFFSET  12
+#define CONTEXT_OFFSET  12
+#endif
+
+#elif defined(_CHIBIOS_NIL_CONF_)
+#define CURRENT_OFFSET  0           /* nil.current */
+#define CONTEXT_OFFSET  0
+
+#else
+#error "invalid chconf.h"
+#endif
+
+                .set    SCB_ICSR, 0xE000ED04
+                .set    ICSR_PENDSVSET, 0x10000000
+                .set    ICSR_NMIPENDSET, 0x80000000
+
+                .cpu    cortex-m0
+                .fpu    softvfp
+
+                .thumb
+                .text
+
+/*--------------------------------------------------------------------------*
+ * Performs a context switch between two threads.
+ *--------------------------------------------------------------------------*/
+                .thumb_func
+                .globl  __port_switch
+__port_switch:
+                push    {r4, r5, r6, r7, lr}
+                mov     r4, r8
+                mov     r5, r9
+                mov     r6, r10
+                mov     r7, r11
+                push    {r4, r5, r6, r7}
+                
+                mov     r3, sp
+                str     r3, [r1, #CONTEXT_OFFSET]
+                ldr     r3, [r0, #CONTEXT_OFFSET]
+                mov     sp, r3
+                
+                pop     {r4, r5, r6, r7}
+                mov     r8, r4
+                mov     r9, r5
+                mov     r10, r6
+                mov     r11, r7
+                pop     {r4, r5, r6, r7, pc}
+
+/*--------------------------------------------------------------------------*
+ * Start a thread by invoking its work function.
+ *
+ * Threads execution starts here, the code leaves the system critical zone
+ * and then jumps into the thread function passed in register R4. The
+ * register R5 contains the thread parameter. The function chThdExit() is
+ * called on thread function return.
+ *--------------------------------------------------------------------------*/
+                .thumb_func
+                .globl  __port_thread_start
+__port_thread_start:
+#if CH_DBG_SYSTEM_STATE_CHECK
+                bl      __dbg_check_unlock
+#endif
+#if CH_DBG_STATISTICS
+                bl      __stats_stop_measure_crit_thd
+#endif
+                cpsie   i
+                mov     r0, r5
+                blx     r4
+                movs    r0, #0              /* MSG_OK */
+                bl      chThdExit
+.zombies:       b       .zombies
+
+/*--------------------------------------------------------------------------*
+ * Post-IRQ switch code.
+ *
+ * Exception handlers return here for context switching.
+ *--------------------------------------------------------------------------*/
+                .thumb_func
+                .globl  __port_switch_from_isr
+__port_switch_from_isr:
+#if CH_DBG_STATISTICS
+                bl      __stats_start_measure_crit_thd
+#endif
+#if CH_DBG_SYSTEM_STATE_CHECK
+                bl      __dbg_check_lock
+#endif
+                bl      chSchDoPreemption
+#if CH_DBG_SYSTEM_STATE_CHECK
+                bl      __dbg_check_unlock
+#endif
+#if CH_DBG_STATISTICS
+                bl      __stats_stop_measure_crit_thd
+#endif
+                .globl  __port_exit_from_isr
+__port_exit_from_isr:
+                ldr     r2, .L2
+                ldr     r3, .L3
+                str     r3, [r2, #0]
+#if CORTEX_ALTERNATE_SWITCH
+                cpsie   i
+#endif
+.L1:            b       .L1
+
+                .align  2
+.L2:            .word   SCB_ICSR
+#if CORTEX_ALTERNATE_SWITCH
+.L3:            .word   ICSR_PENDSVSET
+#else
+.L3:            .word   ICSR_NMIPENDSET
+#endif
+
+#endif /* !defined(__DOXYGEN__) */
+
+/** @} */

os/common/ports/ARMv6-M-RP2/compilers/GCC/chtypes.h

@@ -0,0 +1,97 @@
+/*
+    ChibiOS - Copyright (C) 2006,2007,2008,2009,2010,2011,2012,2013,2014,
+              2015,2016,2017,2018,2019,2020,2021 Giovanni Di Sirio.
+
+    This file is part of ChibiOS.
+
+    ChibiOS is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation version 3 of the License.
+
+    ChibiOS is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file    ARMCMx/compilers/GCC/chtypes.h
+ * @brief   ARM Cortex-Mx port system types.
+ *
+ * @addtogroup ARMCMx_GCC_CORE
+ * @{
+ */
+
+#ifndef CHTYPES_H
+#define CHTYPES_H
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+/**
+ * @name    Kernel types
+ * @{
+ */
+typedef uint32_t            rtcnt_t;        /**< Realtime counter.          */
+typedef uint64_t            rttime_t;       /**< Realtime accumulator.      */
+typedef uint32_t            syssts_t;       /**< System status word.        */
+typedef uint8_t             tmode_t;        /**< Thread flags.              */
+typedef uint8_t             tstate_t;       /**< Thread state.              */
+typedef uint8_t             trefs_t;        /**< Thread references counter. */
+typedef uint8_t             tslices_t;      /**< Thread time slices counter.*/
+typedef uint32_t            tprio_t;        /**< Thread priority.           */
+typedef int32_t             msg_t;          /**< Inter-thread message.      */
+typedef int32_t             eventid_t;      /**< Numeric event identifier.  */
+typedef uint32_t            eventmask_t;    /**< Mask of event identifiers. */
+typedef uint32_t            eventflags_t;   /**< Mask of event flags.       */
+typedef int32_t             cnt_t;          /**< Generic signed counter.    */
+typedef uint32_t            ucnt_t;         /**< Generic unsigned counter.  */
+/** @} */
+
+/**
+ * @brief   ROM constant modifier.
+ * @note    It is set to use the "const" keyword in this port.
+ */
+#define ROMCONST            const
+
+/**
+ * @brief   Makes functions not inlineable.
+ * @note    If the compiler does not support such attribute then some
+ *          time-dependent services could be degraded.
+ */
+#define NOINLINE           __attribute__((noinline))
+
+/**
+ * @brief   Optimized thread function declaration macro.
+ */
+#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg)
+
+/**
+ * @brief   Packed variable specifier.
+ */
+#define PACKED_VAR         __attribute__((packed))
+
+/**
+ * @brief   Memory alignment enforcement for variables.
+ */
+#define ALIGNED_VAR(n)      __attribute__((aligned(n)))
+
+/**
+ * @brief   Size of a pointer.
+ * @note    To be used where the sizeof operator cannot be used, preprocessor
+ *          expressions for example.
+ */
+#define SIZEOF_PTR          4
+
+/**
+ * @brief   True if alignment is low-high in current architecture.
+ */
+#define REVERSE_ORDER       1
+
+#endif /* CHTYPES_H */
+
+/** @} */

os/common/ports/ARMv6-M-RP2/compilers/GCC/mk/port.mk

@@ -1,14 +1,12 @@
-# List of the ChibiOS/RT RP2 port files, note it uses files from the
+# List of the ChibiOS/RT RP2 port files.
-# normal ARMv6-M port.
 PORTSRC = $(CHIBIOS)/os/common/ports/ARMv6-M-RP2/chcore.c
           
-PORTASM = $(CHIBIOS)/os/common/ports/ARMv6-M/compilers/GCC/chcoreasm.S
+PORTASM = $(CHIBIOS)/os/common/ports/ARMv6-M-RP2/compilers/GCC/chcoreasm.S
 
 PORTINC = $(CHIBIOS)/os/common/ports/ARMv6-M-RP2 \
-          $(CHIBIOS)/os/common/ports/ARMv6-M/compilers/GCC
+          $(CHIBIOS)/os/common/ports/ARMv6-M-RP2/compilers/GCC
 
 # Shared variables
 ALLXASMSRC += $(PORTASM)
 ALLCSRC    += $(PORTSRC)
 ALLINC     += $(PORTINC)
-