diff --git a/os/hal/platforms/STM32/USARTv1/uart_lld.c b/os/hal/platforms/STM32/USARTv1/uart_lld.c
index cad1cf084..c783ea90c 100644
--- a/os/hal/platforms/STM32/USARTv1/uart_lld.c
+++ b/os/hal/platforms/STM32/USARTv1/uart_lld.c
@@ -79,13 +79,13 @@
   STM32_DMA_GETCHANNEL(STM32_UART_USART6_TX_DMA_STREAM,                     \
                        STM32_USART6_TX_DMA_CHN)
 
-#if (STM32_UART_USE_UART4 || STM32_UART_USE_UART5)
-  #define STM32_UART45_CR2_CHECK_MASK (USART_CR2_STOP_0 | USART_CR2_CLKEN | \
-                        USART_CR2_CPOL | USART_CR2_CPHA | USART_CR2_LBCL)
+#define STM32_UART45_CR2_CHECK_MASK                                         \
+  (USART_CR2_STOP_0 | USART_CR2_CLKEN | USART_CR2_CPOL | USART_CR2_CPHA |   \
+   USART_CR2_LBCL)
 
-  #define STM32_UART45_CR3_CHECK_MASK (USART_CR3_CTSIE | USART_CR3_CTSE |   \
-                       USART_CR3_RTSE | USART_CR3_SCEN | USART_CR3_NACK)
-#endif
+#define STM32_UART45_CR3_CHECK_MASK                                         \
+  (USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE | USART_CR3_SCEN |     \
+   USART_CR3_NACK)
 
 /*===========================================================================*/
 /* Driver exported variables.                                                */
@@ -507,28 +507,6 @@ void uart_lld_init(void) {
 #endif
 }
 
-/**
- * @brief   Check CR2 and CR3 values for compatibility with UART4, UART5.
- *
- * @param[in] uartp     pointer to the @p UARTDriver object
- *
- * @notapi
- */
-#if (STM32_UART_USE_UART4 || STM32_UART_USE_UART5)
-static void uart_check_config(const UARTDriver *uartp) {
-
-  uint16_t cr;
-
-  cr = uartp->config->cr2;
-  chDbgCheck((cr & STM32_UART45_CR2_CHECK_MASK) == 0,
-      "Some flags from CR2 unavailable for this UART");
-
-  cr = uartp->config->cr3;
-  chDbgCheck((cr & STM32_UART45_CR3_CHECK_MASK) == 0,
-      "Some flags from CR3 unavailable for this UART");
-}
-#endif /* (STM32_UART_USE_UART4 || STM32_UART_USE_UART5) */
-
 /**
  * @brief   Configures and activates the UART peripheral.
  *
@@ -538,14 +516,6 @@ static void uart_check_config(const UARTDriver *uartp) {
  */
 void uart_lld_start(UARTDriver *uartp) {
 
-#if STM32_UART_USE_UART4
-  if (uartp == &UARTD4)
-    uart_check_config(uartp);
-#elif STM32_UART_USE_UART5
-  else if (uartp == &UARTD5)
-    uart_check_config(uartp);
-#endif
-
   if (uartp->state == UART_STOP) {
 #if STM32_UART_USE_USART1
     if (&UARTD1 == uartp) {
@@ -613,16 +583,24 @@ void uart_lld_start(UARTDriver *uartp) {
 #if STM32_UART_USE_UART4
     if (&UARTD4 == uartp) {
       bool_t b;
+
+      chDbgAssert((uartp->config->cr2 & STM32_UART45_CR2_CHECK_MASK) == 0,
+                  "uart_lld_start(), #7",
+                  "specified invalid bits in UART4 CR2 register settings");
+      chDbgAssert((uartp->config->cr3 & STM32_UART45_CR3_CHECK_MASK) == 0,
+                  "uart_lld_start(), #8",
+                  "specified invalid bits in UART4 CR3 register settings");
+
       b = dmaStreamAllocate(uartp->dmarx,
                             STM32_UART_UART4_IRQ_PRIORITY,
                             (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
                             (void *)uartp);
-      chDbgAssert(!b, "uart_lld_start(), #7", "stream already allocated");
+      chDbgAssert(!b, "uart_lld_start(), #9", "stream already allocated");
       b = dmaStreamAllocate(uartp->dmatx,
                             STM32_UART_UART4_IRQ_PRIORITY,
                             (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
                             (void *)uartp);
-      chDbgAssert(!b, "uart_lld_start(), #8", "stream already allocated");
+      chDbgAssert(!b, "uart_lld_start(), #10", "stream already allocated");
       rccEnableUART4(FALSE);
       nvicEnableVector(STM32_UART4_NUMBER,
                        CORTEX_PRIORITY_MASK(STM32_UART_UART4_IRQ_PRIORITY));
@@ -634,16 +612,24 @@ void uart_lld_start(UARTDriver *uartp) {
 #if STM32_UART_USE_UART5
     if (&UARTD5 == uartp) {
       bool_t b;
+
+      chDbgAssert((uartp->config->cr2 & STM32_UART45_CR2_CHECK_MASK) == 0,
+                  "uart_lld_start(), #11",
+                  "specified invalid bits in UART5 CR2 register settings");
+      chDbgAssert((uartp->config->cr3 & STM32_UART45_CR3_CHECK_MASK) == 0,
+                  "uart_lld_start(), #12",
+                  "specified invalid bits in UART5 CR3 register settings");
+
       b = dmaStreamAllocate(uartp->dmarx,
                             STM32_UART_UART5_IRQ_PRIORITY,
                             (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
                             (void *)uartp);
-      chDbgAssert(!b, "uart_lld_start(), #9", "stream already allocated");
+      chDbgAssert(!b, "uart_lld_start(), #13", "stream already allocated");
       b = dmaStreamAllocate(uartp->dmatx,
                             STM32_UART_UART5_IRQ_PRIORITY,
                             (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
                             (void *)uartp);
-      chDbgAssert(!b, "uart_lld_start(), #10", "stream already allocated");
+      chDbgAssert(!b, "uart_lld_start(), #14", "stream already allocated");
       rccEnableUART5(FALSE);
       nvicEnableVector(STM32_UART5_NUMBER,
                        CORTEX_PRIORITY_MASK(STM32_UART_UART5_IRQ_PRIORITY));
@@ -659,12 +645,12 @@ void uart_lld_start(UARTDriver *uartp) {
                             STM32_UART_USART6_IRQ_PRIORITY,
                             (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
                             (void *)uartp);
-      chDbgAssert(!b, "uart_lld_start(), #11", "stream already allocated");
+      chDbgAssert(!b, "uart_lld_start(), #15", "stream already allocated");
       b = dmaStreamAllocate(uartp->dmatx,
                             STM32_UART_USART6_IRQ_PRIORITY,
                             (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
                             (void *)uartp);
-      chDbgAssert(!b, "uart_lld_start(), #12", "stream already allocated");
+      chDbgAssert(!b, "uart_lld_start(), #16", "stream already allocated");
       rccEnableUSART6(FALSE);
       nvicEnableVector(STM32_USART6_NUMBER,
                        CORTEX_PRIORITY_MASK(STM32_UART_USART6_IRQ_PRIORITY));
diff --git a/os/hal/platforms/STM32/USARTv1/uart_lld.h b/os/hal/platforms/STM32/USARTv1/uart_lld.h
index 021e0bc37..d9531ad7a 100644
--- a/os/hal/platforms/STM32/USARTv1/uart_lld.h
+++ b/os/hal/platforms/STM32/USARTv1/uart_lld.h
@@ -80,7 +80,7 @@
  * @details If set to @p TRUE the support for UART5 is included.
  * @note    The default is @p FALSE.
  */
-#if !defined(STM32_UART_USE_UART4) || defined(__DOXYGEN__)
+#if !defined(STM32_UART_USE_UART5) || defined(__DOXYGEN__)
 #define STM32_UART_USE_UART5                FALSE
 #endif
 
@@ -335,25 +335,25 @@
 #endif
 
 #if STM32_UART_USE_UART4 
-  #if !STM32_HAS_UART4
-  #error "UART4 not present in the selected device"
-  #endif
-
-  #if !defined(STM32F2XX) && !defined(STM32F4XX)
-  #error "UART4 DMA access not supported in this platform"
-  #endif
+#if !STM32_HAS_UART4
+#error "UART4 not present in the selected device"
 #endif
 
+#if !defined(STM32F2XX) && !defined(STM32F4XX)
+#error "UART4 DMA access not supported in this platform"
+#endif
+#endif /* STM32_UART_USE_UART4 */
+
 #if STM32_UART_USE_UART5
-  #if !STM32_HAS_UART5
-  #error "UART5 not present in the selected device"
-  #endif
-
-  #if !defined(STM32F2XX) && !defined(STM32F4XX)
-  #error "UART5 DMA access not supported in this platform"
-  #endif
+#if !STM32_HAS_UART5
+#error "UART5 not present in the selected device"
 #endif
 
+#if !defined(STM32F2XX) && !defined(STM32F4XX)
+#error "UART5 DMA access not supported in this platform"
+#endif
+#endif /* STM32_UART_USE_UART5 */
+
 #if STM32_UART_USE_USART6 && !STM32_HAS_USART6
 #error "USART6 not present in the selected device"
 #endif
diff --git a/readme.txt b/readme.txt
index 9437f7235..eba963097 100644
--- a/readme.txt
+++ b/readme.txt
@@ -89,6 +89,8 @@
 *****************************************************************************
 
 *** 2.7.0 ***
+- FIX: Fixed UART4/5-related bugs in STM32 USARTv1 UART driver (bug #440)
+  (backported to 2.6.2).
 - FIX: Fixed STM32 OTG-FS wrong upper memory limit (bug #437)(backported
   to 2.6.2).
 - FIX: Fixed timing issue in the STM32 OTGv1 USB driver (bug #436)(backported
@@ -137,7 +139,7 @@
 - NEW: Added support for STM32F4xx backup RAM.
 - NEW: Added port support for SCP560B64.
 - NEW: Added DAC driver high level files and low level files templates.
-- NEW: Added support of UART4 and UART5 (STM32F4x and STM32F2x platforms)
+- NEW: Added support of UART4 and UART5 (STM32F4xx and STM32F2xx platforms)
   (feature request #28).
 - NEW: SPI driver for SPC560Pxx, SPC563Mxx, SPC564Axx, SPC56ELAxx, SPC560Dxx.
 - NEW: Support for SPC560Dxx devices.