git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_20.3.x@15653 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2022-06-11 08:21:21 +00:00 committed by Andrey
parent f4339dc756
commit 3fc4cbceab
1 changed files with 1 additions and 1 deletions

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@ -80,7 +80,7 @@
- FIX: Fixed STM32 RTCv2 registers synchronization errata (bug #1231).
- FIX: Fixed STM32 ADCv1 and ADCv5 do not allow prescaler divide value of 1
(bug #1230).
- FIX: Fixed missing chech on STM32 SPIv2 DMA settings for SPI1 (bug #1229).
- FIX: Fixed missing check on STM32 SPIv2 DMA settings for SPI1 (bug #1229).
- FIX: Fixed invalid handling of lwIP NETIF_FLAG_LINK_UP flag (bug #1227).
- FIX: Fixed missing TIM16/17 errata handling for STM32G0xx (bug #1226).
- FIX: Fixed missing ADC errata handling for STM32G0xx (bug #1225).