Introduced shared handlers for DMAv1.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13043 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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Giovanni Di Sirio
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file DMAv1/stm32_dma1_ch23.inc
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* @brief Shared DMA1 Channels 2 and 3 handler.
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*
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* @addtogroup STM32_DMA1_CH23_HANDLER
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* @{
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*/
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/* Other checks.*/
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#if !defined(STM32_DMA1_CH23_HANDLER)
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#error "STM32_DMA1_CH23_HANDLER not defined in stm32_isr.h"
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#endif
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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#if defined(STM32_DMA_REQUIRED) || defined(__DOXYGEN__)
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/**
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* @brief DMA1 streams 2 and 3 shared ISR.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(STM32_DMA1_CH23_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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/* Check on channel 2.*/
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dmaServeInterrupt(STM32_DMA1_STREAM2);
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/* Check on channel 3.*/
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dmaServeInterrupt(STM32_DMA1_STREAM3);
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OSAL_IRQ_EPILOGUE();
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}
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#endif
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/** @} */
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@ -0,0 +1,84 @@
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file DMAv1/stm32_dma1_ch4567.inc
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* @brief Shared DMA1 Channels 4, 5, 6 and 7 handler.
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*
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* @addtogroup STM32_DMA1_CH4567_HANDLER
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* @{
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*/
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/* Other checks.*/
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#if !defined(STM32_DMA1_CH4567_HANDLER)
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#error "STM32_DMA1_CH4567_HANDLER not defined in stm32_isr.h"
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#endif
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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#if defined(STM32_DMA_REQUIRED) || defined(__DOXYGEN__)
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/**
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* @brief DMA1 streams 4, 5, 6 and 7 shared ISR.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(STM32_DMA1_CH4567_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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/* Check on channel 4.*/
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dmaServeInterrupt(STM32_DMA1_STREAM4);
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/* Check on channel 5.*/
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dmaServeInterrupt(STM32_DMA1_STREAM5);
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/* Check on channel 6.*/
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dmaServeInterrupt(STM32_DMA1_STREAM6);
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/* Check on channel 7.*/
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dmaServeInterrupt(STM32_DMA1_STREAM7);
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OSAL_IRQ_EPILOGUE();
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}
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#endif
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/** @} */
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@ -51,6 +51,9 @@
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/* Driver interrupt handlers. */
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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#include "stm32_dma1_ch23.inc"
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#include "stm32_dma1_ch4567.inc"
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#include "stm32_exti0_1.inc"
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#include "stm32_exti0_1.inc"
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#include "stm32_exti2_3.inc"
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#include "stm32_exti2_3.inc"
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#include "stm32_exti4_15.inc"
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#include "stm32_exti4_15.inc"
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@ -73,52 +76,6 @@
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#include "stm32_tim16.inc"
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#include "stm32_tim16.inc"
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#include "stm32_tim17.inc"
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#include "stm32_tim17.inc"
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#if defined(STM32_DMA_REQUIRED) || defined(__DOXYGEN__)
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/**
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* @brief DMA1 streams 2 and 3 shared ISR.
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* @note It is declared here because this device has a non-standard
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* DMA shared IRQ handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(STM32_DMA1_CH23_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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/* Check on channel 2.*/
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dmaServeInterrupt(STM32_DMA1_STREAM2);
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/* Check on channel 3.*/
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dmaServeInterrupt(STM32_DMA1_STREAM3);
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OSAL_IRQ_EPILOGUE();
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}
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/**
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* @brief DMA1 streams 4, 5, 6 and 7 shared ISR.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(STM32_DMA1_CH4567_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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/* Check on channel 4.*/
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dmaServeInterrupt(STM32_DMA1_STREAM4);
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/* Check on channel 5.*/
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dmaServeInterrupt(STM32_DMA1_STREAM5);
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/* Check on channel 6.*/
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dmaServeInterrupt(STM32_DMA1_STREAM6);
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/* Check on channel 7.*/
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dmaServeInterrupt(STM32_DMA1_STREAM7);
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OSAL_IRQ_EPILOGUE();
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}
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#endif
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/* Driver exported functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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