From 448b07c24576724504e787391efc0fde15e5e02f Mon Sep 17 00:00:00 2001
From: Andrey Gusakov <dron0gus@gmail.com>
Date: Fri, 27 Oct 2023 15:59:21 +0300
Subject: [PATCH] STM32: ADCv2: integration with DMAv1 with MUX

---
 os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c | 9 +++++++++
 os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.h | 6 ++++++
 2 files changed, 15 insertions(+)

diff --git a/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c b/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c
index 53a5439cd..e1513a9b9 100644
--- a/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c
+++ b/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c
@@ -255,6 +255,9 @@ void adc_lld_start(ADCDriver *adcp) {
       osalDbgAssert(adcp->dmastp != NULL, "unable to allocate stream");
       dmaStreamSetPeripheral(adcp->dmastp, &ADC1->DR);
       rccEnableADC1(true);
+#if STM32_DMA_SUPPORTS_DMAMUX
+      dmaSetRequestSource(adcp->dmastp, STM32_DMAMUX1_ADC1);
+#endif
     }
 #endif /* STM32_ADC_USE_ADC1 */
 
@@ -267,6 +270,9 @@ void adc_lld_start(ADCDriver *adcp) {
       osalDbgAssert(adcp->dmastp != NULL, "unable to allocate stream");
       dmaStreamSetPeripheral(adcp->dmastp, &ADC2->DR);
       rccEnableADC2(true);
+#if STM32_DMA_SUPPORTS_DMAMUX
+      dmaSetRequestSource(adcp->dmastp, STM32_DMAMUX1_ADC2);
+#endif
     }
 #endif /* STM32_ADC_USE_ADC2 */
 
@@ -279,6 +285,9 @@ void adc_lld_start(ADCDriver *adcp) {
       osalDbgAssert(adcp->dmastp != NULL, "unable to allocate stream");
       dmaStreamSetPeripheral(adcp->dmastp, &ADC3->DR);
       rccEnableADC3(true);
+#if STM32_DMA_SUPPORTS_DMAMUX
+      dmaSetRequestSource(adcp->dmastp, STM32_DMAMUX1_ADC3);
+#endif
     }
 #endif /* STM32_ADC_USE_ADC3 */
 
diff --git a/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.h b/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.h
index 5202f946b..9db5da960 100644
--- a/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.h
+++ b/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.h
@@ -256,6 +256,10 @@
 #error "ADC driver activated but no ADC peripheral assigned"
 #endif
 
+#if STM32_DMA_SUPPORTS_DMAMUX
+
+#else /* !STM32_DMA_SUPPORTS_DMAMUX */
+
 #if STM32_ADC_USE_ADC1 &&                                                   \
     !STM32_DMA_IS_VALID_ID(STM32_ADC_ADC1_DMA_STREAM, STM32_ADC1_DMA_MSK)
 #error "invalid DMA stream associated to ADC1"
@@ -271,6 +275,8 @@
 #error "invalid DMA stream associated to ADC3"
 #endif
 
+#endif /* !STM32_DMA_SUPPORTS_DMAMUX */
+
 /* ADC clock related settings and checks.*/
 #if STM32_ADC_ADCPRE == ADC_CCR_ADCPRE_DIV2
 #define STM32_ADCCLK                        (STM32_PCLK2 / 2)