git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@59 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
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@ -62,8 +62,8 @@ UDEFS =
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UADEFS =
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UADEFS =
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# List ARM-mode C source files here
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# List ARM-mode C source files here
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ASRC = chcore.c main.c buzzer.c ../../src/lib/evtimer.c \
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ASRC = chcore.c main.c buzzer.c ../../src/lib/evtimer.c ../../test/test.c \
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../../test/test.c ../../ports/ARM7-LPC214x/GCC/lpc214x_serial.c \
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../../ports/ARM7-LPC214x/GCC/vic.c ../../ports/ARM7-LPC214x/GCC/lpc214x_serial.c \
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../../src/chinit.c ../../src/chlists.c ../../src/chdelta.c ../../src/chschd.c \
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../../src/chinit.c ../../src/chlists.c ../../src/chdelta.c ../../src/chschd.c \
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../../src/chthreads.c ../../src/chsem.c ../../src/chevents.c ../../src/chmsg.c \
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../../src/chthreads.c ../../src/chsem.c ../../src/chevents.c ../../src/chmsg.c \
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../../src/chsleep.c ../../src/chqueues.c ../../src/chserial.c
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../../src/chsleep.c ../../src/chqueues.c ../../src/chserial.c
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@ -20,7 +20,9 @@
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#include <ch.h>
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#include <ch.h>
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#include "lpc214x.h"
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#include "lpc214x.h"
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#include "vic.h"
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#include "lpc214x_serial.h"
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#include "lpc214x_serial.h"
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#include "buzzer.h"
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#include "buzzer.h"
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extern void IrqHandler(void);
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extern void IrqHandler(void);
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@ -62,7 +64,6 @@ extern void T0IrqHandler(void);
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* NOTE: Interrupts are still disabled.
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* NOTE: Interrupts are still disabled.
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*/
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*/
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void hwinit(void) {
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void hwinit(void) {
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int i;
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/*
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/*
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* All peripherals clock disabled by default in order to save power.
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* All peripherals clock disabled by default in order to save power.
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@ -110,17 +111,9 @@ void hwinit(void) {
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/*
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/*
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* Interrupt vectors assignment.
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* Interrupt vectors assignment.
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* NOTE: Better reset everything in the VIC, it is a HUGE source of trouble.
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*/
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*/
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VIC *vic = VICBase;
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InitVIC();
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vic->VIC_IntSelect = 0;
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VICDefVectAddr = (IOREG32)IrqHandler;
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vic->VIC_IntEnable = 0;
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vic->VIC_VectAddr = 0;
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for (i = 0; i < 16; i++) {
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vic->VIC_VectCntls[i] = 0;
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vic->VIC_VectAddrs[i] = 0;
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}
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vic->VIC_DefVectAddr = (IOREG32)IrqHandler;
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SetVICVector(T0IrqHandler, 0, SOURCE_Timer0);
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SetVICVector(T0IrqHandler, 0, SOURCE_Timer0);
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SetVICVector(UART0IrqHandler, 1, SOURCE_UART0);
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SetVICVector(UART0IrqHandler, 1, SOURCE_UART0);
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SetVICVector(UART1IrqHandler, 2, SOURCE_UART1);
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SetVICVector(UART1IrqHandler, 2, SOURCE_UART1);
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@ -128,7 +121,7 @@ void hwinit(void) {
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/*
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/*
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* System Timer initialization, 1ms intervals.
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* System Timer initialization, 1ms intervals.
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*/
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*/
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vic->VIC_IntEnable |= INTMASK(SOURCE_Timer0);
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VICIntEnable = INTMASK(SOURCE_Timer0);
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TC *timer = T0Base;
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TC *timer = T0Base;
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timer->TC_PR = VAL_TC0_PRESCALER;
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timer->TC_PR = VAL_TC0_PRESCALER;
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timer->TC_MR0 = (PCLK / CH_FREQUENCY) / (VAL_TC0_PRESCALER + 1);
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timer->TC_MR0 = (PCLK / CH_FREQUENCY) / (VAL_TC0_PRESCALER + 1);
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@ -167,21 +160,12 @@ void chSysHalt(void) {
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;
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;
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}
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}
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/*
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* Set a vector for an interrupt source, the vector is enabled too.
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*/
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void SetVICVector(void *handler, int vector, int source) {
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VIC *vicp = VICBase;
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vicp->VIC_VectAddrs[vector] = (IOREG32)handler;
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vicp->VIC_VectCntls[vector] = (IOREG32)(source | 0x20);
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}
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/*
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/*
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* Undefined Instruction exception handler.
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* Undefined Instruction exception handler.
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* Yellow LED + RED LED 2.
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* Yellow LED + RED LED 2.
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*/
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*/
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void UndHandler(void) {
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void UndHandler(void) {
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IO0SET = 0x80000C00;
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IO0SET = 0x80000C00;
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IO0CLR = 0x80000800;
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IO0CLR = 0x80000800;
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while(TRUE)
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while(TRUE)
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@ -193,6 +177,7 @@ void UndHandler(void) {
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* Yellow LED + RED LED 1.
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* Yellow LED + RED LED 1.
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*/
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*/
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void PrefetchHandler(void) {
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void PrefetchHandler(void) {
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IO0SET = 0x80000C00;
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IO0SET = 0x80000C00;
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IO0CLR = 0x80000400;
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IO0CLR = 0x80000400;
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while(TRUE)
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while(TRUE)
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@ -204,6 +189,7 @@ void PrefetchHandler(void) {
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* Yellow LED + both RED LEDs.
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* Yellow LED + both RED LEDs.
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*/
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*/
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void AbortHandler(void) {
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void AbortHandler(void) {
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IO0SET = 0x80000C00;
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IO0SET = 0x80000C00;
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IO0CLR = 0x80000C00;
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IO0CLR = 0x80000C00;
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while(TRUE)
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while(TRUE)
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@ -214,6 +200,7 @@ void AbortHandler(void) {
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* Non-vectored IRQs handling here.
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* Non-vectored IRQs handling here.
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*/
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*/
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void NonVectoredIrq(void) {
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void NonVectoredIrq(void) {
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VICVectAddr = 0;
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VICVectAddr = 0;
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}
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}
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@ -221,7 +208,8 @@ void NonVectoredIrq(void) {
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* Timer 0 IRQ handling here.
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* Timer 0 IRQ handling here.
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*/
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*/
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void Timer0Irq(void) {
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void Timer0Irq(void) {
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chSchTimerHandlerI();
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T0IR = 1; /* Clear interrupt on match MR0. */
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T0IR = 1; /* Clear interrupt on match MR0. */
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VICVectAddr = 0;
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VICVectAddr = 0;
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chSchTimerHandlerI();
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}
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}
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@ -19,16 +19,41 @@
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#include <ch.h>
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#include <ch.h>
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#include <avr/io.h>
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void hwinit(void) {
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/*
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* I/O ports setup.
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* Everything configured as input with pull-up initially.
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*/
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DDRA = 0;
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PORTA = 0xFF;
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DDRB = 0;
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PORTB = 0xFF;
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DDRC = 0;
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PORTC = 0xFF;
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DDRD = 0;
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PORTD = 0xFF;
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DDRE = 0;
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PORTE = 0xFF;
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DDRF = 0;
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PORTF = 0xFF;
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DDRG = 0;
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PORTG = 0xFF;
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/*
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* Enables Idle mode for SLEEP instruction.
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*/
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SMCR = 1;
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}
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void chSysPause(void) {
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void chSysPause(void) {
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chThdSetPriority(IDLEPRIO);
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chThdSetPriority(IDLEPRIO);
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asm volatile (
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"ldi r18, 1 \n\t" // SE bit
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"out 0x33, r18" // SMCR
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);
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while (TRUE) {
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while (TRUE) {
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asm volatile ("sleep");
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// asm volatile ("sleep");
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}
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}
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}
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}
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@ -19,6 +19,10 @@
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#include <ch.h>
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#include <ch.h>
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#include <avr/io.h>
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void hwinit(void);
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static BYTE8 waThread1[UserStackSize(32)];
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static BYTE8 waThread1[UserStackSize(32)];
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static t_msg Thread1(void *arg) {
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static t_msg Thread1(void *arg) {
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int main(int argc, char **argv) {
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int main(int argc, char **argv) {
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hwinit();
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chSysInit();
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chSysInit();
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chThdCreate(NORMALPRIO, 0, waThread1, sizeof(waThread1), Thread1, NULL);
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chThdCreate(NORMALPRIO, 0, waThread1, sizeof(waThread1), Thread1, NULL);
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chSysPause();
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chSysPause();
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#define SOURCE_USB 22
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#define SOURCE_USB 22
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#define INTMASK(n) (1 << (n))
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#define INTMASK(n) (1 << (n))
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#define ALLINTMASK (INTMASK(SOURCE_WDT) | INTMASK(SOURCE_ARMCore0) | \
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INTMASK(SOURCE_ARMCore1) | INTMASK(SOURCE_Timer0) | \
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INTMASK(SOURCE_Timer1) | INTMASK(SOURCE_UART0) | \
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INTMASK(SOURCE_UART1) | INTMASK(SOURCE_PWM0) | \
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INTMASK(SOURCE_I2C0) | INTMASK(SOURCE_SPI0) | \
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INTMASK(SOURCE_SPI1) | INTMASK(SOURCE_PLL) | \
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INTMASK(SOURCE_RTC) | INTMASK(SOURCE_EINT0) | \
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INTMASK(SOURCE_EINT1) | INTMASK(SOURCE_EINT2) | \
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INTMASK(SOURCE_EINT3) | INTMASK(SOURCE_ADC0) | \
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INTMASK(SOURCE_I2C1) | INTMASK(SOURCE_BOD) | \
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INTMASK(SOURCE_ADC1) | INTMASK(SOURCE_USB))
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typedef struct {
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typedef struct {
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IOREG32 VIC_IRQStatus;
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IOREG32 VIC_IRQStatus;
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IOREG32 UART_TER;
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IOREG32 UART_TER;
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} UART;
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} UART;
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/*typedef struct {
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union {
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IOREG8 UART_RBR;
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IOREG8 UART_THR;
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IOREG8 UART_DLL;
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IOREG8 f1[4];
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};
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union {
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IOREG8 UART_IER;
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IOREG8 UART_DLM;
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IOREG8 f2[4];
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};
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union {
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IOREG8 UART_IIR;
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IOREG8 UART_FCR;
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IOREG8 f3[4];
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};
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IOREG8 UART_LCR;
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IOREG8 f4[3];
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IOREG8 UART_MCR; // UART1 only
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IOREG8 f5[3];
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IOREG8 UART_LSR;
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IOREG8 f6[3];
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IOREG32 unused18;
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IOREG8 UART_SCR;
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IOREG8 f7[3];
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IOREG8 UART_ACR;
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IOREG8 f8[3];
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IOREG32 unused24;
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IOREG8 UART_FDR;
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IOREG8 f9[3];
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IOREG32 unused2C;
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IOREG8 UART_TER;
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IOREG8 f10[3];
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} UART;*/
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#define U0Base ((UART *)0xE000C000)
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#define U0Base ((UART *)0xE000C000)
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#define U0RBR (U0Base->UART_RBR)
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#define U0RBR (U0Base->UART_RBR)
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#define U0THR (U0Base->UART_THR)
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#define U0THR (U0Base->UART_THR)
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chFDDInit(&COM2, ib2, sizeof ib2, NULL, ob2, sizeof ob2, OutNotify2);
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chFDDInit(&COM2, ib2, sizeof ib2, NULL, ob2, sizeof ob2, OutNotify2);
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SetUARTI(U1Base, 38400, LCR_WL8 | LCR_STOP1 | LCR_NOPARITY, FCR_TRIGGER0);
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SetUARTI(U1Base, 38400, LCR_WL8 | LCR_STOP1 | LCR_NOPARITY, FCR_TRIGGER0);
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VICIntEnable |= INTMASK(SOURCE_UART0) | INTMASK(SOURCE_UART1);
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VICIntEnable = INTMASK(SOURCE_UART0) | INTMASK(SOURCE_UART1);
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}
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}
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- Changed the behavior of chEvtWaitTimeout() when the timeout parameter is
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- Changed the behavior of chEvtWaitTimeout() when the timeout parameter is
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set to zero, now it is consistent with all the other syscalls that have a
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set to zero, now it is consistent with all the other syscalls that have a
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timeout option.
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timeout option.
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- Reorganized all the inline definitions into a single file (inline.h).
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- Reorganized all the kernel inline definitions into a single file (inline.h).
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- Fixed a minor problem in the interrupt initialization code for the LPC214x
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demo, regrouped the VIC code into vic.c/vic.h.
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*** 0.3.4 ***
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*** 0.3.4 ***
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- Fixed a problem in chVTSetI().
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- Fixed a problem in chVTSetI().
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