git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@16378 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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@ -8,6 +8,26 @@
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</imports>
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<public>
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<definitions_early>
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<group description="SPI operation modes">
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<define name="SPI_MODE_CIRCULAR" value="1U << 0">
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<brief>Enables the circular buffer mode.</brief>
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</define>
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<define name="SPI_MODE_SLAVE" value="1U << 1">
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<brief>Enables the slave mode.</brief>
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</define>
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<define name="SPI_MODE_FSIZE_MASK" value="3U << 2">
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<brief>Memory buffers frame size.</brief>
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</define>
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<define name="SPI_MODE_FSIZE_8" value="0U << 2">
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<brief>Memory frame size is 8 bits</brief>
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</define>
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<define name="SPI_MODE_FSIZE_16" value="1U << 2">
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<brief>Memory frame size is 16 bits</brief>
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</define>
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<define name="SPI_MODE_FSIZE_32" value="2U << 2">
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<brief>Memory frame size is 32 bits</brief>
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</define>
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</group>
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<group description="SPI CS modes">
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<define name="SPI_SELECT_MODE_NONE" value="0">
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<brief>@p spiSelect() and @p spiUnselect() do nothing.</brief>
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@ -69,6 +89,10 @@
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</macro>
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</macros>
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<types>
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<typedef name="spi_mode_t">
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<brief>Type of SPI transfer mode options.</brief>
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<basetype ctype="uint_fast16_t" />
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</typedef>
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<typedef name="hal_spi_driver_c">
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<brief>Type of structure representing a SPI driver.</brief>
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<basetype ctype="struct hal_spi_driver" />
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@ -103,16 +127,9 @@
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architecture dependent, fields.
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</note>
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<fields>
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<condition check="SPI_SUPPORTS_CIRCULAR == TRUE">
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<field name="circular" ctype="bool">
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<brief>Enables the circular buffer mode.</brief>
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</field>
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</condition>
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<condition check="SPI_SUPPORTS_SLAVE_MODE == TRUE">
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<field name="slave" ctype="bool">
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<brief>Enables the slave mode.</brief>
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</field>
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</condition>
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<field name="mode" ctype="spi_mode_t">
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<brief>SPI transfer mode options.</brief>
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</field>
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<condition check="SPI_SELECT_MODE == SPI_SELECT_MODE_LINE">
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<field name="ssline" ctype="ioline_t">
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<brief>The chip select line.</brief>
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@ -146,6 +163,7 @@ spi_lld_config_fields;]]></verbatim>
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<verbatim><![CDATA[
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SPI_CONFIG_EXT_FIELDS]]></verbatim>
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</condition>
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</fields>
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</struct>
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<class type="regular" name="hal_spi_driver" namespace="spi"
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@ -199,7 +217,8 @@ osalDbgCheckClassI();
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osalDbgCheck((self != NULL) && (n > 0U));
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#if SPI_SUPPORTS_CIRCULAR
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osalDbgCheck((__spi_getfield(self, circular) == false) || ((n & 1U) == 0U));
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osalDbgCheck(((__spi_getfield(self, mode) & SPI_MODE_CIRCULAR) == 0U) ||
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((n & 1U) == 0U));
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#endif
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osalDbgAssert(self->state == HAL_DRV_STATE_READY, "not ready");
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@ -268,7 +287,8 @@ osalDbgCheckClassI();
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osalDbgCheck((self != NULL) && (n > 0U) &&
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(rxbuf != NULL) && (txbuf != NULL));
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#if SPI_SUPPORTS_CIRCULAR
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osalDbgCheck((__spi_getfield(self, circular) == false) || ((n & 1U) == 0U));
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osalDbgCheck(((__spi_getfield(self, mode) & SPI_MODE_CIRCULAR) == 0U) ||
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((n & 1U) == 0U));
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#endif
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osalDbgAssert(self->state == HAL_DRV_STATE_READY, "not ready");
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@ -341,7 +361,8 @@ osalDbgCheckClassI();
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osalDbgCheck((self != NULL) && (n > 0U) && (txbuf != NULL));
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#if SPI_SUPPORTS_CIRCULAR
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osalDbgCheck((__spi_getfield(self, circular) == false) || ((n & 1U) == 0U));
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osalDbgCheck(((__spi_getfield(self, mode) & SPI_MODE_CIRCULAR) == 0U) ||
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((n & 1U) == 0U));
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#endif
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osalDbgAssert(self->state == HAL_DRV_STATE_READY, "not ready");
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@ -410,7 +431,8 @@ osalDbgCheckClassI();
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osalDbgCheck((self != NULL) && (n > 0U) && (rxbuf != NULL));
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#if SPI_SUPPORTS_CIRCULAR
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osalDbgCheck((__spi_getfield(self, circular) == false) || ((n & 1U) == 0U));
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osalDbgCheck(((__spi_getfield(self, mode) & SPI_MODE_CIRCULAR) == 0U) ||
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((n & 1U) == 0U));
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#endif
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osalDbgAssert(self->state == HAL_DRV_STATE_READY, "not ready");
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@ -33,6 +33,41 @@
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/* Module constants. */
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/*===========================================================================*/
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/**
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* @name SPI operation modes
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* @{
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*/
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/**
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* @brief Enables the circular buffer mode.
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*/
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#define SPI_MODE_CIRCULAR 1U << 0
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/**
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* @brief Enables the slave mode.
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*/
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#define SPI_MODE_SLAVE 1U << 1
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/**
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* @brief Memory buffers frame size.
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*/
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#define SPI_MODE_FSIZE_MASK 3U << 2
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/**
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* @brief Memory frame size is 8 bits.
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*/
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#define SPI_MODE_FSIZE_8 0U << 2
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/**
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* @brief Memory frame size is 16 bits.
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*/
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#define SPI_MODE_FSIZE_16 1U << 2
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/**
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* @brief Memory frame size is 32 bits.
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*/
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#define SPI_MODE_FSIZE_32 2U << 2
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/** @} */
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/**
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* @name SPI CS modes
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* @{
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/* Module data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Type of SPI transfer mode options.
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*/
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typedef uint_fast16_t spi_mode_t;
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/**
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* @brief Type of structure representing a SPI driver.
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*/
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@ -187,18 +227,10 @@ typedef struct hal_spi_driver SPIDriver;
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* architecture dependent, fields.
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*/
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struct hal_spi_config {
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#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined (__DOXYGEN__)
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/**
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* @brief Enables the circular buffer mode.
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* @brief SPI transfer mode options.
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*/
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bool circular;
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#endif /* SPI_SUPPORTS_CIRCULAR == TRUE */
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#if (SPI_SUPPORTS_SLAVE_MODE == TRUE) || defined (__DOXYGEN__)
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/**
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* @brief Enables the slave mode.
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*/
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bool slave;
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#endif /* SPI_SUPPORTS_SLAVE_MODE == TRUE */
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spi_mode_t mode;
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#if (SPI_SELECT_MODE == SPI_SELECT_MODE_LINE) || defined (__DOXYGEN__)
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/**
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* @brief The chip select line.
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@ -120,8 +120,7 @@ SPIDriver SPID6;
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* Default SPI configuration.
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*/
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static const hal_spi_config_t spi_default_config = {
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.circular = false,
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.slave = false,
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.mode = 0U,
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#if (SPI_SELECT_MODE == SPI_SELECT_MODE_LINE) || defined (__DOXYGEN__)
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.ssline = PAL_LINE(STM32_SPI_DEFAULT_PORT, STM32_SPI_DEFAULT_PAD);
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#elif SPI_SELECT_MODE == SPI_SELECT_MODE_PORT
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uint32_t cr1, cr2;
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/* SPI setup.*/
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if (config->slave) {
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if ((config->mode & SPI_MODE_SLAVE) != 0U) {
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cr1 = config->cr1 & ~(SPI_CR1_MSTR | SPI_CR1_SPE);
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cr2 = config->cr2 | SPI_CR2_FRXTH | SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN;
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}
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*/
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static void spi_lld_disable(SPIDriver *spip) {
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if (!__spi_getfield(spip, slave)) {
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if ((__spi_getfield(spip, mode) & SPI_MODE_SLAVE) == 0U) {
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/* Master mode, stopping gracefully.*/
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/* Stopping TX DMA channel.*/
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/* Reporting the failure.*/
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__spi_isr_error_code(spip, HAL_RET_HW_FAILURE);
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}
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else if (__spi_getfield(spip, circular)) {
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else if ((__spi_getfield(spip, mode) & SPI_MODE_CIRCULAR) != 0U) {
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if ((flags & STM32_DMA_ISR_HTIF) != 0U) {
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/* Half buffer interrupt.*/
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__spi_isr_half_code(spip);
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const hal_spi_config_t *spi_lld_configure(hal_spi_driver_c *spip,
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const hal_spi_config_t *config) {
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uint32_t ds;
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spi_mode_t mode = __spi_getfield(spip, mode);
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if (config == NULL) {
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config = &spi_default_config;
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spi_lld_disable(spip);
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/* Configuration-specific DMA setup.*/
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spip->rxdmamode &= ~STM32_DMA_CR_SIZE_MASK;
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spip->txdmamode &= ~STM32_DMA_CR_SIZE_MASK;
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/* Size of the peripheral port large enough to accommodate the physical
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frame size.*/
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ds = __spi_getfield(spip, cr2) & SPI_CR2_DS;
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if (!ds || (ds <= (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0))) {
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/* Frame width is 8 bits or smaller.*/
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spip->rxdmamode = (spip->rxdmamode & ~STM32_DMA_CR_SIZE_MASK) |
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STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE;
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spip->txdmamode = (spip->txdmamode & ~STM32_DMA_CR_SIZE_MASK) |
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STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE;
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spip->rxdmamode |= STM32_DMA_CR_PSIZE_BYTE;
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spip->txdmamode |= STM32_DMA_CR_PSIZE_BYTE;
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}
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else {
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/* Frame width is larger than 8 bits.*/
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spip->rxdmamode = (spip->rxdmamode & ~STM32_DMA_CR_SIZE_MASK) |
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STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
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spip->txdmamode = (spip->txdmamode & ~STM32_DMA_CR_SIZE_MASK) |
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STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
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spip->rxdmamode |= STM32_DMA_CR_PSIZE_HWORD;
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spip->txdmamode |= STM32_DMA_CR_PSIZE_HWORD;
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}
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if (__spi_getfield(spip, circular)) {
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/* Size of the memory port as specified in the configuration. This may
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result in data truncation or zero-padding if the peripheral and memory
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port sizes differ.
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The behavior is also different between DMAv1 and DMAv2.*/
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switch (mode & SPI_MODE_FSIZE_MASK) {
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case SPI_MODE_FSIZE_8:
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spip->rxdmamode |= STM32_DMA_CR_MSIZE_BYTE;
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spip->txdmamode |= STM32_DMA_CR_MSIZE_BYTE;
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break;
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case SPI_MODE_FSIZE_16:
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spip->rxdmamode |= STM32_DMA_CR_MSIZE_HWORD;
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spip->txdmamode |= STM32_DMA_CR_MSIZE_HWORD;
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break;
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case SPI_MODE_FSIZE_32:
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spip->rxdmamode |= STM32_DMA_CR_MSIZE_WORD;
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spip->txdmamode |= STM32_DMA_CR_MSIZE_WORD;
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break;
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default:
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/* Unsupported mode.*/
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return NULL;
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}
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if ((mode & SPI_MODE_CIRCULAR) != 0U) {
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spip->rxdmamode |= (STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE);
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spip->txdmamode |= (STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE);
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}
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osalDbgCheck((self != NULL) && (n > 0U));
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#if SPI_SUPPORTS_CIRCULAR
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osalDbgCheck((__spi_getfield(self, circular) == false) || ((n & 1U) == 0U));
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osalDbgCheck(((__spi_getfield(self, mode) & SPI_MODE_CIRCULAR) == 0U) ||
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((n & 1U) == 0U));
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#endif
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osalDbgAssert(self->state == HAL_DRV_STATE_READY, "not ready");
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osalDbgCheck((self != NULL) && (n > 0U) &&
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(rxbuf != NULL) && (txbuf != NULL));
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#if SPI_SUPPORTS_CIRCULAR
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osalDbgCheck((__spi_getfield(self, circular) == false) || ((n & 1U) == 0U));
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osalDbgCheck(((__spi_getfield(self, mode) & SPI_MODE_CIRCULAR) == 0U) ||
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((n & 1U) == 0U));
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#endif
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osalDbgAssert(self->state == HAL_DRV_STATE_READY, "not ready");
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osalDbgCheck((self != NULL) && (n > 0U) && (txbuf != NULL));
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#if SPI_SUPPORTS_CIRCULAR
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osalDbgCheck((__spi_getfield(self, circular) == false) || ((n & 1U) == 0U));
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osalDbgCheck(((__spi_getfield(self, mode) & SPI_MODE_CIRCULAR) == 0U) ||
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((n & 1U) == 0U));
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#endif
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osalDbgAssert(self->state == HAL_DRV_STATE_READY, "not ready");
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osalDbgCheck((self != NULL) && (n > 0U) && (rxbuf != NULL));
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#if SPI_SUPPORTS_CIRCULAR
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osalDbgCheck((__spi_getfield(self, circular) == false) || ((n & 1U) == 0U));
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osalDbgCheck(((__spi_getfield(self, mode) & SPI_MODE_CIRCULAR) == 0U) ||
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((n & 1U) == 0U));
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#endif
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osalDbgAssert(self->state == HAL_DRV_STATE_READY, "not ready");
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