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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4939 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2012-12-17 11:29:39 +00:00
parent 557d6e7520
commit 478679edd2
2 changed files with 4 additions and 4 deletions
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6
os/hal/platforms/SPC560BCxx/hal_lld.c
View File

@ -110,17 +110,17 @@ void spc_clock_init(void) {
while (!ME.GS.B.S_FIRC) while (!ME.GS.B.S_FIRC)
; ;
#if !SPC5_NO_INIT
/* Oscillators dividers setup.*/ /* Oscillators dividers setup.*/
CGM.FIRC_CTL.B.RCDIV = SPC5_IRCDIV_VALUE - 1; CGM.FIRC_CTL.B.RCDIV = SPC5_IRCDIV_VALUE - 1;
CGM.FXOSC_CTL.B.OSCDIV = SPC5_XOSCDIV_VALUE - 1; CGM.FXOSC_CTL.B.OSCDIV = SPC5_XOSCDIV_VALUE - 1;
#if !SPC5_NO_INIT
#if defined(SPC5_OSC_BYPASS) #if defined(SPC5_OSC_BYPASS)
/* If the board is equipped with an oscillator instead of a xtal then the /* If the board is equipped with an oscillator instead of a xtal then the
bypass must be activated.*/ bypass must be activated.*/
CGM.OSC_CTL.B.OSCBYP = TRUE; CGM.OSC_CTL.B.OSCBYP = TRUE;
#endif /* SPC5_ENABLE_XOSC */ #endif /* SPC5_OSC_BYPASS */
/* Initialization of the FMPLLs settings.*/ /* Initialization of the FMPLLs settings.*/
CGM.FMPLL_CR.R = SPC5_FMPLL0_ODF | CGM.FMPLL_CR.R = SPC5_FMPLL0_ODF |

2
os/hal/platforms/SPC560Pxx/hal_lld.c
View File

@ -116,7 +116,7 @@ void spc_clock_init(void) {
/* If the board is equipped with an oscillator instead of a xtal then the /* If the board is equipped with an oscillator instead of a xtal then the
bypass must be activated.*/ bypass must be activated.*/
CGM.OSC_CTL.B.OSCBYP = TRUE; CGM.OSC_CTL.B.OSCBYP = TRUE;
#endif /* SPC5_ENABLE_XOSC */ #endif /* SPC5_OSC_BYPASS */
/* Initialization of the FMPLLs settings.*/ /* Initialization of the FMPLLs settings.*/
CGM.FMPLL[0].CR.R = SPC5_FMPLL0_ODF | CGM.FMPLL[0].CR.R = SPC5_FMPLL0_ODF |