Cross-core signaling now apparently works.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14156 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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4913569895
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@ -65,6 +65,22 @@ static const os_instance_config_t core1_cfg = {
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#endif
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};
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/*
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* Green LED blinker thread, times are in milliseconds.
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*/
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static THD_WORKING_AREA(waThreadTimer, 128);
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static THD_FUNCTION(ThreadTimer, arg) {
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extern semaphore_t blinker_sem;
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(void)arg;
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chRegSetThreadName("timer");
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while (true) {
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chThdSleepMilliseconds(500);
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chSemSignal(&blinker_sem);
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}
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}
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/**
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* Core 1 entry point.
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*/
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@ -90,6 +106,11 @@ void c1_main(void) {
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sioStart(&SIOD1, NULL);
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sioStartOperation(&SIOD1, NULL);
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/*
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* Creates the timer thread.
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*/
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chThdCreateStatic(waThreadTimer, sizeof(waThreadTimer), NORMALPRIO, ThreadTimer, NULL);
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/*
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* Shell manager initialization.
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*/
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@ -17,6 +17,8 @@
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#include "ch.h"
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#include "hal.h"
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semaphore_t blinker_sem;
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/*
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* Green LED blinker thread, times are in milliseconds.
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*/
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@ -26,10 +28,8 @@ static THD_FUNCTION(Thread1, arg) {
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(void)arg;
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chRegSetThreadName("blinker");
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while (true) {
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palClearLine(25U);
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chThdSleepMilliseconds(500);
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palSetLine(25U);
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chThdSleepMilliseconds(500);
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chSemWait(&blinker_sem);
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palToggleLine(25U);
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}
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}
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@ -43,6 +43,15 @@ static void start_core1(void) {
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(uint32_t)_crt0_c1_entry};
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unsigned seq;
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#if 0
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/* Resetting core1.*/
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PSM_SET->FRCE_OFF = PSM_ANY_PROC1;
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while ((PSM->FRCE_OFF & PSM_ANY_PROC1) == 0U) {
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}
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PSM_CLR->FRCE_OFF = PSM_ANY_PROC1;
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#endif
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/* Starting core 1.*/
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seq = 0;
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do {
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uint32_t response;
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@ -77,7 +86,9 @@ int main(void) {
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/*
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* Starting core 1 after performing all OS-related initializations.
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*/
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chSysSuspend();
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start_core1();
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chSysEnable();
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/*
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* Setting up GPIOs.
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@ -87,6 +98,7 @@ int main(void) {
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/*
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* Creates the blinker thread.
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*/
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chSemObjectInit(&blinker_sem, 0);
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chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
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/*
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@ -110,10 +110,14 @@ void PendSV_Handler(void) {
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*
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* @isr
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*/
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CH_IRQ_HANDLER(RP_SIO_IRQ_PROC0_HANDLER) {
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CH_IRQ_HANDLER(Vector7C) {
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CH_IRQ_PROLOGUE();
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/* Error flags cleared and ignored.*/
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SIO->FIFO_ST = SIO_FIFO_ST_ROE | SIO_FIFO_ST_WOF;
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/* Read FIFO is fully emptied.*/
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while ((SIO->FIFO_ST & SIO_FIFO_ST_VLD) != 0U) {
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uint32_t message = SIO->FIFO_RD;
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#if defined(PORT_HANDLE_FIFO_MESSAGE)
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@ -136,10 +140,14 @@ CH_IRQ_HANDLER(RP_SIO_IRQ_PROC0_HANDLER) {
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*
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* @isr
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*/
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CH_IRQ_HANDLER(RP_SIO_IRQ_PROC1_HANDLER) {
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CH_IRQ_HANDLER(Vector80) {
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CH_IRQ_PROLOGUE();
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/* Error flags cleared and ignored.*/
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SIO->FIFO_ST = SIO_FIFO_ST_ROE | SIO_FIFO_ST_WOF;
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/* Read FIFO is fully emptied.*/
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while ((SIO->FIFO_ST & SIO_FIFO_ST_VLD) != 0U) {
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uint32_t message = SIO->FIFO_RD;
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#if defined(PORT_HANDLE_FIFO_MESSAGE)
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@ -180,11 +188,14 @@ void port_init(os_instance_t *oip) {
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#if CH_CFG_SMP_MODE != FALSE
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/* FIFO handlers for each core.*/
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SIO->FIFO_ST = SIO_FIFO_ST_ROE | SIO_FIFO_ST_WOF;
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if (core_id == 0U) {
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NVIC_SetPriority(15, CORTEX_MAX_KERNEL_PRIORITY);
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NVIC_SetPriority(15, CORTEX_MINIMUM_PRIORITY);
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NVIC_EnableIRQ(15);
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}
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else if (core_id == 1U) {
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NVIC_SetPriority(16, CORTEX_MAX_KERNEL_PRIORITY);
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NVIC_SetPriority(16, CORTEX_MINIMUM_PRIORITY);
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NVIC_EnableIRQ(16);
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}
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else {
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chDbgAssert(false, "unexpected core id");
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@ -520,13 +520,11 @@ __STATIC_INLINE void port_notify_instance(os_instance_t *oip) {
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(void)oip;
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/* Waiting for space into the FIFO.*/
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while ((SIO->FIFO_ST & SIO_FIFO_ST_RDY) == 0U) {
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__WFE();
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/* Sending a reschedule order to the other core if there is space in
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the FIFO.*/
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if ((SIO->FIFO_ST & SIO_FIFO_ST_RDY) != 0U) {
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SIO->FIFO_WR = PORT_FIFO_RESCHEDULE_MESSAGE;
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}
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/* Sending a reschedule order to the other core.*/
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SIO->FIFO_WR = PORT_FIFO_RESCHEDULE_MESSAGE;
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}
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/**
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