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RTC for F4x branch. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/rtc_dev@3585 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
barthess 2011-12-08 20:17:13 +00:00
parent 8a3ce5e273 8196de6aef
commit 4ca9e4ad31
477 changed files with 61720 additions and 5321 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

50
boards/OLIMEX_AVR_CAN/board.c
View File

@ -21,6 +21,38 @@
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
#if defined(PORTA)
{VAL_PORTA, VAL_DDRA},
#endif
#if defined(PORTB)
{VAL_PORTB, VAL_DDRB},
#endif
#if defined(PORTC)
{VAL_PORTC, VAL_DDRC},
#endif
#if defined(PORTD)
{VAL_PORTD, VAL_DDRD},
#endif
#if defined(PORTE)
{VAL_PORTE, VAL_DDRE},
#endif
#if defined(PORTF)
{VAL_PORTF, VAL_DDRF},
#endif
#if defined(PORTG)
{VAL_PORTG, VAL_DDRG},
#endif
};
#endif /* HAL_USE_PAL */
CH_IRQ_HANDLER(TIMER0_COMP_vect) {
CH_IRQ_PROLOGUE();
@ -37,24 +69,6 @@ CH_IRQ_HANDLER(TIMER0_COMP_vect) {
*/
void boardInit(void) {
/*
* I/O ports setup.
*/
DDRA = VAL_DDRA;
PORTA = VAL_PORTA;
DDRB = VAL_DDRB;
PORTB = VAL_PORTB;
DDRC = VAL_DDRC;
PORTC = VAL_PORTC;
DDRD = VAL_DDRD;
PORTD = VAL_PORTD;
DDRE = VAL_DDRE;
PORTE = VAL_PORTE;
DDRF = VAL_DDRF;
PORTF = VAL_PORTF;
DDRG = VAL_DDRG;
PORTG = VAL_PORTG;
/*
* External interrupts setup, all disabled initially.
*/

4
boards/OLIMEX_AVR_CAN/board.h
View File

@ -87,8 +87,8 @@
#define VAL_DDRG 0x00
#define VAL_PORTG 0x07
#define PORTE_LED (1 << 4)
#define PORTE_BUTTON (1 << 5)
#define PORTE_LED 4
#define PORTE_BUTTON 5
#if !defined(_FROM_ASM_)
#ifdef __cplusplus

55
boards/OLIMEX_AVR_MT_128/board.c
View File

@ -21,6 +21,41 @@
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
#if defined(PORTA)
{VAL_PORTA, VAL_DDRA},
#endif
#if defined(PORTB)
{VAL_PORTB, VAL_DDRB},
#endif
#if defined(PORTC)
{VAL_PORTC, VAL_DDRC},
#endif
#if defined(PORTD)
{VAL_PORTD, VAL_DDRD},
#endif
#if defined(PORTE)
{VAL_PORTE, VAL_DDRE},
#endif
#if defined(PORTF)
{VAL_PORTF, VAL_DDRF},
#endif
#if defined(PORTG)
{VAL_PORTG, VAL_DDRG},
#endif
};
#endif /* HAL_USE_PAL */
/**
* @brief Timer0 interrupt handler.
*/
CH_IRQ_HANDLER(TIMER0_COMP_vect) {
CH_IRQ_PROLOGUE();
@ -32,29 +67,11 @@ CH_IRQ_HANDLER(TIMER0_COMP_vect) {
CH_IRQ_EPILOGUE();
}
/*
/**
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* I/O ports setup.
*/
DDRA = VAL_DDRA;
PORTA = VAL_PORTA;
DDRB = VAL_DDRB;
PORTB = VAL_PORTB;
DDRC = VAL_DDRC;
PORTC = VAL_PORTC;
DDRD = VAL_DDRD;
PORTD = VAL_PORTD;
DDRE = VAL_DDRE;
PORTE = VAL_PORTE;
DDRF = VAL_DDRF;
PORTF = VAL_PORTF;
DDRG = VAL_DDRG;
PORTG = VAL_PORTG;
/*
* External interrupts setup, all disabled initially.
*/

33
boards/OLIMEX_AVR_MT_128/board.h
View File

@ -93,23 +93,24 @@
#define VAL_DDRG 0x00
#define VAL_PORTG 0x07
#define PORTA_BUTTON1 (1 << 0)
#define PORTA_BUTTON2 (1 << 1)
#define PORTA_BUTTON3 (1 << 2)
#define PORTA_BUTTON4 (1 << 3)
#define PORTA_BUTTON5 (1 << 4)
#define PORTA_DALLAS (1 << 5)
#define PORTA_RELAY (1 << 6)
#define PORTC_44780_RS (1 << 0)
#define PORTC_44780_RW (1 << 1)
#define PORTC_44780_E (1 << 2)
#define PORTC_44780_D4 (1 << 4)
#define PORTC_44780_D5 (1 << 5)
#define PORTC_44780_D6 (1 << 6)
#define PORTC_44780_D7 (1 << 7)
#define PORTC_44780_DATA (PORTC_44780_D4 | PORTC_44780_D5 | \
PORTC_44780_D6 | PORTC_44780_D7)
#define PORTA_BUTTON1 0
#define PORTA_BUTTON2 1
#define PORTA_BUTTON3 2
#define PORTA_BUTTON4 3
#define PORTA_BUTTON5 4
#define PORTA_DALLAS 5
#define PORTA_RELAY 6
#define PORTC_44780_RS_MASK (1 << 0)
#define PORTC_44780_RW_MASK (1 << 1)
#define PORTC_44780_E_MASK (1 << 2)
#define PORTC_44780_D4_MASK (1 << 4)
#define PORTC_44780_D5_MASK (1 << 5)
#define PORTC_44780_D6_MASK (1 << 6)
#define PORTC_44780_D7_MASK (1 << 7)
#define PORTC_44780_DATA_MASK (PORTC_44780_D4_MASK | PORTC_44780_D5_MASK | \
PORTC_44780_D6_MASK | PORTC_44780_D7_MASK)
#define PORTE_BUZZ1 (1 << 4)
#define PORTE_BUZZ2 (1 << 5)

7
boards/OLIMEX_LPC_P2148/board.mk
View File

@ -1,8 +1,5 @@
# Board directory path
BOARDPATH = ${CHIBIOS}/boards/OLIMEX_LPC_P2148/
# List of all the mandatory board related files.
BOARDSRC = ${BOARDPATH}/board.c
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_LPC_P2148/board.c
# Required include directories
BOARDINC = ${BOARDPATH}
BOARDINC = ${CHIBIOS}/boards/OLIMEX_LPC_P2148

54
boards/OLIMEX_STM32_103STK/board.c Normal file
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@ -0,0 +1,54 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

162
boards/OLIMEX_STM32_103STK/board.h Normal file
View File

@ -0,0 +1,162 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for the Olimex STM32-103STK proto board.
*/
/*
* Board identifier.
*/
#define BOARD_OLIMEX_STM32_103STK
#define BOARD_NAME "Olimex STM32-103STK"
/*
* Board frequencies.
*/
#define STM32_LSECLK 32768
#define STM32_HSECLK 8000000
/*
* MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
*/
#define STM32F10X_MD
/*
* IO pins assignments.
*/
#define GPIOA_BUTTON_WAKEUP 0
#define GPIOC_BUTTON_TAMPER 13
#define GPIOC_JOY 5
#define GPIOC_JOY_CENTER_BUT 6
#define GPIOA_SPI1NSS 4
#define GPIOB_SPI2NSS 12
#define GPIOC_MMCWP 2
#define GPIOC_MMCCP 1
#define GPIOC_USB_P 4
#define GPIOC_LCD_RES 7
#define GPIOC_NRF_CE 8
#define GPIOC_NRF_IRQ 9
#define GPIOC_LCD_E 10
#define GPIOC_USB_DISC 11
#define GPIOC_LED 12
#define GPIOB_ACCEL_IRQ 5
/*
* I/O ports initial setup, this configuration is established soon after reset
* in the initialization code.
*
* The digits have the following meaning:
* 0 - Analog input.
* 1 - Push Pull output 10MHz.
* 2 - Push Pull output 2MHz.
* 3 - Push Pull output 50MHz.
* 4 - Digital input.
* 5 - Open Drain output 10MHz.
* 6 - Open Drain output 2MHz.
* 7 - Open Drain output 50MHz.
* 8 - Digital input with PullUp or PullDown resistor depending on ODR.
* 9 - Alternate Push Pull output 10MHz.
* A - Alternate Push Pull output 2MHz.
* B - Alternate Push Pull output 50MHz.
* C - Reserved.
* D - Alternate Open Drain output 10MHz.
* E - Alternate Open Drain output 2MHz.
* F - Alternate Open Drain output 50MHz.
* Please refer to the STM32 Reference Manual for details.
*/
/*
* Port A setup.
* Everything input with pull-up except:
* PA0 - Normal input (BUTTON).
* PA2 - Alternate output (USART2 TX).
* PA3 - Normal input (USART2 RX).
*/
#define VAL_GPIOACRL 0x88884B84 /* PA7...PA0 */
#define VAL_GPIOACRH 0x88888888 /* PA15...PA8 */
#define VAL_GPIOAODR 0xFFFFFFFF
/*
* Port B setup.
* Everything input with pull-up except:
* PB6,7 - Alternate open drain (I2C1).
* PB10,11 - Alternate open drain (I2C2).
* PB12 - Push Pull output (MMC SPI2 NSS).
* PB13 - Alternate output (MMC SPI2 SCK).
* PB14 - Normal input (MMC SPI2 MISO).
* PB15 - Alternate output (MMC SPI2 MOSI).
*/
#define VAL_GPIOBCRL 0xEE888888 /* PB7...PB0 */
#define VAL_GPIOBCRH 0xB4B3EE88 /* PB15...PB8 */
#define VAL_GPIOBODR 0xFFFFFFFF
/*
* Port C setup.
* Everything input with pull-up except:
* PC4 - Normal input because there is an external resistor.
* PC5 - Analog input (joystick).
* PC6 - Normal input because there is an external resistor.
* PC7 - Normal input because there is an external resistor.
* PC10 - Push Pull output (CAN CNTRL).
* PC11 - Push Pull output (USB DISC).
* PC12 - Open Drain output (LED).
*/
#define VAL_GPIOCCRL 0x44048888 /* PC7...PC0 */
#define VAL_GPIOCCRH 0x88863388 /* PC15...PC8 */
#define VAL_GPIOCODR 0xFFFFFFFF
/*
* Port D setup.
* Everything input with pull-up except:
* PD0 - Normal input (XTAL).
* PD1 - Normal input (XTAL).
*/
#define VAL_GPIODCRL 0x88888844 /* PD7...PD0 */
#define VAL_GPIODCRH 0x88888888 /* PD15...PD8 */
#define VAL_GPIODODR 0xFFFFFFFF
/*
* Port E setup.
* Everything input with pull-up except:
*/
#define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */
#define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */
#define VAL_GPIOEODR 0xFFFFFFFF
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

5
boards/OLIMEX_STM32_103STK/board.mk Normal file
View File

@ -0,0 +1,5 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_STM32_103STK/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_STM32_103STK

10
boards/OLIMEX_STM32_P103/board.h
View File

@ -135,6 +135,16 @@
#define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */
#define VAL_GPIOEODR 0xFFFFFFFF
/*
* USB bus activation macro, required by the USB driver.
*/
#define usb_lld_connect_bus(usbp) palClearPad(GPIOC, GPIOC_USB_DISC)
/*
* USB bus de-activation macro, required by the USB driver.
*/
#define usb_lld_disconnect_bus(usbp) palSetPad(GPIOC, GPIOC_USB_DISC)
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {

5
boards/OLIMEX_STM32_P107/board.h
View File

@ -42,6 +42,11 @@
*/
#define STM32F10X_CL
/*
* Ethernet PHY type.
*/
#define BOARD_PHY_ID MII_STE101P_ID
/*
* IO pins assignments.
*/

21
boards/ST_STM3220G_EVAL/board.h
View File

@ -84,22 +84,7 @@
#define PIN_PUDR_FLOATING(n) (0 << ((n) * 2))
#define PIN_PUDR_PULLUP(n) (1 << ((n) * 2))
#define PIN_PUDR_PULLDOWN(n) (2 << ((n) * 2))
#define PIN_AFIO_AF0(n) (0 << ((n % 8) * 4))
#define PIN_AFIO_AF1(n) (1 << ((n % 8) * 4))
#define PIN_AFIO_AF2(n) (2 << ((n % 8) * 4))
#define PIN_AFIO_AF3(n) (3 << ((n % 8) * 4))
#define PIN_AFIO_AF4(n) (4 << ((n % 8) * 4))
#define PIN_AFIO_AF5(n) (5 << ((n % 8) * 4))
#define PIN_AFIO_AF6(n) (6 << ((n % 8) * 4))
#define PIN_AFIO_AF7(n) (7 << ((n % 8) * 4))
#define PIN_AFIO_AF8(n) (8 << ((n % 8) * 4))
#define PIN_AFIO_AF9(n) (9 << ((n % 8) * 4))
#define PIN_AFIO_AF10(n) (10 << ((n % 8) * 4))
#define PIN_AFIO_AF11(n) (11 << ((n % 8) * 4))
#define PIN_AFIO_AF12(n) (12 << ((n % 8) * 4))
#define PIN_AFIO_AF13(n) (13 << ((n % 8) * 4))
#define PIN_AFIO_AF14(n) (14 << ((n % 8) * 4))
#define PIN_AFIO_AF15(n) (15 << ((n % 8) * 4))
#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4))
/*
* Port A setup.
@ -157,8 +142,8 @@
PIN_PUDR_FLOATING(15)))
#define VAL_GPIOC_ODR 0xFFFFFFFF
#define VAL_GPIOC_AFRL 0x00000000
#define VAL_GPIOC_AFRH (PIN_AFIO_AF7(10) | \
PIN_AFIO_AF7(11))
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(7, 10) | \
PIN_AFIO_AF(7, 11))
/*
* Port D setup.

58
boards/ST_STM32F4_DISCOVERY/board.c Normal file
View File

@ -0,0 +1,58 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

449
boards/ST_STM32F4_DISCOVERY/board.h Normal file
View File

@ -0,0 +1,449 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for STMicroelectronics STM32F4-Discovery board.
*/
/*
* Board identifier.
*/
#define BOARD_ST_STM32F4_DISCOVERY
#define BOARD_NAME "ST STM32F4-Discovery"
/*
* Board frequencies.
* NOTE: The LSE crystal is not fitted by default on the board.
*/
#define STM32_LSECLK 0
#define STM32_HSECLK 8000000
/*
* Board voltages.
* Required for performance limits calculation.
*/
#define STM32_VDD 300
/*
* MCU type as defined in the ST header file stm32f4xx.h.
*/
#define STM32F4XX
/*
* IO pins assignments.
*/
#define GPIOA_BUTTON 0
#define GPIOA_LRCK 4
#define GPIOA_SPC 5
#define GPIOA_SDO 6
#define GPIOA_SDI 7
#define GPIOA_VBUS_FS 9
#define GPIOA_OTG_FS_ID 10
#define GPIOA_OTG_FS_DM 11
#define GPIOA_OTG_FS_DP 12
#define GPIOA_SWDIO 13
#define GPIOA_SWCLK 14
#define GPIOB_SWO 3
#define GPIOB_SCL 6
#define GPIOB_SDA 9
#define GPIOB_SCK 10
#define GPIOC_OTG_FS_POWER_ON 0
#define GPIOC_DOUT 3
#define GPIOC_MCLK 7
#define GPIOC_SCLK 10
#define GPIOC_SDIN 12
#define GPIOD_RESET 4
#define GPIOD_OVER_CURRENT 5
#define GPIOD_LED4 12 /* Green LED. */
#define GPIOD_LED3 13 /* Orange LED. */
#define GPIOD_LED5 14 /* Red LED. */
#define GPIOD_LED6 15 /* Blue LED. */
#define GPIOE_INT1 0
#define GPIOE_INT2 1
#define GPIOE_CS_SPI 3
#define GPIOH_OSC_IN 0
#define GPIOH_OSC_OUT 1
/*
* I/O ports initial setup, this configuration is established soon after reset
* in the initialization code.
* Please refer to the STM32 Reference Manual for details.
*/
#define PIN_MODE_INPUT(n) (0U << ((n) * 2))
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2))
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2))
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2))
#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
#define PIN_OSPEED_2M(n) (0U << ((n) * 2))
#define PIN_OSPEED_25M(n) (1U << ((n) * 2))
#define PIN_OSPEED_50M(n) (2U << ((n) * 2))
#define PIN_OSPEED_100M(n) (3U << ((n) * 2))
#define PIN_PUDR_FLOATING(n) (0U << ((n) * 2))
#define PIN_PUDR_PULLUP(n) (1U << ((n) * 2))
#define PIN_PUDR_PULLDOWN(n) (2U << ((n) * 2))
#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4))
/*
* Port A setup.
* All input with pull-up except:
* PA0 - GPIOA_BUTTON (input floating).
* PA4 - GPIOA_LRCK (alternate 6).
* PA5 - GPIOA_SPC (alternate 5).
* PA6 - GPIOA_SDO (alternate 5).
* PA7 - GPIOA_SDI (alternate 5).
* PA9 - GPIOA_VBUS_FS (input floating).
* PA10 - GPIOA_OTG_FS_ID (alternate 10).
* PA11 - GPIOA_OTG_FS_DM (alternate 10).
* PA12 - GPIOA_OTG_FS_DP (alternate 10).
* PA13 - GPIOA_SWDIO (alternate 0).
* PA14 - GPIOA_SWCLK (alternate 0).
*/
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \
PIN_MODE_INPUT(1) | \
PIN_MODE_INPUT(2) | \
PIN_MODE_INPUT(3) | \
PIN_MODE_ALTERNATE(GPIOA_LRCK) | \
PIN_MODE_ALTERNATE(GPIOA_SPC) | \
PIN_MODE_ALTERNATE(GPIOA_SDO) | \
PIN_MODE_ALTERNATE(GPIOA_SDI) | \
PIN_MODE_INPUT(8) | \
PIN_MODE_INPUT(GPIOA_VBUS_FS) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
PIN_MODE_INPUT(15))
#define VAL_GPIOA_OTYPER 0x00000000
#define VAL_GPIOA_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOA_PUPDR (PIN_PUDR_FLOATING(GPIOA_BUTTON) | \
PIN_PUDR_PULLUP(1) | \
PIN_PUDR_PULLUP(2) | \
PIN_PUDR_PULLUP(3) | \
PIN_PUDR_FLOATING(GPIOA_LRCK) | \
PIN_PUDR_FLOATING(GPIOA_SPC) | \
PIN_PUDR_FLOATING(GPIOA_SDO) | \
PIN_PUDR_FLOATING(GPIOA_SDI) | \
PIN_PUDR_PULLUP(8) | \
PIN_PUDR_FLOATING(GPIOA_VBUS_FS) | \
PIN_PUDR_FLOATING(GPIOA_OTG_FS_ID) | \
PIN_PUDR_FLOATING(GPIOA_OTG_FS_DM) | \
PIN_PUDR_FLOATING(GPIOA_OTG_FS_DP) | \
PIN_PUDR_PULLUP(GPIOA_SWDIO) | \
PIN_PUDR_PULLDOWN(GPIOA_SWCLK) | \
PIN_PUDR_PULLUP(15))
#define VAL_GPIOA_ODR 0xFFFFFFFF
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_LRCK, 6) | \
PIN_AFIO_AF(GPIOA_SPC, 5) | \
PIN_AFIO_AF(GPIOA_SDO, 5) | \
PIN_AFIO_AF(GPIOA_SDI, 5))
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10) | \
PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \
PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \
PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
PIN_AFIO_AF(GPIOA_SWCLK, 0))
/*
* Port B setup.
* All input with pull-up except:
* PB3 - GPIOB_SWO (alternate 0).
* PB6 - GPIOB_SCL (alternate 4).
* PB9 - GPIOB_SDA (alternate 4).
*/
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(0) | \
PIN_MODE_INPUT(1) | \
PIN_MODE_INPUT(2) | \
PIN_MODE_ALTERNATE(GPIOB_SWO) | \
PIN_MODE_INPUT(4) | \
PIN_MODE_INPUT(5) | \
PIN_MODE_ALTERNATE(GPIOB_SCL) | \
PIN_MODE_INPUT(7) | \
PIN_MODE_INPUT(8) | \
PIN_MODE_ALTERNATE(GPIOB_SDA) | \
PIN_MODE_INPUT(10) | \
PIN_MODE_INPUT(11) | \
PIN_MODE_INPUT(12) | \
PIN_MODE_INPUT(13) | \
PIN_MODE_INPUT(14) | \
PIN_MODE_INPUT(15))
#define VAL_GPIOB_OTYPER (PIN_OTYPE_OPENDRAIN(GPIOB_SCL) | \
PIN_OTYPE_OPENDRAIN(GPIOB_SDA))
#define VAL_GPIOB_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOB_PUPDR (PIN_PUDR_PULLUP(0) | \
PIN_PUDR_PULLUP(1) | \
PIN_PUDR_PULLUP(2) | \
PIN_PUDR_FLOATING(GPIOB_SWO) | \
PIN_PUDR_PULLUP(4) | \
PIN_PUDR_PULLUP(5) | \
PIN_PUDR_FLOATING(GPIOB_SCL) | \
PIN_PUDR_PULLUP(7) | \
PIN_PUDR_PULLUP(8) | \
PIN_PUDR_FLOATING(GPIOB_SDA) | \
PIN_PUDR_PULLUP(10) | \
PIN_PUDR_PULLUP(11) | \
PIN_PUDR_PULLUP(12) | \
PIN_PUDR_PULLUP(13) | \
PIN_PUDR_PULLUP(14) | \
PIN_PUDR_PULLUP(15))
#define VAL_GPIOB_ODR 0xFFFFFFFF
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_SWO, 0) | \
PIN_AFIO_AF(GPIOB_SCL, 4))
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_SDA, 4))
/*
* Port C setup.
* All input with pull-up except:
* PC0 - GPIOC_OTG_FS_POWER_ON (output push-pull).
* PC7 - GPIOC_MCLK (alternate 6).
* PC10 - GPIOC_SCLK (alternate 6).
* PC12 - GPIOC_SDIN (alternate 6).
*/
#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) |\
PIN_MODE_INPUT(1) | \
PIN_MODE_INPUT(2) | \
PIN_MODE_INPUT(3) | \
PIN_MODE_INPUT(4) | \
PIN_MODE_INPUT(5) | \
PIN_MODE_INPUT(6) | \
PIN_MODE_ALTERNATE(GPIOC_MCLK) | \
PIN_MODE_INPUT(8) | \
PIN_MODE_INPUT(9) | \
PIN_MODE_ALTERNATE(GPIOC_SCLK) | \
PIN_MODE_INPUT(11) | \
PIN_MODE_ALTERNATE(GPIOC_SDIN) | \
PIN_MODE_INPUT(13) | \
PIN_MODE_INPUT(14) | \
PIN_MODE_INPUT(15))
#define VAL_GPIOC_OTYPER 0x00000000
#define VAL_GPIOC_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOC_PUPDR (PIN_PUDR_FLOATING(GPIOC_OTG_FS_POWER_ON) |\
PIN_PUDR_PULLUP(1) | \
PIN_PUDR_PULLUP(2) | \
PIN_PUDR_PULLUP(3) | \
PIN_PUDR_PULLUP(4) | \
PIN_PUDR_PULLUP(5) | \
PIN_PUDR_PULLUP(6) | \
PIN_PUDR_FLOATING(GPIOC_MCLK) | \
PIN_PUDR_PULLUP(8) | \
PIN_PUDR_PULLUP(9) | \
PIN_PUDR_FLOATING(GPIOC_SCLK) | \
PIN_PUDR_PULLUP(11) | \
PIN_PUDR_FLOATING(GPIOC_SDIN) | \
PIN_PUDR_PULLUP(13) | \
PIN_PUDR_PULLUP(14) | \
PIN_PUDR_PULLUP(15))
#define VAL_GPIOC_ODR 0xFFFFFFFF
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_MCLK, 6))
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_SCLK, 6) | \
PIN_AFIO_AF(GPIOC_SDIN, 6))
/*
* Port D setup.
* All input with pull-up except:
* PD4 - GPIOD_RESET (output push-pull).
* PD5 - GPIOD_OVER_CURRENT (input floating).
* PD12 - GPIOD_LED4 (output push-pull).
* PD13 - GPIOD_LED3 (output push-pull).
* PD14 - GPIOD_LED5 (output push-pull).
* PD15 - GPIOD_LED6 (output push-pull).
*/
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(0) | \
PIN_MODE_INPUT(1) | \
PIN_MODE_INPUT(2) | \
PIN_MODE_INPUT(3) | \
PIN_MODE_OUTPUT(GPIOD_RESET) | \
PIN_MODE_INPUT(GPIOD_OVER_CURRENT) | \
PIN_MODE_INPUT(6) | \
PIN_MODE_INPUT(7) | \
PIN_MODE_INPUT(8) | \
PIN_MODE_INPUT(9) | \
PIN_MODE_INPUT(10) | \
PIN_MODE_INPUT(11) | \
PIN_MODE_OUTPUT(GPIOD_LED4) | \
PIN_MODE_OUTPUT(GPIOD_LED3) | \
PIN_MODE_OUTPUT(GPIOD_LED5) | \
PIN_MODE_OUTPUT(GPIOD_LED6))
#define VAL_GPIOD_OTYPER 0x00000000
#define VAL_GPIOD_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOD_PUPDR (PIN_PUDR_PULLUP(0) | \
PIN_PUDR_PULLUP(1) | \
PIN_PUDR_PULLUP(2) | \
PIN_PUDR_PULLUP(3) | \
PIN_PUDR_FLOATING(GPIOD_RESET) | \
PIN_PUDR_FLOATING(GPIOD_OVER_CURRENT) |\
PIN_PUDR_PULLUP(6) | \
PIN_PUDR_PULLUP(7) | \
PIN_PUDR_PULLUP(8) | \
PIN_PUDR_PULLUP(9) | \
PIN_PUDR_PULLUP(10) | \
PIN_PUDR_PULLUP(11) | \
PIN_PUDR_FLOATING(GPIOD_LED4) | \
PIN_PUDR_FLOATING(GPIOD_LED3) | \
PIN_PUDR_FLOATING(GPIOD_LED5) | \
PIN_PUDR_FLOATING(GPIOD_LED6))
#define VAL_GPIOD_ODR 0x00000FCF
#define VAL_GPIOD_AFRL 0x00000000
#define VAL_GPIOD_AFRH 0x00000000
/*
* Port E setup.
* All input with pull-up except:
* PE0 - GPIOE_INT1 (input floating).
* PE1 - GPIOE_INT2 (input floating).
* PE3 - GPIOE_CS_SPI (output push-pull).
*/
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_INT1) | \
PIN_MODE_INPUT(GPIOE_INT2) | \
PIN_MODE_INPUT(2) | \
PIN_MODE_INPUT(GPIOE_CS_SPI) | \
PIN_MODE_INPUT(4) | \
PIN_MODE_INPUT(5) | \
PIN_MODE_INPUT(6) | \
PIN_MODE_INPUT(7) | \
PIN_MODE_INPUT(8) | \
PIN_MODE_INPUT(9) | \
PIN_MODE_INPUT(10) | \
PIN_MODE_INPUT(11) | \
PIN_MODE_INPUT(12) | \
PIN_MODE_INPUT(13) | \
PIN_MODE_INPUT(14) | \
PIN_MODE_INPUT(15))
#define VAL_GPIOE_OTYPER 0x00000000
#define VAL_GPIOE_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOE_PUPDR (PIN_PUDR_FLOATING(GPIOE_INT1) | \
PIN_PUDR_FLOATING(GPIOE_INT2) | \
PIN_PUDR_PULLUP(2) | \
PIN_PUDR_FLOATING(GPIOE_CS_SPI) | \
PIN_PUDR_PULLUP(4) | \
PIN_PUDR_PULLUP(5) | \
PIN_PUDR_PULLUP(6) | \
PIN_PUDR_PULLUP(7) | \
PIN_PUDR_PULLUP(8) | \
PIN_PUDR_PULLUP(9) | \
PIN_PUDR_PULLUP(10) | \
PIN_PUDR_PULLUP(11) | \
PIN_PUDR_PULLUP(12) | \
PIN_PUDR_PULLUP(13) | \
PIN_PUDR_PULLUP(14) | \
PIN_PUDR_PULLUP(15))
#define VAL_GPIOE_ODR 0xFFFFFFFF
#define VAL_GPIOE_AFRL 0x00000000
#define VAL_GPIOE_AFRH 0x00000000
/*
* Port F setup.
* All input with pull-up.
*/
#define VAL_GPIOF_MODER 0x00000000
#define VAL_GPIOF_OTYPER 0x00000000
#define VAL_GPIOF_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOF_PUPDR 0xFFFFFFFF
#define VAL_GPIOF_ODR 0xFFFFFFFF
#define VAL_GPIOF_AFRL 0x00000000
#define VAL_GPIOF_AFRH 0x00000000
/*
* Port G setup.
* All input with pull-up.
*/
#define VAL_GPIOG_MODER 0x00000000
#define VAL_GPIOG_OTYPER 0x00000000
#define VAL_GPIOG_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOG_PUPDR 0xFFFFFFFF
#define VAL_GPIOG_ODR 0xFFFFFFFF
#define VAL_GPIOG_AFRL 0x00000000
#define VAL_GPIOG_AFRH 0x00000000
/*
* Port H setup.
* All input with pull-up except:
* PH0 - GPIOH_OSC_IN (input floating).
* PH1 - GPIOH_OSC_OUT (input floating).
*/
#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \
PIN_MODE_INPUT(GPIOH_OSC_OUT) | \
PIN_MODE_INPUT(2) | \
PIN_MODE_INPUT(3) | \
PIN_MODE_INPUT(4) | \
PIN_MODE_INPUT(5) | \
PIN_MODE_INPUT(6) | \
PIN_MODE_INPUT(7) | \
PIN_MODE_INPUT(8) | \
PIN_MODE_INPUT(9) | \
PIN_MODE_INPUT(10) | \
PIN_MODE_INPUT(11) | \
PIN_MODE_INPUT(12) | \
PIN_MODE_INPUT(13) | \
PIN_MODE_INPUT(14) | \
PIN_MODE_INPUT(15))
#define VAL_GPIOH_OTYPER 0x00000000
#define VAL_GPIOH_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOH_PUPDR (PIN_PUDR_FLOATING(GPIOH_OSC_IN) | \
PIN_PUDR_FLOATING(GPIOH_OSC_OUT) | \
PIN_PUDR_PULLUP(2) | \
PIN_PUDR_PULLUP(3) | \
PIN_PUDR_PULLUP(4) | \
PIN_PUDR_PULLUP(5) | \
PIN_PUDR_PULLUP(6) | \
PIN_PUDR_PULLUP(7) | \
PIN_PUDR_PULLUP(8) | \
PIN_PUDR_PULLUP(9) | \
PIN_PUDR_PULLUP(10) | \
PIN_PUDR_PULLUP(11) | \
PIN_PUDR_PULLUP(12) | \
PIN_PUDR_PULLUP(13) | \
PIN_PUDR_PULLUP(14) | \
PIN_PUDR_PULLUP(15))
#define VAL_GPIOH_ODR 0xFFFFFFFF
#define VAL_GPIOH_AFRL 0x00000000
#define VAL_GPIOH_AFRH 0x00000000
/*
* Port I setup.
* All input with pull-up.
*/
#define VAL_GPIOI_MODER 0x00000000
#define VAL_GPIOI_OTYPER 0x00000000
#define VAL_GPIOI_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOI_PUPDR 0xFFFFFFFF
#define VAL_GPIOI_ODR 0xFFFFFFFF
#define VAL_GPIOI_AFRL 0x00000000
#define VAL_GPIOI_AFRH 0x00000000
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

5
boards/ST_STM32F4_DISCOVERY/board.mk Normal file
View File

@ -0,0 +1,5 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/ST_STM32F4_DISCOVERY/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/ST_STM32F4_DISCOVERY

141
boards/ST_STM32L_DISCOVERY/board.h
View File

@ -22,13 +22,13 @@
#define _BOARD_H_
/*
* Setup for STMicroelectronics STM32VL-Discovery board.
* Setup for STMicroelectronics STM32L-Discovery board.
*/
/*
* Board identifier.
*/
#define BOARD_ST_STM32VL_DISCOVERY
#define BOARD_ST_STM32L_DISCOVERY
#define BOARD_NAME "ST STM32L-Discovery"
/*
@ -36,7 +36,7 @@
* NOTE: The HSE crystal is not fitted by default on the board.
*/
#define STM32_LSECLK 32768
#define STM32_HSECLK 0
#define STM32_HSECLK 8000000
/*
* MCU type as defined in the ST header file stm32l1xx.h.
@ -56,35 +56,20 @@
* in the initialization code.
* Please refer to the STM32 Reference Manual for details.
*/
#define PIN_MODE_INPUT(n) (0 << ((n) * 2))
#define PIN_MODE_OUTPUT(n) (1 << ((n) * 2))
#define PIN_MODE_ALTERNATE(n) (2 << ((n) * 2))
#define PIN_MODE_ANALOG(n) (3 << ((n) * 2))
#define PIN_OTYPE_PUSHPULL(n) (0 << (n))
#define PIN_OTYPE_OPENDRAIN(n) (1 << (n))
#define PIN_OSPEED_400K(n) (0 << ((n) * 2))
#define PIN_OSPEED_2M(n) (1 << ((n) * 2))
#define PIN_OSPEED_10M(n) (2 << ((n) * 2))
#define PIN_OSPEED_40M(n) (3 << ((n) * 2))
#define PIN_PUDR_FLOATING(n) (0 << ((n) * 2))
#define PIN_PUDR_PULLUP(n) (1 << ((n) * 2))
#define PIN_PUDR_PULLDOWN(n) (2 << ((n) * 2))
#define PIN_AFIO_AF0(n) (0 << ((n % 8) * 4))
#define PIN_AFIO_AF1(n) (1 << ((n % 8) * 4))
#define PIN_AFIO_AF2(n) (2 << ((n % 8) * 4))
#define PIN_AFIO_AF3(n) (3 << ((n % 8) * 4))
#define PIN_AFIO_AF4(n) (4 << ((n % 8) * 4))
#define PIN_AFIO_AF5(n) (5 << ((n % 8) * 4))
#define PIN_AFIO_AF6(n) (6 << ((n % 8) * 4))
#define PIN_AFIO_AF7(n) (7 << ((n % 8) * 4))
#define PIN_AFIO_AF8(n) (8 << ((n % 8) * 4))
#define PIN_AFIO_AF9(n) (9 << ((n % 8) * 4))
#define PIN_AFIO_AF10(n) (10 << ((n % 8) * 4))
#define PIN_AFIO_AF11(n) (11 << ((n % 8) * 4))
#define PIN_AFIO_AF12(n) (12 << ((n % 8) * 4))
#define PIN_AFIO_AF13(n) (13 << ((n % 8) * 4))
#define PIN_AFIO_AF14(n) (14 << ((n % 8) * 4))
#define PIN_AFIO_AF15(n) (15 << ((n % 8) * 4))
#define PIN_MODE_INPUT(n) (0U << ((n) * 2))
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2))
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2))
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2))
#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
#define PIN_OSPEED_400K(n) (0U << ((n) * 2))
#define PIN_OSPEED_2M(n) (1U << ((n) * 2))
#define PIN_OSPEED_10M(n) (2U << ((n) * 2))
#define PIN_OSPEED_40M(n) (3U << ((n) * 2))
#define PIN_PUDR_FLOATING(n) (0U << ((n) * 2))
#define PIN_PUDR_PULLUP(n) (1U << ((n) * 2))
#define PIN_PUDR_PULLDOWN(n) (2U << ((n) * 2))
#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4))
/*
* Port A setup.
@ -95,18 +80,42 @@
* PA15 - JTDI (alternate 0).
*/
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \
PIN_MODE_INPUT(1) | \
PIN_MODE_INPUT(2) | \
PIN_MODE_INPUT(3) | \
PIN_MODE_INPUT(4) | \
PIN_MODE_INPUT(5) | \
PIN_MODE_INPUT(6) | \
PIN_MODE_INPUT(7) | \
PIN_MODE_INPUT(8) | \
PIN_MODE_INPUT(9) | \
PIN_MODE_INPUT(10) | \
PIN_MODE_INPUT(11) | \
PIN_MODE_INPUT(12) | \
PIN_MODE_ALTERNATE(13) | \
PIN_MODE_ALTERNATE(14) | \
PIN_MODE_ALTERNATE(15))
#define VAL_GPIOA_OTYPER 0x00000000
#define VAL_GPIOA_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOA_PUPDR (~(PIN_PUDR_FLOATING(GPIOA_BUTTON) | \
PIN_PUDR_FLOATING(13) | \
PIN_PUDR_FLOATING(14) | \
PIN_PUDR_FLOATING(15)))
#define VAL_GPIOA_PUPDR (PIN_PUDR_PULLUP(GPIOA_BUTTON) | \
PIN_PUDR_PULLUP(1) | \
PIN_PUDR_PULLUP(2) | \
PIN_PUDR_PULLUP(3) | \
PIN_PUDR_PULLUP(4) | \
PIN_PUDR_PULLUP(5) | \
PIN_PUDR_PULLUP(6) | \
PIN_PUDR_PULLUP(7) | \
PIN_PUDR_PULLUP(8) | \
PIN_PUDR_PULLUP(9) | \
PIN_PUDR_PULLUP(10) | \
PIN_PUDR_PULLUP(11) | \
PIN_PUDR_PULLUP(12) | \
PIN_PUDR_FLOATING(13) | \
PIN_PUDR_FLOATING(14) | \
PIN_PUDR_FLOATING(15))
#define VAL_GPIOA_ODR 0xFFFFFFFF
#define VAL_GPIOA_AFRL 0x00000000
#define VAL_GPIOA_AFRH 0x00000000
#define VAL_GPIOA_AFRL 0x00000000
#define VAL_GPIOA_AFRH 0x00000000
/*
* Port B setup.
@ -116,19 +125,43 @@
* PB6 - GPIOB_LED4 (output push-pull).
* PB7 - GPIOB_LED3 (output push-pull).
*/
#define VAL_GPIOB_MODER (PIN_MODE_ALTERNATE(3) | \
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(0) | \
PIN_MODE_INPUT(1) | \
PIN_MODE_INPUT(2) | \
PIN_MODE_ALTERNATE(3) | \
PIN_MODE_ALTERNATE(4) | \
PIN_MODE_INPUT(5) | \
PIN_MODE_OUTPUT(GPIOB_LED4) | \
PIN_MODE_OUTPUT(GPIOB_LED3))
PIN_MODE_OUTPUT(GPIOB_LED3) | \
PIN_MODE_INPUT(8) | \
PIN_MODE_INPUT(9) | \
PIN_MODE_INPUT(10) | \
PIN_MODE_INPUT(11) | \
PIN_MODE_INPUT(12) | \
PIN_MODE_INPUT(13) | \
PIN_MODE_INPUT(14) | \
PIN_MODE_INPUT(15))
#define VAL_GPIOB_OTYPER 0x00000000
#define VAL_GPIOB_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOB_PUPDR (~(PIN_PUDR_FLOATING(3) | \
PIN_PUDR_FLOATING(4) | \
PIN_PUDR_FLOATING(GPIOB_LED4) | \
PIN_PUDR_FLOATING(GPIOB_LED3)))
#define VAL_GPIOB_PUPDR (PIN_PUDR_PULLUP(0) | \
PIN_PUDR_PULLUP(1) | \
PIN_PUDR_PULLUP(2) | \
PIN_PUDR_FLOATING(3) | \
PIN_PUDR_FLOATING(4) | \
PIN_PUDR_PULLUP(5) | \
PIN_PUDR_FLOATING(GPIOB_LED4) | \
PIN_PUDR_FLOATING(GPIOB_LED3) | \
PIN_PUDR_PULLUP(8) | \
PIN_PUDR_PULLUP(9) | \
PIN_PUDR_PULLUP(10) | \
PIN_PUDR_PULLUP(11) | \
PIN_PUDR_PULLUP(12) | \
PIN_PUDR_PULLUP(13) | \
PIN_PUDR_PULLUP(14) | \
PIN_PUDR_PULLUP(15))
#define VAL_GPIOB_ODR 0xFFFFFF3F
#define VAL_GPIOB_AFRL 0x00000000
#define VAL_GPIOB_AFRH 0x00000000
#define VAL_GPIOB_AFRL 0x00000000
#define VAL_GPIOB_AFRH 0x00000000
/*
* Port C setup.
@ -142,8 +175,8 @@
#define VAL_GPIOC_PUPDR (~(PIN_PUDR_FLOATING(15) | \
PIN_PUDR_FLOATING(14)))
#define VAL_GPIOC_ODR 0xFFFFFFFF
#define VAL_GPIOC_AFRL 0x00000000
#define VAL_GPIOC_AFRH 0x00000000
#define VAL_GPIOC_AFRL 0x00000000
#define VAL_GPIOC_AFRH 0x00000000
/*
* Port D setup.
@ -154,8 +187,8 @@
#define VAL_GPIOD_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOD_PUPDR 0xFFFFFFFF
#define VAL_GPIOD_ODR 0xFFFFFFFF
#define VAL_GPIOD_AFRL 0x00000000
#define VAL_GPIOD_AFRH 0x00000000
#define VAL_GPIOD_AFRL 0x00000000
#define VAL_GPIOD_AFRH 0x00000000
/*
* Port E setup.
@ -166,8 +199,8 @@
#define VAL_GPIOE_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOE_PUPDR 0xFFFFFFFF
#define VAL_GPIOE_ODR 0xFFFFFFFF
#define VAL_GPIOE_AFRL 0x00000000
#define VAL_GPIOE_AFRH 0x00000000
#define VAL_GPIOE_AFRL 0x00000000
#define VAL_GPIOE_AFRH 0x00000000
/*
* Port H setup.
@ -178,8 +211,8 @@
#define VAL_GPIOH_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOH_PUPDR 0xFFFFFFFF
#define VAL_GPIOH_ODR 0xFFFFFFFF
#define VAL_GPIOH_AFRL 0x00000000
#define VAL_GPIOH_AFRH 0x00000000
#define VAL_GPIOH_AFRL 0x00000000
#define VAL_GPIOH_AFRH 0x00000000
#if !defined(_FROM_ASM_)
#ifdef __cplusplus

11
demos/ARM7-AT91SAM7S-FATFS-GCC/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer -mabi=apcs-gnu
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = no
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

38
demos/ARM7-AT91SAM7S-FATFS-GCC/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -170,6 +184,10 @@
#define CAN_USE_SLEEP_MODE TRUE
#endif
/*===========================================================================*/
/* EXT driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* I2C driver related settings. */
/*===========================================================================*/
@ -185,6 +203,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +259,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +334,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

18
demos/ARM7-AT91SAM7S-FATFS-GCC/main.c
View File

@ -129,23 +129,7 @@ static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) {
}
static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) {
static const char *states[] = {
"READY",
"CURRENT",
"SUSPENDED",
"WTSEM",
"WTMTX",
"WTCOND",
"SLEEPING",
"WTEXIT",
"WTOREVT",
"WTANDEVT",
"SNDMSGQ",
"SNDMSG",
"WTMSG",
"WTQUEUE",
"FINAL"
};
static const char *states[] = {THD_STATE_NAMES};
Thread *tp;
(void)argv;

11
demos/ARM7-AT91SAM7S-GCC/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer -mabi=apcs-gnu
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = no
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

34
demos/ARM7-AT91SAM7S-GCC/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

11
demos/ARM7-AT91SAM7X-FATFS-GCC/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer -mabi=apcs-gnu
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = no
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

34
demos/ARM7-AT91SAM7X-FATFS-GCC/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

18
demos/ARM7-AT91SAM7X-FATFS-GCC/main.c
View File

@ -129,23 +129,7 @@ static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) {
}
static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) {
static const char *states[] = {
"READY",
"CURRENT",
"SUSPENDED",
"WTSEM",
"WTMTX",
"WTCOND",
"SLEEPING",
"WTEXIT",
"WTOREVT",
"WTANDEVT",
"SNDMSGQ",
"SNDMSG",
"WTMSG",
"WTQUEUE",
"FINAL"
};
static const char *states[] = {THD_STATE_NAMES};
Thread *tp;
(void)argv;

11
demos/ARM7-AT91SAM7X-GCC/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer -mabi=apcs-gnu
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = no
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

34
demos/ARM7-AT91SAM7X-GCC/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

11
demos/ARM7-AT91SAM7X-LWIP-GCC/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer -mabi=apcs-gnu
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = no
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

34
demos/ARM7-AT91SAM7X-LWIP-GCC/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

3
demos/ARM7-AT91SAM7X-LWIP-GCC/lwip/lwipthread.c
View File

@ -222,6 +222,7 @@ msg_t lwip_thread(void *p) {
EventListener el0, el1;
struct ip_addr ip, gateway, netmask;
static struct netif thisif;
static const MACConfig mac_config = {thisif.hwaddr};
/* Initializes the thing.*/
sys_init();
@ -254,7 +255,7 @@ msg_t lwip_thread(void *p) {
LWIP_GATEWAY(&gateway);
LWIP_NETMASK(&netmask);
}
macSetAddress(&ETH1, thisif.hwaddr);
macStart(&ETH1, &mac_config);
netif_add(&thisif, &ip, &netmask, &gateway, NULL, ethernetif_init, tcpip_input);
netif_set_default(&thisif);

11
demos/ARM7-AT91SAM7X-UIP-GCC/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer -mabi=apcs-gnu
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = no
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

34
demos/ARM7-AT91SAM7X-UIP-GCC/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

11
demos/ARM7-LPC214x-FATFS-GCC/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer -mabi=apcs-gnu -falign-functions=16
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = no
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

34
demos/ARM7-LPC214x-FATFS-GCC/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

11
demos/ARM7-LPC214x-G++/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer -mabi=apcs-gnu -falign-functions=16
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti -fno-exceptions
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = no
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

34
demos/ARM7-LPC214x-G++/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

11
demos/ARM7-LPC214x-GCC/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer -mabi=apcs-gnu -falign-functions=16
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = no
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

34
demos/ARM7-LPC214x-GCC/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

11
demos/ARMCM0-LPC1114-LPCXPRESSO/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

34
demos/ARMCM0-LPC1114-LPCXPRESSO/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

11
demos/ARMCM3-GENERIC-KERNEL/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

11
demos/ARMCM3-LPC1343-LPCXPRESSO/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

34
demos/ARMCM3-LPC1343-LPCXPRESSO/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

11
demos/ARMCM3-STM32F100-DISCOVERY/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

34
demos/ARMCM3-STM32F100-DISCOVERY/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM TRUE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

233
demos/ARMCM3-STM32F100-DISCOVERY/iar/ch.ewp
View File

@ -12,7 +12,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
<version>18</version>
<version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -29,7 +29,7 @@
</option>
<option>
<name>Variant</name>
<version>17</version>
<version>19</version>
<state>37</state>
</option>
<option>
@ -38,8 +38,8 @@
</option>
<option>
<name>Input variant</name>
<version>1</version>
<state>3</state>
<version>3</version>
<state>6</state>
</option>
<option>
<name>Input description</name>
@ -47,8 +47,8 @@
</option>
<option>
<name>Output variant</name>
<version>0</version>
<state>3</state>
<version>2</version>
<state>7</state>
</option>
<option>
<name>Output description</name>
@ -60,7 +60,7 @@
</option>
<option>
<name>FPU</name>
<version>1</version>
<version>2</version>
<state>0</state>
</option>
<option>
@ -87,7 +87,7 @@
</option>
<option>
<name>OGLastSavedByProductVersion</name>
<state>6.10.1.52170</state>
<state>6.20.2.52635</state>
</option>
<option>
<name>GeneralEnableMisra</name>
@ -135,13 +135,31 @@
<name>RTConfigPath2</name>
<state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
</option>
<option>
<name>GFPUCoreSlave</name>
<version>19</version>
<state>37</state>
</option>
<option>
<name>GBECoreSlave</name>
<version>19</version>
<state>37</state>
</option>
<option>
<name>OGUseCmsis</name>
<state>0</state>
</option>
<option>
<name>OGUseCmsisDspLib</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>ICCARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>26</version>
<version>28</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -277,10 +295,15 @@
<name>CCIncludePath2</name>
<state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\kernel\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\common\ARMCMx\CMSIS\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\os\hal\include</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\DMAv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\USBv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\boards\ST_STM32VL_DISCOVERY</state>
<state>$PROJ_DIR$\..\..\..\test</state>
</option>
@ -364,11 +387,15 @@
<state>1</state>
</option>
<option>
<name>IccRelaxedFpPrecision</name>
<name>IccCppInlineSemantics</name>
<state>0</state>
</option>
<option>
<name>IccCppInlineSemantics</name>
<name>IccCmsis</name>
<state>1</state>
</option>
<option>
<name>IccFloatSemantics</name>
<state>0</state>
</option>
</data>
@ -523,7 +550,8 @@
</option>
<option>
<name>AUserIncludes</name>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
<state>$PROJ_DIR$\..</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\boards\ST_STM32VL_DISCOVERY</state>
</option>
<option>
@ -591,7 +619,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>11</version>
<version>13</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -837,6 +865,22 @@
<name>IlinkOptExceptionsForce</name>
<state>0</state>
</option>
<option>
<name>IlinkCmsis</name>
<state>1</state>
</option>
<option>
<name>IlinkOptMergeDuplSections</name>
<state>0</state>
</option>
<option>
<name>IlinkOptUseVfe</name>
<state>1</state>
</option>
<option>
<name>IlinkOptForceVfe</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -876,7 +920,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
<version>18</version>
<version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -893,7 +937,7 @@
</option>
<option>
<name>Variant</name>
<version>17</version>
<version>19</version>
<state>37</state>
</option>
<option>
@ -902,8 +946,8 @@
</option>
<option>
<name>Input variant</name>
<version>1</version>
<state>3</state>
<version>3</version>
<state>6</state>
</option>
<option>
<name>Input description</name>
@ -911,8 +955,8 @@
</option>
<option>
<name>Output variant</name>
<version>0</version>
<state>3</state>
<version>2</version>
<state>7</state>
</option>
<option>
<name>Output description</name>
@ -924,7 +968,7 @@
</option>
<option>
<name>FPU</name>
<version>1</version>
<version>2</version>
<state>0</state>
</option>
<option>
@ -951,7 +995,7 @@
</option>
<option>
<name>OGLastSavedByProductVersion</name>
<state>6.10.1.52170</state>
<state>6.21.4.52945</state>
</option>
<option>
<name>GeneralEnableMisra</name>
@ -999,13 +1043,31 @@
<name>RTConfigPath2</name>
<state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
</option>
<option>
<name>GFPUCoreSlave</name>
<version>19</version>
<state>37</state>
</option>
<option>
<name>GBECoreSlave</name>
<version>19</version>
<state>37</state>
</option>
<option>
<name>OGUseCmsis</name>
<state>0</state>
</option>
<option>
<name>OGUseCmsisDspLib</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>ICCARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>26</version>
<version>28</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1141,10 +1203,15 @@
<name>CCIncludePath2</name>
<state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\kernel\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\common\ARMCMx\CMSIS\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\os\hal\include</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\DMAv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\USBv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\boards\ST_STM32VL_DISCOVERY</state>
<state>$PROJ_DIR$\..\..\..\test</state>
</option>
@ -1228,11 +1295,15 @@
<state>1</state>
</option>
<option>
<name>IccRelaxedFpPrecision</name>
<name>IccCppInlineSemantics</name>
<state>0</state>
</option>
<option>
<name>IccCppInlineSemantics</name>
<name>IccCmsis</name>
<state>1</state>
</option>
<option>
<name>IccFloatSemantics</name>
<state>0</state>
</option>
</data>
@ -1387,7 +1458,8 @@
</option>
<option>
<name>AUserIncludes</name>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
<state>$PROJ_DIR$\..</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\boards\ST_STM32VL_DISCOVERY</state>
</option>
<option>
@ -1455,7 +1527,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>11</version>
<version>13</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1701,6 +1773,22 @@
<name>IlinkOptExceptionsForce</name>
<state>0</state>
</option>
<option>
<name>IlinkCmsis</name>
<state>1</state>
</option>
<option>
<name>IlinkOptMergeDuplSections</name>
<state>0</state>
</option>
<option>
<name>IlinkOptUseVfe</name>
<state>1</state>
</option>
<option>
<name>IlinkOptForceVfe</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -1751,12 +1839,21 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\can.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\ext.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\gpt.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\hal.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\i2c.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\icu.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\mac.h</name>
</file>
@ -1772,15 +1869,30 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\pwm.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\rtc.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\sdc.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\serial.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\serial_usb.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\spi.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\uart.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\usb.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\usb_cdc.h</name>
</file>
</group>
<group>
<name>src</name>
@ -1790,12 +1902,21 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\can.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\ext.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\gpt.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\hal.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\i2c.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\icu.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\mac.c</name>
</file>
@ -1808,15 +1929,27 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\pwm.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\rtc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\sdc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\serial.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\serial_usb.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\spi.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\uart.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\usb.c</name>
</file>
</group>
</group>
<group>
@ -1951,40 +2084,31 @@
<group>
<name>platform</name>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\adc_lld.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\adc_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\adc_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\adc_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\can_lld.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\can_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\core_cm3.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld_f100.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld_f103.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld_f105_f107.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f100.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv1\pal_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f103.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f105_f107.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pal_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pal_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv1\pal_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.c</name>
@ -2005,30 +2129,27 @@
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32_dma.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32_dma.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32f10x.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\stm32_rcc.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\uart_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\uart_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\stm32f10x.h</name>
</file>
</group>
<group>
<name>port</name>
<group>
<name>STM32</name>
<name>STM32F1xx</name>
<file>
<name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32\cmparams.h</name>
<name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx\cmparams.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32\vectors.s</name>
<name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx\vectors.s</name>
</file>
</group>
<file>

47
demos/ARMCM3-STM32F100-DISCOVERY/keil/ch.uvproj
View File

@ -346,7 +346,7 @@
<MiscControls></MiscControls>
<Define>__heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_IRAM2$$Base</Define>
<Undefine></Undefine>
<IncludePath>..\;..\..\..\os\kernel\include;..\..\..\os\ports\RVCT\ARMCMx;..\..\..\os\ports\RVCT\ARMCMx\STM32;..\..\..\os\hal\include;..\..\..\os\hal\platforms\STM32;..\..\..\boards\ST_STM32VL_DISCOVERY;..\..\..\test</IncludePath>
<IncludePath>..\;..\..\..\os\kernel\include;..\..\..\os\ports\RVCT\ARMCMx;..\..\..\os\ports\RVCT\ARMCMx\STM32F1xx;..\..\..\os\hal\include;..\..\..\os\hal\platforms\STM32;..\..\..\os\hal\platforms\STM32\GPIOv1;..\..\..\os\hal\platforms\STM32\DMAv1;..\..\..\os\hal\platforms\STM32\USBv1;..\..\..\os\hal\platforms\STM32F1xx;..\..\..\boards\ST_STM32VL_DISCOVERY;..\..\..\test</IncludePath>
</VariousControls>
</Cads>
<Aads>
@ -361,7 +361,7 @@
<MiscControls>--cpreproc</MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath>..\..\..\boards\ST_STM32VL_DISCOVERY;..\..\..\os\ports\RVCT\ARMCMx\STM32</IncludePath>
<IncludePath>..\;..\..\..\boards\ST_STM32VL_DISCOVERY;..\..\..\os\ports\RVCT\ARMCMx\STM32F1xx</IncludePath>
</VariousControls>
</Aads>
<LDads>
@ -409,7 +409,7 @@
<File>
<FileName>vectors.s</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\STM32\vectors.s</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\ports\RVCT\ARMCMx\STM32F1xx\vectors.s</FilePath>
</File>
<File>
<FileName>chcoreasm_v7m.s</FileName>
@ -794,7 +794,7 @@
<File>
<FileName>adc_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\adc_lld.c</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32F1xx\adc_lld.c</FilePath>
</File>
<File>
<FileName>can_lld.c</FileName>
@ -804,12 +804,12 @@
<File>
<FileName>hal_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\hal_lld.c</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32F1xx\hal_lld.c</FilePath>
</File>
<File>
<FileName>pal_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\pal_lld.c</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32\GPIOv1\pal_lld.c</FilePath>
</File>
<File>
<FileName>pwm_lld.c</FileName>
@ -826,11 +826,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.c</FilePath>
</File>
<File>
<FileName>stm32_dma.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\stm32_dma.c</FilePath>
</File>
<File>
<FileName>uart_lld.c</FileName>
<FileType>1</FileType>
@ -839,32 +834,27 @@
<File>
<FileName>adc_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\adc_lld.h</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32F1xx\adc_lld.h</FilePath>
</File>
<File>
<FileName>can_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\can_lld.h</FilePath>
</File>
<File>
<FileName>core_cm3.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\core_cm3.h</FilePath>
</File>
<File>
<FileName>hal_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\hal_lld.h</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32F1xx\hal_lld.h</FilePath>
</File>
<File>
<FileName>hal_lld_f103.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\hal_lld_f103.h</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32F1xx\hal_lld_f103.h</FilePath>
</File>
<File>
<FileName>pal_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\pal_lld.h</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32\GPIOv1\pal_lld.h</FilePath>
</File>
<File>
<FileName>pwm_lld.h</FileName>
@ -881,21 +871,26 @@
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.h</FilePath>
</File>
<File>
<FileName>stm32_dma.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\stm32_dma.h</FilePath>
</File>
<File>
<FileName>stm32f10x.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\stm32f10x.h</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32F1xx\stm32f10x.h</FilePath>
</File>
<File>
<FileName>uart_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\uart_lld.h</FilePath>
</File>
<File>
<FileName>stm32_dma.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.c</FilePath>
</File>
<File>
<FileName>stm32_dma.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.h</FilePath>
</File>
</Files>
</Group>
<Group>

18
demos/ARMCM3-STM32F100-DISCOVERY/mcuconf.h
View File

@ -51,7 +51,6 @@
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
@ -59,6 +58,21 @@
#define STM32_CAN_USE_CAN1 TRUE
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
* EXT driver system settings.
*/
#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
/*
* GPT driver system settings.
*/
@ -116,11 +130,13 @@
#define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.

11
demos/ARMCM3-STM32F103-FATFS/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

34
demos/ARMCM3-STM32F103-FATFS/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

18
demos/ARMCM3-STM32F103-FATFS/main.c
View File

@ -117,23 +117,7 @@ static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) {
}
static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) {
static const char *states[] = {
"READY",
"CURRENT",
"SUSPENDED",
"WTSEM",
"WTMTX",
"WTCOND",
"SLEEPING",
"WTEXIT",
"WTOREVT",
"WTANDEVT",
"SNDMSGQ",
"SNDMSG",
"WTMSG",
"WTQUEUE",
"FINAL"
};
static const char *states[] = {THD_STATE_NAMES};
Thread *tp;
(void)argv;

18
demos/ARMCM3-STM32F103-FATFS/mcuconf.h
View File

@ -52,7 +52,6 @@
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
@ -60,6 +59,21 @@
#define STM32_CAN_USE_CAN1 TRUE
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
* EXT driver system settings.
*/
#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
/*
* GPT driver system settings.
*/
@ -117,11 +131,13 @@
#define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.

11
demos/ARMCM3-STM32F103-G++/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti -fno-exceptions
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

34
demos/ARMCM3-STM32F103-G++/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

18
demos/ARMCM3-STM32F103-G++/mcuconf.h
View File

@ -52,7 +52,6 @@
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
@ -60,6 +59,21 @@
#define STM32_CAN_USE_CAN1 TRUE
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
* EXT driver system settings.
*/
#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
/*
* GPT driver system settings.
*/
@ -117,11 +131,13 @@
#define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.

11
demos/ARMCM3-STM32F103/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

12
demos/ARMCM3-STM32F103/chconf.h
View File

@ -361,7 +361,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_SYSTEM_STATE_CHECK TRUE
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
#endif
/**
@ -372,7 +372,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_CHECKS TRUE
#define CH_DBG_ENABLE_CHECKS FALSE
#endif
/**
@ -384,7 +384,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_ASSERTS TRUE
#define CH_DBG_ENABLE_ASSERTS FALSE
#endif
/**
@ -395,7 +395,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_TRACE TRUE
#define CH_DBG_ENABLE_TRACE FALSE
#endif
/**
@ -409,7 +409,7 @@
* @p panic_msg variable set to @p NULL.
*/
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_STACK_CHECK TRUE
#define CH_DBG_ENABLE_STACK_CHECK FALSE
#endif
/**
@ -421,7 +421,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
#define CH_DBG_FILL_THREADS TRUE
#define CH_DBG_FILL_THREADS FALSE
#endif
/**

34
demos/ARMCM3-STM32F103/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

249
demos/ARMCM3-STM32F103/iar/ch.ewp
View File

@ -12,7 +12,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
<version>18</version>
<version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -29,7 +29,7 @@
</option>
<option>
<name>Variant</name>
<version>17</version>
<version>19</version>
<state>37</state>
</option>
<option>
@ -38,8 +38,8 @@
</option>
<option>
<name>Input variant</name>
<version>1</version>
<state>3</state>
<version>3</version>
<state>6</state>
</option>
<option>
<name>Input description</name>
@ -47,8 +47,8 @@
</option>
<option>
<name>Output variant</name>
<version>0</version>
<state>3</state>
<version>2</version>
<state>7</state>
</option>
<option>
<name>Output description</name>
@ -60,7 +60,7 @@
</option>
<option>
<name>FPU</name>
<version>1</version>
<version>2</version>
<state>0</state>
</option>
<option>
@ -87,7 +87,7 @@
</option>
<option>
<name>OGLastSavedByProductVersion</name>
<state>6.10.1.52170</state>
<state>6.20.2.52635</state>
</option>
<option>
<name>GeneralEnableMisra</name>
@ -135,13 +135,31 @@
<name>RTConfigPath2</name>
<state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
</option>
<option>
<name>GFPUCoreSlave</name>
<version>19</version>
<state>37</state>
</option>
<option>
<name>GBECoreSlave</name>
<version>19</version>
<state>37</state>
</option>
<option>
<name>OGUseCmsis</name>
<state>0</state>
</option>
<option>
<name>OGUseCmsisDspLib</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>ICCARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>26</version>
<version>28</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -277,10 +295,15 @@
<name>CCIncludePath2</name>
<state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\kernel\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\common\ARMCMx\CMSIS\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\os\hal\include</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\DMAv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\USBv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\boards\OLIMEX_STM32_P103</state>
<state>$PROJ_DIR$\..\..\..\test</state>
</option>
@ -364,11 +387,15 @@
<state>1</state>
</option>
<option>
<name>IccRelaxedFpPrecision</name>
<name>IccCppInlineSemantics</name>
<state>0</state>
</option>
<option>
<name>IccCppInlineSemantics</name>
<name>IccCmsis</name>
<state>1</state>
</option>
<option>
<name>IccFloatSemantics</name>
<state>0</state>
</option>
</data>
@ -523,8 +550,8 @@
</option>
<option>
<name>AUserIncludes</name>
<state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
<state>$PROJ_DIR$\..</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\boards\OLIMEX_STM32_P103</state>
</option>
<option>
@ -592,7 +619,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>11</version>
<version>13</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -838,6 +865,22 @@
<name>IlinkOptExceptionsForce</name>
<state>0</state>
</option>
<option>
<name>IlinkCmsis</name>
<state>1</state>
</option>
<option>
<name>IlinkOptMergeDuplSections</name>
<state>0</state>
</option>
<option>
<name>IlinkOptUseVfe</name>
<state>1</state>
</option>
<option>
<name>IlinkOptForceVfe</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -877,7 +920,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
<version>18</version>
<version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -894,7 +937,7 @@
</option>
<option>
<name>Variant</name>
<version>17</version>
<version>19</version>
<state>37</state>
</option>
<option>
@ -903,8 +946,8 @@
</option>
<option>
<name>Input variant</name>
<version>1</version>
<state>3</state>
<version>3</version>
<state>6</state>
</option>
<option>
<name>Input description</name>
@ -912,8 +955,8 @@
</option>
<option>
<name>Output variant</name>
<version>0</version>
<state>3</state>
<version>2</version>
<state>7</state>
</option>
<option>
<name>Output description</name>
@ -925,7 +968,7 @@
</option>
<option>
<name>FPU</name>
<version>1</version>
<version>2</version>
<state>0</state>
</option>
<option>
@ -952,7 +995,7 @@
</option>
<option>
<name>OGLastSavedByProductVersion</name>
<state>6.10.1.52170</state>
<state>6.21.4.52945</state>
</option>
<option>
<name>GeneralEnableMisra</name>
@ -1000,13 +1043,31 @@
<name>RTConfigPath2</name>
<state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
</option>
<option>
<name>GFPUCoreSlave</name>
<version>19</version>
<state>37</state>
</option>
<option>
<name>GBECoreSlave</name>
<version>19</version>
<state>37</state>
</option>
<option>
<name>OGUseCmsis</name>
<state>0</state>
</option>
<option>
<name>OGUseCmsisDspLib</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>ICCARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>26</version>
<version>28</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1142,10 +1203,15 @@
<name>CCIncludePath2</name>
<state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\kernel\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\common\ARMCMx\CMSIS\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\os\hal\include</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\DMAv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\USBv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\boards\OLIMEX_STM32_P103</state>
<state>$PROJ_DIR$\..\..\..\test</state>
</option>
@ -1229,11 +1295,15 @@
<state>1</state>
</option>
<option>
<name>IccRelaxedFpPrecision</name>
<name>IccCppInlineSemantics</name>
<state>0</state>
</option>
<option>
<name>IccCppInlineSemantics</name>
<name>IccCmsis</name>
<state>1</state>
</option>
<option>
<name>IccFloatSemantics</name>
<state>0</state>
</option>
</data>
@ -1388,8 +1458,8 @@
</option>
<option>
<name>AUserIncludes</name>
<state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
<state>$PROJ_DIR$\..</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\boards\OLIMEX_STM32_P103</state>
</option>
<option>
@ -1457,7 +1527,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>11</version>
<version>13</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1703,6 +1773,22 @@
<name>IlinkOptExceptionsForce</name>
<state>0</state>
</option>
<option>
<name>IlinkCmsis</name>
<state>1</state>
</option>
<option>
<name>IlinkOptMergeDuplSections</name>
<state>0</state>
</option>
<option>
<name>IlinkOptUseVfe</name>
<state>1</state>
</option>
<option>
<name>IlinkOptForceVfe</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -1753,12 +1839,21 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\can.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\ext.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\gpt.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\hal.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\i2c.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\icu.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\mac.h</name>
</file>
@ -1774,15 +1869,30 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\pwm.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\rtc.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\sdc.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\serial.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\serial_usb.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\spi.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\uart.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\usb.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\usb_cdc.h</name>
</file>
</group>
<group>
<name>src</name>
@ -1792,12 +1902,21 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\can.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\ext.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\gpt.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\hal.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\i2c.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\icu.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\mac.c</name>
</file>
@ -1810,15 +1929,27 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\pwm.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\rtc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\sdc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\serial.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\serial_usb.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\spi.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\uart.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\usb.c</name>
</file>
</group>
</group>
<group>
@ -1953,46 +2084,25 @@
<group>
<name>platform</name>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\adc_lld.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\adc_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\can_lld.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld_f100.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\can_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld_f103.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\core_cm3.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld_f105_f107.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv1\pal_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f100.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f103.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f105_f107.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pal_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pal_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv1\pal_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\serial_lld.c</name>
@ -2001,36 +2111,27 @@
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\serial_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32_dma.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\stm32_rcc.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32_dma.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32f10x.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\uart_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\uart_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\stm32f10x.h</name>
</file>
</group>
<group>
<name>port</name>
<group>
<name>STM32</name>
<name>STM32F1xx</name>
<file>
<name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32\cmparams.h</name>
<name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx\cmparams.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32\vectors.s</name>
<name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx\vectors.s</name>
</file>
</group>
<file>

158
demos/ARMCM3-STM32F103/keil/ch.uvproj
View File

@ -346,7 +346,7 @@
<MiscControls></MiscControls>
<Define>__heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_IRAM2$$Base</Define>
<Undefine></Undefine>
<IncludePath>..\;..\..\..\os\kernel\include;..\..\..\os\ports\RVCT\ARMCMx;..\..\..\os\ports\RVCT\ARMCMx\STM32;..\..\..\os\hal\include;..\..\..\os\hal\platforms\STM32;..\..\..\boards\OLIMEX_STM32_P103;..\..\..\test</IncludePath>
<IncludePath>..\;..\..\..\os\kernel\include;..\..\..\os\ports\common\ARMCMx\CMSIS\include;..\..\..\os\ports\RVCT\ARMCMx;..\..\..\os\ports\RVCT\ARMCMx\STM32F1xx;..\..\..\os\hal\include;..\..\..\os\hal\platforms\STM32;..\..\..\os\hal\platforms\STM32\GPIOv1;..\..\..\os\hal\platforms\STM32\DMAv1;..\..\..\os\hal\platforms\STM32\USBv1;..\..\..\os\hal\platforms\STM32F1xx;..\..\..\boards\OLIMEX_STM32_P103;..\..\..\test</IncludePath>
</VariousControls>
</Cads>
<Aads>
@ -361,7 +361,7 @@
<MiscControls>--cpreproc</MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath>..\;..\..\..\boards\OLIMEX_STM32_P103;..\..\..\os\ports\RVCT\ARMCMx\STM32</IncludePath>
<IncludePath>..\;..\..\..\boards\OLIMEX_STM32_P103;..\..\..\os\ports\RVCT\ARMCMx\STM32F1xx</IncludePath>
</VariousControls>
</Aads>
<LDads>
@ -409,7 +409,7 @@
<File>
<FileName>vectors.s</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\STM32\vectors.s</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\ports\RVCT\ARMCMx\STM32F1xx\vectors.s</FilePath>
</File>
<File>
<FileName>chcoreasm_v7m.s</FileName>
@ -786,115 +786,125 @@
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\uart.h</FilePath>
</File>
<File>
<FileName>ext.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\ext.c</FilePath>
</File>
<File>
<FileName>gpt.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\gpt.c</FilePath>
</File>
<File>
<FileName>icu.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\icu.c</FilePath>
</File>
<File>
<FileName>rtc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\rtc.c</FilePath>
</File>
<File>
<FileName>sdc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\sdc.c</FilePath>
</File>
<File>
<FileName>serial_usb.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\serial_usb.c</FilePath>
</File>
<File>
<FileName>usb.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\usb.c</FilePath>
</File>
<File>
<FileName>ext.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\ext.h</FilePath>
</File>
<File>
<FileName>gpt.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\gpt.h</FilePath>
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<File>
<FileName>icu.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\icu.h</FilePath>
</File>
<File>
<FileName>rtc.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\rtc.h</FilePath>
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<File>
<FileName>sdc.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\sdc.h</FilePath>
</File>
<File>
<FileName>serial_usb.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\serial_usb.h</FilePath>
</File>
<File>
<FileName>usb.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\usb.h</FilePath>
</File>
<File>
<FileName>usb_cdc.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\usb_cdc.h</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>platform</GroupName>
<Files>
<File>
<FileName>adc_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\adc_lld.c</FilePath>
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<File>
<FileName>can_lld.c</FileName>
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<FilePath>..\..\..\os\hal\platforms\STM32\can_lld.c</FilePath>
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<FileName>hal_lld.c</FileName>
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<FilePath>..\..\..\os\hal\platforms\STM32\hal_lld.c</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32F1xx\hal_lld.c</FilePath>
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<FileName>pal_lld.c</FileName>
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<FilePath>..\..\..\os\hal\platforms\STM32\pwm_lld.c</FilePath>
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<FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.c</FilePath>
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<FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.c</FilePath>
</File>
<File>
<FileName>stm32_dma.c</FileName>
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<FilePath>..\..\..\os\hal\platforms\STM32\stm32_dma.c</FilePath>
</File>
<File>
<FileName>uart_lld.c</FileName>
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<FilePath>..\..\..\os\hal\platforms\STM32\uart_lld.c</FilePath>
</File>
<File>
<FileName>adc_lld.h</FileName>
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<FilePath>..\..\..\os\hal\platforms\STM32\adc_lld.h</FilePath>
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<File>
<FileName>can_lld.h</FileName>
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<FilePath>..\..\..\os\hal\platforms\STM32\can_lld.h</FilePath>
</File>
<File>
<FileName>core_cm3.h</FileName>
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<FilePath>..\..\..\os\hal\platforms\STM32\core_cm3.h</FilePath>
</File>
<File>
<FileName>hal_lld.h</FileName>
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<FilePath>..\..\..\os\hal\platforms\STM32\hal_lld.h</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32F1xx\hal_lld.h</FilePath>
</File>
<File>
<FileName>hal_lld_f103.h</FileName>
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</File>
<File>
<FileName>pal_lld.h</FileName>
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<FilePath>..\..\..\os\hal\platforms\STM32\pal_lld.h</FilePath>
</File>
<File>
<FileName>pwm_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\pwm_lld.h</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32\GPIOv1\pal_lld.h</FilePath>
</File>
<File>
<FileName>serial_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.h</FilePath>
</File>
<File>
<FileName>spi_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.h</FilePath>
</File>
<File>
<FileName>stm32_dma.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\stm32_dma.h</FilePath>
</File>
<File>
<FileName>stm32f10x.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\stm32f10x.h</FilePath>
</File>
<File>
<FileName>uart_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\uart_lld.h</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\hal\platforms\STM32F1xx\stm32f10x.h</FilePath>
</File>
</Files>
</Group>

27
demos/ARMCM3-STM32F103/mcuconf.h
View File

@ -52,7 +52,6 @@
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
@ -60,6 +59,21 @@
#define STM32_CAN_USE_CAN1 TRUE
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
* EXT driver system settings.
*/
#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
/*
* GPT driver system settings.
*/
@ -68,7 +82,8 @@
#define STM32_GPT_USE_TIM3 FALSE
#define STM32_GPT_USE_TIM4 FALSE
#define STM32_GPT_USE_TIM5 FALSE
#define STM32_GPT_USE_TIM8 FALSE#define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_USE_TIM8 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
@ -82,7 +97,8 @@
#define STM32_ICU_USE_TIM3 FALSE
#define STM32_ICU_USE_TIM4 TRUE
#define STM32_ICU_USE_TIM5 FALSE
#define STM32_ICU_USE_TIM8 FALSE#define STM32_ICU_TIM1_IRQ_PRIORITY 7
#define STM32_ICU_USE_TIM8 FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
@ -97,7 +113,8 @@
#define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_USE_TIM8 FALSE#define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_USE_TIM8 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
@ -111,11 +128,13 @@
#define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.

11
demos/ARMCM3-STM32F103ZG-FATFS/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

34
demos/ARMCM3-STM32F103ZG-FATFS/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

258
demos/ARMCM3-STM32F103ZG-FATFS/iar/ch.ewp
View File

@ -12,7 +12,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
<version>18</version>
<version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -29,7 +29,7 @@
</option>
<option>
<name>Variant</name>
<version>17</version>
<version>19</version>
<state>37</state>
</option>
<option>
@ -38,8 +38,8 @@
</option>
<option>
<name>Input variant</name>
<version>1</version>
<state>3</state>
<version>3</version>
<state>6</state>
</option>
<option>
<name>Input description</name>
@ -47,8 +47,8 @@
</option>
<option>
<name>Output variant</name>
<version>0</version>
<state>3</state>
<version>2</version>
<state>7</state>
</option>
<option>
<name>Output description</name>
@ -60,7 +60,7 @@
</option>
<option>
<name>FPU</name>
<version>1</version>
<version>2</version>
<state>0</state>
</option>
<option>
@ -87,7 +87,7 @@
</option>
<option>
<name>OGLastSavedByProductVersion</name>
<state>6.10.1.52170</state>
<state>6.20.2.52635</state>
</option>
<option>
<name>GeneralEnableMisra</name>
@ -135,18 +135,36 @@
<name>RTConfigPath2</name>
<state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
</option>
<option>
<name>GFPUCoreSlave</name>
<version>19</version>
<state>37</state>
</option>
<option>
<name>GBECoreSlave</name>
<version>19</version>
<state>37</state>
</option>
<option>
<name>OGUseCmsis</name>
<state>0</state>
</option>
<option>
<name>OGUseCmsisDspLib</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>ICCARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>26</version>
<version>28</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CCDefines</name>
<state>SHELL_USE_IPRINTF=FALSE</state>
<state></state>
</option>
<option>
<name>CCPreprocFile</name>
@ -277,13 +295,18 @@
<name>CCIncludePath2</name>
<state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\kernel\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\common\ARMCMx\CMSIS\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\os\hal\include</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\DMAv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\USBv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\os\various</state>
<state>$PROJ_DIR$\..\..\..\boards\ST_STM3210E_EVAL</state>
<state>$PROJ_DIR$\..\..\..\ext\fatfs\src</state>
<state>$PROJ_DIR$\..\..\..\boards\ST_STM3210E_EVAL</state>
<state>$PROJ_DIR$\..\..\..\test</state>
</option>
<option>
@ -366,11 +389,15 @@
<state>1</state>
</option>
<option>
<name>IccRelaxedFpPrecision</name>
<name>IccCppInlineSemantics</name>
<state>0</state>
</option>
<option>
<name>IccCppInlineSemantics</name>
<name>IccCmsis</name>
<state>1</state>
</option>
<option>
<name>IccFloatSemantics</name>
<state>0</state>
</option>
</data>
@ -525,8 +552,8 @@
</option>
<option>
<name>AUserIncludes</name>
<state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
<state>$PROJ_DIR$\..</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\boards\ST_STM3210E_EVAL</state>
</option>
<option>
@ -594,7 +621,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>11</version>
<version>13</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -840,6 +867,22 @@
<name>IlinkOptExceptionsForce</name>
<state>0</state>
</option>
<option>
<name>IlinkCmsis</name>
<state>1</state>
</option>
<option>
<name>IlinkOptMergeDuplSections</name>
<state>0</state>
</option>
<option>
<name>IlinkOptUseVfe</name>
<state>1</state>
</option>
<option>
<name>IlinkOptForceVfe</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -879,7 +922,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
<version>18</version>
<version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -896,7 +939,7 @@
</option>
<option>
<name>Variant</name>
<version>17</version>
<version>19</version>
<state>37</state>
</option>
<option>
@ -905,8 +948,8 @@
</option>
<option>
<name>Input variant</name>
<version>1</version>
<state>3</state>
<version>3</version>
<state>6</state>
</option>
<option>
<name>Input description</name>
@ -914,8 +957,8 @@
</option>
<option>
<name>Output variant</name>
<version>0</version>
<state>3</state>
<version>2</version>
<state>7</state>
</option>
<option>
<name>Output description</name>
@ -927,7 +970,7 @@
</option>
<option>
<name>FPU</name>
<version>1</version>
<version>2</version>
<state>0</state>
</option>
<option>
@ -954,7 +997,7 @@
</option>
<option>
<name>OGLastSavedByProductVersion</name>
<state>6.10.1.52170</state>
<state>6.21.4.52945</state>
</option>
<option>
<name>GeneralEnableMisra</name>
@ -1002,19 +1045,36 @@
<name>RTConfigPath2</name>
<state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
</option>
<option>
<name>GFPUCoreSlave</name>
<version>19</version>
<state>37</state>
</option>
<option>
<name>GBECoreSlave</name>
<version>19</version>
<state>37</state>
</option>
<option>
<name>OGUseCmsis</name>
<state>0</state>
</option>
<option>
<name>OGUseCmsisDspLib</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>ICCARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>26</version>
<version>28</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>CCDefines</name>
<state>NDEBUG</state>
<state>SHELL_USE_IPRINTF=FALSE</state>
</option>
<option>
<name>CCPreprocFile</name>
@ -1145,13 +1205,18 @@
<name>CCIncludePath2</name>
<state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\kernel\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\common\ARMCMx\CMSIS\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\os\hal\include</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\DMAv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\USBv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\os\various</state>
<state>$PROJ_DIR$\..\..\..\boards\ST_STM3210E_EVAL</state>
<state>$PROJ_DIR$\..\..\..\ext\fatfs\src</state>
<state>$PROJ_DIR$\..\..\..\boards\ST_STM3210E_EVAL</state>
<state>$PROJ_DIR$\..\..\..\test</state>
</option>
<option>
@ -1177,7 +1242,7 @@
<option>
<name>CCOptStrategy</name>
<version>0</version>
<state>1</state>
<state>2</state>
</option>
<option>
<name>CCOptLevelSlave</name>
@ -1234,11 +1299,15 @@
<state>1</state>
</option>
<option>
<name>IccRelaxedFpPrecision</name>
<name>IccCppInlineSemantics</name>
<state>0</state>
</option>
<option>
<name>IccCppInlineSemantics</name>
<name>IccCmsis</name>
<state>1</state>
</option>
<option>
<name>IccFloatSemantics</name>
<state>0</state>
</option>
</data>
@ -1393,8 +1462,8 @@
</option>
<option>
<name>AUserIncludes</name>
<state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
<state>$PROJ_DIR$\..</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\boards\ST_STM3210E_EVAL</state>
</option>
<option>
@ -1462,7 +1531,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>11</version>
<version>13</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1708,6 +1777,22 @@
<name>IlinkOptExceptionsForce</name>
<state>0</state>
</option>
<option>
<name>IlinkCmsis</name>
<state>1</state>
</option>
<option>
<name>IlinkOptMergeDuplSections</name>
<state>0</state>
</option>
<option>
<name>IlinkOptUseVfe</name>
<state>1</state>
</option>
<option>
<name>IlinkOptForceVfe</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -1782,6 +1867,9 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\can.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\ext.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\gpt.h</name>
</file>
@ -1809,6 +1897,9 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\pwm.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\rtc.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\sdc.h</name>
</file>
@ -1839,6 +1930,9 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\can.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\ext.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\gpt.c</name>
</file>
@ -1863,6 +1957,9 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\pwm.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\rtc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\sdc.c</name>
</file>
@ -1890,9 +1987,6 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\kernel\include\ch.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\kernel\include\chbsem.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\kernel\include\chcond.h</name>
</file>
@ -1905,9 +1999,6 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\kernel\include\chevents.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\kernel\include\chfiles.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\kernel\include\chheap.h</name>
</file>
@ -2021,58 +2112,25 @@
<group>
<name>platform</name>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\adc_lld.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\adc_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\can_lld.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld_f100.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\can_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld_f103.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\core_cm3.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld_f105_f107.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\gpt_lld.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv1\pal_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\gpt_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f100.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f103.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f105_f107.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\icu_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\icu_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pal_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pal_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv1\pal_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\sdc_lld.c</name>
@ -2087,45 +2145,27 @@
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\serial_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32_dma.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\stm32_rcc.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32_dma.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32_usb.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32f10x.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\uart_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\uart_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\usb_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\usb_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\stm32f10x.h</name>
</file>
</group>
<group>
<name>port</name>
<group>
<name>STM32</name>
<name>STM32F1xx</name>
<file>
<name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32\cmparams.h</name>
<name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx\cmparams.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32\vectors.s</name>
<name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx\vectors.s</name>
</file>
</group>
<file>
@ -2158,6 +2198,12 @@
</group>
<group>
<name>various</name>
<file>
<name>$PROJ_DIR$\..\..\..\os\various\chprintf.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\various\chprintf.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\various\shell.c</name>
</file>

18
demos/ARMCM3-STM32F103ZG-FATFS/main.c
View File

@ -194,23 +194,7 @@ static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) {
}
static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) {
static const char *states[] = {
"READY",
"CURRENT",
"SUSPENDED",
"WTSEM",
"WTMTX",
"WTCOND",
"SLEEPING",
"WTEXIT",
"WTOREVT",
"WTANDEVT",
"SNDMSGQ",
"SNDMSG",
"WTMSG",
"WTQUEUE",
"FINAL"
};
static const char *states[] = {THD_STATE_NAMES};
Thread *tp;
(void)argv;

18
demos/ARMCM3-STM32F103ZG-FATFS/mcuconf.h
View File

@ -52,7 +52,6 @@
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
@ -60,6 +59,21 @@
#define STM32_CAN_USE_CAN1 TRUE
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
* EXT driver system settings.
*/
#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
/*
* GPT driver system settings.
*/
@ -124,11 +138,13 @@
#define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.

11
demos/ARMCM3-STM32F107/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

34
demos/ARMCM3-STM32F107/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

232
demos/ARMCM3-STM32F107/iar/ch.ewp
View File

@ -12,7 +12,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
<version>18</version>
<version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -29,7 +29,7 @@
</option>
<option>
<name>Variant</name>
<version>17</version>
<version>19</version>
<state>37</state>
</option>
<option>
@ -38,8 +38,8 @@
</option>
<option>
<name>Input variant</name>
<version>1</version>
<state>3</state>
<version>3</version>
<state>6</state>
</option>
<option>
<name>Input description</name>
@ -47,8 +47,8 @@
</option>
<option>
<name>Output variant</name>
<version>0</version>
<state>3</state>
<version>2</version>
<state>7</state>
</option>
<option>
<name>Output description</name>
@ -60,7 +60,7 @@
</option>
<option>
<name>FPU</name>
<version>1</version>
<version>2</version>
<state>0</state>
</option>
<option>
@ -87,7 +87,7 @@
</option>
<option>
<name>OGLastSavedByProductVersion</name>
<state>6.10.1.52170</state>
<state>6.20.2.52635</state>
</option>
<option>
<name>GeneralEnableMisra</name>
@ -99,7 +99,7 @@
</option>
<option>
<name>OGChipSelectEditMenu</name>
<state>STM32F10xxB ST STM32F10xxB</state>
<state>STM32F107xC ST STM32F107xC</state>
</option>
<option>
<name>GenLowLevelInterface</name>
@ -135,13 +135,31 @@
<name>RTConfigPath2</name>
<state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
</option>
<option>
<name>GFPUCoreSlave</name>
<version>19</version>
<state>37</state>
</option>
<option>
<name>GBECoreSlave</name>
<version>19</version>
<state>37</state>
</option>
<option>
<name>OGUseCmsis</name>
<state>0</state>
</option>
<option>
<name>OGUseCmsisDspLib</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>ICCARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>26</version>
<version>28</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -277,10 +295,15 @@
<name>CCIncludePath2</name>
<state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\kernel\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\common\ARMCMx\CMSIS\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\os\hal\include</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\DMAv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\USBv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\boards\OLIMEX_STM32_P107</state>
<state>$PROJ_DIR$\..\..\..\test</state>
</option>
@ -364,11 +387,15 @@
<state>1</state>
</option>
<option>
<name>IccRelaxedFpPrecision</name>
<name>IccCppInlineSemantics</name>
<state>0</state>
</option>
<option>
<name>IccCppInlineSemantics</name>
<name>IccCmsis</name>
<state>1</state>
</option>
<option>
<name>IccFloatSemantics</name>
<state>0</state>
</option>
</data>
@ -523,7 +550,8 @@
</option>
<option>
<name>AUserIncludes</name>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
<state>$PROJ_DIR$\..</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\boards\OLIMEX_STM32_P107</state>
</option>
<option>
@ -591,7 +619,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>11</version>
<version>13</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@ -837,6 +865,22 @@
<name>IlinkOptExceptionsForce</name>
<state>0</state>
</option>
<option>
<name>IlinkCmsis</name>
<state>1</state>
</option>
<option>
<name>IlinkOptMergeDuplSections</name>
<state>0</state>
</option>
<option>
<name>IlinkOptUseVfe</name>
<state>1</state>
</option>
<option>
<name>IlinkOptForceVfe</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -876,7 +920,7 @@
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
<version>18</version>
<version>21</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -893,7 +937,7 @@
</option>
<option>
<name>Variant</name>
<version>17</version>
<version>19</version>
<state>37</state>
</option>
<option>
@ -902,8 +946,8 @@
</option>
<option>
<name>Input variant</name>
<version>1</version>
<state>3</state>
<version>3</version>
<state>6</state>
</option>
<option>
<name>Input description</name>
@ -911,8 +955,8 @@
</option>
<option>
<name>Output variant</name>
<version>0</version>
<state>3</state>
<version>2</version>
<state>7</state>
</option>
<option>
<name>Output description</name>
@ -924,7 +968,7 @@
</option>
<option>
<name>FPU</name>
<version>1</version>
<version>2</version>
<state>0</state>
</option>
<option>
@ -951,7 +995,7 @@
</option>
<option>
<name>OGLastSavedByProductVersion</name>
<state>6.10.1.52170</state>
<state>6.21.4.52945</state>
</option>
<option>
<name>GeneralEnableMisra</name>
@ -999,13 +1043,31 @@
<name>RTConfigPath2</name>
<state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
</option>
<option>
<name>GFPUCoreSlave</name>
<version>19</version>
<state>37</state>
</option>
<option>
<name>GBECoreSlave</name>
<version>19</version>
<state>37</state>
</option>
<option>
<name>OGUseCmsis</name>
<state>0</state>
</option>
<option>
<name>OGUseCmsisDspLib</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>ICCARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>26</version>
<version>28</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1141,11 +1203,15 @@
<name>CCIncludePath2</name>
<state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\kernel\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\common\ARMCMx\CMSIS\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\os\hal\include</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\various</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\DMAv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\USBv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\boards\OLIMEX_STM32_P107</state>
<state>$PROJ_DIR$\..\..\..\test</state>
</option>
@ -1229,11 +1295,15 @@
<state>1</state>
</option>
<option>
<name>IccRelaxedFpPrecision</name>
<name>IccCppInlineSemantics</name>
<state>0</state>
</option>
<option>
<name>IccCppInlineSemantics</name>
<name>IccCmsis</name>
<state>1</state>
</option>
<option>
<name>IccFloatSemantics</name>
<state>0</state>
</option>
</data>
@ -1388,7 +1458,8 @@
</option>
<option>
<name>AUserIncludes</name>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32</state>
<state>$PROJ_DIR$\..</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx</state>
<state>$PROJ_DIR$\..\..\..\boards\OLIMEX_STM32_P107</state>
</option>
<option>
@ -1456,7 +1527,7 @@
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>11</version>
<version>13</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
@ -1702,6 +1773,22 @@
<name>IlinkOptExceptionsForce</name>
<state>0</state>
</option>
<option>
<name>IlinkCmsis</name>
<state>1</state>
</option>
<option>
<name>IlinkOptMergeDuplSections</name>
<state>0</state>
</option>
<option>
<name>IlinkOptUseVfe</name>
<state>1</state>
</option>
<option>
<name>IlinkOptForceVfe</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
@ -1752,6 +1839,9 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\can.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\ext.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\gpt.h</name>
</file>
@ -1761,6 +1851,9 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\i2c.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\icu.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\mac.h</name>
</file>
@ -1776,6 +1869,12 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\pwm.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\rtc.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\sdc.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\serial.h</name>
</file>
@ -1791,6 +1890,9 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\usb.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\usb_cdc.h</name>
</file>
</group>
<group>
<name>src</name>
@ -1800,6 +1902,9 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\can.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\ext.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\gpt.c</name>
</file>
@ -1809,6 +1914,9 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\i2c.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\icu.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\mac.c</name>
</file>
@ -1821,6 +1929,12 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\pwm.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\rtc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\sdc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\serial.c</name>
</file>
@ -1970,46 +2084,25 @@
<group>
<name>platform</name>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\adc_lld.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\adc_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\can_lld.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld_f100.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\can_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld_f103.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\core_cm3.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\hal_lld_f105_f107.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv1\pal_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f100.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f103.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f105_f107.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pal_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pal_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv1\pal_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\serial_lld.c</name>
@ -2018,36 +2111,27 @@
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\serial_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32_dma.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\stm32_rcc.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32_dma.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32f10x.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\uart_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\uart_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F1xx\stm32f10x.h</name>
</file>
</group>
<group>
<name>port</name>
<group>
<name>STM32</name>
<name>STM32F1xx</name>
<file>
<name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32\cmparams.h</name>
<name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx\cmparams.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32\vectors.s</name>
<name>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F1xx\vectors.s</name>
</file>
</group>
<file>

181
demos/ARMCM3-STM32F107/keil/ch.uvproj
View File

@ -346,7 +346,7 @@
<MiscControls></MiscControls>
<Define>__heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_IRAM2$$Base</Define>
<Undefine></Undefine>
<IncludePath>..\;..\..\..\os\kernel\include;..\..\..\os\ports\RVCT\ARMCMx;..\..\..\os\ports\RVCT\ARMCMx\STM32;..\..\..\os\hal\include;..\..\..\os\hal\platforms\STM32;..\..\..\os\various;..\..\..\boards\OLIMEX_STM32_P107;..\..\..\test</IncludePath>
<IncludePath>..\;..\..\..\os\kernel\include;..\..\..\os\ports\RVCT\ARMCMx;..\..\..\os\ports\RVCT\ARMCMx\STM32F1xx;..\..\..\os\hal\include;..\..\..\os\hal\platforms\STM32;..\..\..\os\hal\platforms\STM32F1xx;..\..\..\os\hal\platforms\STM32\GPIOv1;..\..\..\os\hal\platforms\STM32\DMAv1;..\..\..\os\various;..\..\..\boards\OLIMEX_STM32_P107;..\..\..\test</IncludePath>
</VariousControls>
</Cads>
<Aads>
@ -361,7 +361,7 @@
<MiscControls>--cpreproc</MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath>..\..\..\boards\OLIMEX_STM32_P107;..\..\..\os\ports\RVCT\ARMCMx\STM32</IncludePath>
<IncludePath>..\;..\..\..\boards\OLIMEX_STM32_P107;..\..\..\os\ports\RVCT\ARMCMx\STM32F1xx</IncludePath>
</VariousControls>
</Aads>
<LDads>
@ -409,7 +409,7 @@
<File>
<FileName>vectors.s</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\STM32\vectors.s</FilePath>
<FilePath>D:\Progetti\ChibiOS-RT\os\ports\RVCT\ARMCMx\STM32F1xx\vectors.s</FilePath>
</File>
<File>
<FileName>chcoreasm_v7m.s</FileName>
@ -816,115 +816,120 @@
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\usb.h</FilePath>
</File>
<File>
<FileName>ext.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\ext.h</FilePath>
</File>
<File>
<FileName>icu.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\icu.h</FilePath>
</File>
<File>
<FileName>rtc.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\rtc.h</FilePath>
</File>
<File>
<FileName>sdc.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\sdc.h</FilePath>
</File>
<File>
<FileName>usb_cdc.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\usb_cdc.h</FilePath>
</File>
<File>
<FileName>ext.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\ext.c</FilePath>
</File>
<File>
<FileName>icu.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\icu.c</FilePath>
</File>
<File>
<FileName>rtc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\rtc.c</FilePath>
</File>
<File>
<FileName>sdc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\sdc.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>platform</GroupName>
<Files>
<File>
<FileName>adc_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\adc_lld.c</FilePath>
</File>
<File>
<FileName>can_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\can_lld.c</FilePath>
</File>
<File>
<FileName>hal_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\hal_lld.c</FilePath>
</File>
<File>
<FileName>pal_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\pal_lld.c</FilePath>
</File>
<File>
<FileName>pwm_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\pwm_lld.c</FilePath>
<FileName>serial_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.h</FilePath>
</File>
<File>
<FileName>serial_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.c</FilePath>
</File>
<File>
<FileName>spi_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.c</FilePath>
</File>
<File>
<FileName>stm32_dma.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\stm32_dma.c</FilePath>
</File>
<File>
<FileName>uart_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\uart_lld.c</FilePath>
</File>
<File>
<FileName>adc_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\adc_lld.h</FilePath>
</File>
<File>
<FileName>can_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\can_lld.h</FilePath>
</File>
<File>
<FileName>core_cm3.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\core_cm3.h</FilePath>
</File>
<File>
<FileName>hal_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\hal_lld.h</FilePath>
</File>
<File>
<FileName>hal_lld_f103.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\hal_lld_f103.h</FilePath>
</File>
<File>
<FileName>pal_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\pal_lld.h</FilePath>
<FilePath>..\..\..\os\hal\platforms\STM32\GPIOv1\pal_lld.h</FilePath>
</File>
<File>
<FileName>pwm_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\pwm_lld.h</FilePath>
</File>
<File>
<FileName>serial_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.h</FilePath>
</File>
<File>
<FileName>spi_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.h</FilePath>
</File>
<File>
<FileName>stm32_dma.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\stm32_dma.h</FilePath>
<FileName>pal_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\GPIOv1\pal_lld.c</FilePath>
</File>
<File>
<FileName>stm32f10x.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\stm32f10x.h</FilePath>
<FilePath>..\..\..\os\hal\platforms\STM32F1xx\stm32f10x.h</FilePath>
</File>
<File>
<FileName>uart_lld.h</FileName>
<FileName>hal_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F1xx\hal_lld.c</FilePath>
</File>
<File>
<FileName>hal_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\uart_lld.h</FilePath>
<FilePath>..\..\..\os\hal\platforms\STM32F1xx\hal_lld.h</FilePath>
</File>
<File>
<FileName>hal_lld_f100.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F1xx\hal_lld_f100.h</FilePath>
</File>
<File>
<FileName>hal_lld_f103.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F1xx\hal_lld_f103.h</FilePath>
</File>
<File>
<FileName>hal_lld_f105_f107.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F1xx\hal_lld_f105_f107.h</FilePath>
</File>
<File>
<FileName>stm32_rcc.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F1xx\stm32_rcc.h</FilePath>
</File>
<File>
<FileName>stm32_dma.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.c</FilePath>
</File>
<File>
<FileName>stm32_dma.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F1xx\stm32_dma.h</FilePath>
</File>
</Files>
</Group>

18
demos/ARMCM3-STM32F107/mcuconf.h
View File

@ -59,7 +59,6 @@
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
@ -67,6 +66,21 @@
#define STM32_CAN_USE_CAN1 TRUE
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
* EXT driver system settings.
*/
#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
/*
* GPT driver system settings.
*/
@ -124,11 +138,13 @@
#define STM32_SERIAL_USE_USART3 TRUE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.

11
demos/ARMCM3-STM32L152-DISCOVERY/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
@ -23,9 +28,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable register caching optimization (read documentation).
ifeq ($(USE_CURRP_CACHING),)
USE_CURRP_CACHING = no
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#

46
demos/ARMCM3-STM32L152-DISCOVERY/halconf.h
View File

@ -45,7 +45,7 @@
* @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
#define HAL_USE_ADC FALSE
#define HAL_USE_ADC TRUE
#endif
/**
@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -94,7 +101,14 @@
* @brief Enables the PWM subsystem.
*/
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
#define HAL_USE_PWM FALSE
#define HAL_USE_PWM TRUE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
@ -108,21 +122,21 @@
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL FALSE
#define HAL_USE_SERIAL TRUE
#endif
/**
* @brief Enables the SERIAL over USB subsystem.
*/
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL_USB TRUE
#define HAL_USE_SERIAL_USB FALSE
#endif
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
#define HAL_USE_SPI FALSE
#define HAL_USE_SPI TRUE
#endif
/**
@ -136,7 +150,7 @@
* @brief Enables the USB subsystem.
*/
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
#define HAL_USE_USB TRUE
#define HAL_USE_USB FALSE
#endif
/*===========================================================================*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

86
demos/ARMCM3-STM32L152-DISCOVERY/iar/ch.ewp
View File

@ -87,7 +87,7 @@
</option>
<option>
<name>OGLastSavedByProductVersion</name>
<state>6.20.2.52635</state>
<state>6.21.4.52945</state>
</option>
<option>
<name>GeneralEnableMisra</name>
@ -99,7 +99,7 @@
</option>
<option>
<name>OGChipSelectEditMenu</name>
<state>STM32L151xB ST STM32L151xB</state>
<state>STM32L152xB ST STM32L152xB</state>
</option>
<option>
<name>GenLowLevelInterface</name>
@ -295,9 +295,14 @@
<name>CCIncludePath2</name>
<state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\kernel\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\common\ARMCMx\CMSIS\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32L1xx</state>
<state>$PROJ_DIR$\..\..\..\os\hal\include</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\DMAv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv2</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\USBv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32L1xx</state>
<state>$PROJ_DIR$\..\..\..\boards\ST_STM32L_DISCOVERY</state>
<state>$PROJ_DIR$\..\..\..\test</state>
@ -1198,9 +1203,14 @@
<name>CCIncludePath2</name>
<state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\kernel\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\common\ARMCMx\CMSIS\include</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32L1xx</state>
<state>$PROJ_DIR$\..\..\..\os\hal\include</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\DMAv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv2</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\USBv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32L1xx</state>
<state>$PROJ_DIR$\..\..\..\boards\ST_STM32L_DISCOVERY</state>
<state>$PROJ_DIR$\..\..\..\test</state>
@ -1829,12 +1839,21 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\can.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\ext.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\gpt.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\hal.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\i2c.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\icu.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\mac.h</name>
</file>
@ -1850,15 +1869,30 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\pwm.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\rtc.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\sdc.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\serial.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\serial_usb.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\spi.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\uart.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\usb.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\include\usb_cdc.h</name>
</file>
</group>
<group>
<name>src</name>
@ -1868,12 +1902,21 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\can.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\ext.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\gpt.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\hal.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\i2c.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\icu.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\mac.c</name>
</file>
@ -1886,15 +1929,27 @@
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\pwm.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\rtc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\sdc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\serial.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\serial_usb.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\spi.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\uart.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\src\usb.c</name>
</file>
</group>
</group>
<group>
@ -2029,7 +2084,10 @@
<group>
<name>platform</name>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32L1xx\core_cm3.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32L1xx\adc_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32L1xx\adc_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32L1xx\hal_lld.c</name>
@ -2038,10 +2096,28 @@
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32L1xx\hal_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32L1xx\pal_lld.c</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32L1xx\pal_lld.h</name>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\serial_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\serial_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32L1xx\stm32_dma.c</name>

980
demos/ARMCM3-STM32L152-DISCOVERY/keil/ch.uvproj Normal file
View File

@ -0,0 +1,980 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
<SchemaVersion>1.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>Demo</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<TargetCommonOption>
<Device>STM32L152RB</Device>
<Vendor>STMicroelectronics</Vendor>
<Cpu>IRAM(0x20000000-0x20003FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile>"STARTUP\ST\STM32L1xx\startup_stm32l1xx_md.s" ("STM32L15xx Medium density Startup Code")</StartupFile>
<FlashDriverDll>ULP2CM3(-O207 -S8 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32L15x_128 -FS08000000 -FL020000)</FlashDriverDll>
<DeviceId>5248</DeviceId>
<RegisterFile>stm32l1xx.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>SFD\ST\STM32L15x\STM32L15x.sfr</SFDFile>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath>ST\STM32L1xx\</RegisterFilePath>
<DBRegisterFilePath>ST\STM32L1xx\</DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\obj\</OutputDirectory>
<OutputName>ch</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\lst\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments></SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM3</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
<Simulator>
<UseSimulator>0</UseSimulator>
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
<RunToMain>1</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>1</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
</Simulator>
<Target>
<UseTarget>1</UseTarget>
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
<RunToMain>0</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
</Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>8</TargetSelection>
<SimDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
</SimDlls>
<TargetDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
<Driver>STLink\ST-LINKIII-KEIL.dll</Driver>
</TargetDlls>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4100</DriverSelection>
</Flash1>
<Flash2>STLink\ST-LINKIII-KEIL.dll</Flash2>
<Flash3></Flash3>
<Flash4></Flash4>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M3"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>1</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x4000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x20000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x20000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x4000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x20004000</StartAddress>
<Size>0x1</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>4</Optim>
<oTime>1</oTime>
<SplitLS>0</SplitLS>
<OneElfS>0</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>0</wLevel>
<uThumb>0</uThumb>
<VariousControls>
<MiscControls></MiscControls>
<Define>__heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_IRAM2$$Base</Define>
<Undefine></Undefine>
<IncludePath>..\;..\..\..\os\kernel\include;..\..\..\os\ports\RVCT\ARMCMx;..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx;..\..\..\os\hal\include;..\..\..\os\hal\platforms\STM32;..\..\..\os\hal\platforms\STM32\GPIOv2;..\..\..\os\hal\platforms\STM32L1xx;..\..\..\boards\ST_STM32L_DISCOVERY;..\..\..\test</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<VariousControls>
<MiscControls>--cpreproc</MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath>..\;..\..\..\boards\ST_STM32L_DISCOVERY;..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx</IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>1</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x08000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>board</GroupName>
<Files>
<File>
<FileName>board.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\boards\ST_STM32L_DISCOVERY\board.c</FilePath>
</File>
<File>
<FileName>board.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\boards\ST_STM32L_DISCOVERY\board.h</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>port</GroupName>
<Files>
<File>
<FileName>cstartup.s</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\cstartup.s</FilePath>
</File>
<File>
<FileName>chcoreasm_v7m.s</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcoreasm_v7m.s</FilePath>
</File>
<File>
<FileName>chcore.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore.c</FilePath>
</File>
<File>
<FileName>chcore_v7m.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore_v7m.c</FilePath>
</File>
<File>
<FileName>nvic.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\nvic.c</FilePath>
</File>
<File>
<FileName>chcore.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore.h</FilePath>
</File>
<File>
<FileName>chcore_v7m.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore_v7m.h</FilePath>
</File>
<File>
<FileName>chtypes.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\chtypes.h</FilePath>
</File>
<File>
<FileName>nvic.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\nvic.h</FilePath>
</File>
<File>
<FileName>cmparams.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx\cmparams.h</FilePath>
</File>
<File>
<FileName>vectors.s</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx\vectors.s</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>kernel</GroupName>
<Files>
<File>
<FileName>chcond.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chcond.c</FilePath>
</File>
<File>
<FileName>chdebug.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chdebug.c</FilePath>
</File>
<File>
<FileName>chdynamic.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chdynamic.c</FilePath>
</File>
<File>
<FileName>chevents.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chevents.c</FilePath>
</File>
<File>
<FileName>chheap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chheap.c</FilePath>
</File>
<File>
<FileName>chlists.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chlists.c</FilePath>
</File>
<File>
<FileName>chmboxes.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chmboxes.c</FilePath>
</File>
<File>
<FileName>chmemcore.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chmemcore.c</FilePath>
</File>
<File>
<FileName>chmempools.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chmempools.c</FilePath>
</File>
<File>
<FileName>chmsg.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chmsg.c</FilePath>
</File>
<File>
<FileName>chmtx.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chmtx.c</FilePath>
</File>
<File>
<FileName>chqueues.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chqueues.c</FilePath>
</File>
<File>
<FileName>chregistry.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chregistry.c</FilePath>
</File>
<File>
<FileName>chschd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chschd.c</FilePath>
</File>
<File>
<FileName>chsem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chsem.c</FilePath>
</File>
<File>
<FileName>chsys.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chsys.c</FilePath>
</File>
<File>
<FileName>chthreads.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chthreads.c</FilePath>
</File>
<File>
<FileName>chvt.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\kernel\src\chvt.c</FilePath>
</File>
<File>
<FileName>ch.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\ch.h</FilePath>
</File>
<File>
<FileName>chbsem.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chbsem.h</FilePath>
</File>
<File>
<FileName>chcond.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chcond.h</FilePath>
</File>
<File>
<FileName>chdebug.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chdebug.h</FilePath>
</File>
<File>
<FileName>chdynamic.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chdynamic.h</FilePath>
</File>
<File>
<FileName>chevents.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chevents.h</FilePath>
</File>
<File>
<FileName>chfiles.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chfiles.h</FilePath>
</File>
<File>
<FileName>chheap.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chheap.h</FilePath>
</File>
<File>
<FileName>chinline.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chinline.h</FilePath>
</File>
<File>
<FileName>chioch.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chioch.h</FilePath>
</File>
<File>
<FileName>chlists.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chlists.h</FilePath>
</File>
<File>
<FileName>chmboxes.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chmboxes.h</FilePath>
</File>
<File>
<FileName>chmemcore.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chmemcore.h</FilePath>
</File>
<File>
<FileName>chmempools.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chmempools.h</FilePath>
</File>
<File>
<FileName>chmsg.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chmsg.h</FilePath>
</File>
<File>
<FileName>chmtx.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chmtx.h</FilePath>
</File>
<File>
<FileName>chqueues.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chqueues.h</FilePath>
</File>
<File>
<FileName>chregistry.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chregistry.h</FilePath>
</File>
<File>
<FileName>chschd.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chschd.h</FilePath>
</File>
<File>
<FileName>chsem.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chsem.h</FilePath>
</File>
<File>
<FileName>chstreams.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chstreams.h</FilePath>
</File>
<File>
<FileName>chsys.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chsys.h</FilePath>
</File>
<File>
<FileName>chthreads.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chthreads.h</FilePath>
</File>
<File>
<FileName>chvt.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\kernel\include\chvt.h</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>hal</GroupName>
<Files>
<File>
<FileName>adc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\adc.c</FilePath>
</File>
<File>
<FileName>hal.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\hal.c</FilePath>
</File>
<File>
<FileName>pal.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\pal.c</FilePath>
</File>
<File>
<FileName>pwm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\pwm.c</FilePath>
</File>
<File>
<FileName>serial.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\serial.c</FilePath>
</File>
<File>
<FileName>spi.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\spi.c</FilePath>
</File>
<File>
<FileName>adc.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\adc.h</FilePath>
</File>
<File>
<FileName>hal.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\hal.h</FilePath>
</File>
<File>
<FileName>pal.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\pal.h</FilePath>
</File>
<File>
<FileName>pwm.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\pwm.h</FilePath>
</File>
<File>
<FileName>serial.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\serial.h</FilePath>
</File>
<File>
<FileName>spi.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\spi.h</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>platform</GroupName>
<Files>
<File>
<FileName>adc_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32L1xx\adc_lld.c</FilePath>
</File>
<File>
<FileName>adc_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32L1xx\adc_lld.h</FilePath>
</File>
<File>
<FileName>hal_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32L1xx\hal_lld.c</FilePath>
</File>
<File>
<FileName>hal_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32L1xx\hal_lld.h</FilePath>
</File>
<File>
<FileName>pal_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.c</FilePath>
</File>
<File>
<FileName>pal_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.h</FilePath>
</File>
<File>
<FileName>pwm_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\pwm_lld.c</FilePath>
</File>
<File>
<FileName>pwm_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\pwm_lld.h</FilePath>
</File>
<File>
<FileName>serial_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.c</FilePath>
</File>
<File>
<FileName>spi_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.h</FilePath>
</File>
<File>
<FileName>spi_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.c</FilePath>
</File>
<File>
<FileName>serial_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.h</FilePath>
</File>
<File>
<FileName>stm32_dma.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32L1xx\stm32_dma.c</FilePath>
</File>
<File>
<FileName>stm32_dma.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32L1xx\stm32_dma.h</FilePath>
</File>
<File>
<FileName>stm32_rcc.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32L1xx\stm32_rcc.h</FilePath>
</File>
<File>
<FileName>stm32l1xx.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32L1xx\stm32l1xx.h</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>test</GroupName>
<Files>
<File>
<FileName>test.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\test.c</FilePath>
</File>
<File>
<FileName>testbmk.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testbmk.c</FilePath>
</File>
<File>
<FileName>testdyn.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testdyn.c</FilePath>
</File>
<File>
<FileName>testevt.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testevt.c</FilePath>
</File>
<File>
<FileName>testheap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testheap.c</FilePath>
</File>
<File>
<FileName>testmbox.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testmbox.c</FilePath>
</File>
<File>
<FileName>testmsg.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testmsg.c</FilePath>
</File>
<File>
<FileName>testmtx.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testmtx.c</FilePath>
</File>
<File>
<FileName>testpools.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testpools.c</FilePath>
</File>
<File>
<FileName>testqueues.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testqueues.c</FilePath>
</File>
<File>
<FileName>testsem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testsem.c</FilePath>
</File>
<File>
<FileName>testthd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testthd.c</FilePath>
</File>
<File>
<FileName>test.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\test.h</FilePath>
</File>
<File>
<FileName>testbmk.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\testbmk.h</FilePath>
</File>
<File>
<FileName>testdyn.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\testdyn.h</FilePath>
</File>
<File>
<FileName>testevt.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\testevt.h</FilePath>
</File>
<File>
<FileName>testheap.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\testheap.h</FilePath>
</File>
<File>
<FileName>testmbox.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\testmbox.h</FilePath>
</File>
<File>
<FileName>testmsg.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\testmsg.h</FilePath>
</File>
<File>
<FileName>testmtx.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\testmtx.h</FilePath>
</File>
<File>
<FileName>testpools.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\testpools.h</FilePath>
</File>
<File>
<FileName>testqueues.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\testqueues.h</FilePath>
</File>
<File>
<FileName>testsem.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\testsem.h</FilePath>
</File>
<File>
<FileName>testthd.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\testthd.h</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>demo</GroupName>
<Files>
<File>
<FileName>main.c</FileName>
<FileType>1</FileType>
<FilePath>..\main.c</FilePath>
</File>
<File>
<FileName>mcuconf.h</FileName>
<FileType>5</FileType>
<FilePath>..\mcuconf.h</FilePath>
</File>
<File>
<FileName>chconf.h</FileName>
<FileType>5</FileType>
<FilePath>..\chconf.h</FilePath>
</File>
<File>
<FileName>halconf.h</FileName>
<FileType>5</FileType>
<FilePath>..\halconf.h</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
</Project>

191
demos/ARMCM3-STM32L152-DISCOVERY/main.c
View File

@ -22,24 +22,149 @@
#include "hal.h"
#include "test.h"
static void pwmpcb(PWMDriver *pwmp);
static void adccb(ADCDriver *adcp, adcsample_t *buffer, size_t n);
static void spicb(SPIDriver *spip);
/* Total number of channels to be sampled by a single ADC operation.*/
#define ADC_GRP1_NUM_CHANNELS 2
/* Depth of the conversion buffer, channels are sampled four times each.*/
#define ADC_GRP1_BUF_DEPTH 4
/*
* ADC samples buffer.
*/
static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
/*
* ADC conversion group.
* Mode: Linear buffer, 4 samples of 2 channels, SW triggered.
* Channels: IN10 (48 cycles sample time)
* Sensor (192 cycles sample time)
*/
static const ADCConversionGroup adcgrpcfg = {
FALSE,
ADC_GRP1_NUM_CHANNELS,
adccb,
NULL,
/* HW dependent part.*/
0, /* CR1 */
ADC_CR2_SWSTART, /* CR2 */
0,
ADC_SMPR2_SMP_AN10(ADC_SAMPLE_48) | ADC_SMPR2_SMP_SENSOR(ADC_SAMPLE_192),
0,
ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS),
0,
0,
0,
ADC_SQR5_SQ2_N(ADC_CHANNEL_IN10) | ADC_SQR5_SQ1_N(ADC_CHANNEL_SENSOR)
};
/*
* PWM configuration structure.
* Cyclic callback enabled, channels 1 and 2 enabled without callbacks,
* the active state is a logic one.
*/
static PWMConfig pwmcfg = {
10000, /* 10KHz PWM clock frequency. */
10000, /* PWM period 1S (in ticks). */
pwmpcb,
{
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_DISABLED, NULL},
{PWM_OUTPUT_DISABLED, NULL}
},
/* HW dependent part.*/
0
};
/*
* SPI configuration structure.
* Maximum speed (12MHz), CPHA=0, CPOL=0, 16bits frames, MSb transmitted first.
* The slave select line is the pin GPIOA_SPI1NSS on the port GPIOA.
*/
static const SPIConfig spicfg = {
spicb,
/* HW dependent part.*/
GPIOB,
12,
SPI_CR1_DFF
};
/*
* PWM cyclic callback.
* A new ADC conversion is started.
*/
static void pwmpcb(PWMDriver *pwmp) {
(void)pwmp;
/* Starts an asynchronous ADC conversion operation, the conversion
will be executed in parallel to the current PWM cycle and will
terminate before the next PWM cycle.*/
chSysLockFromIsr();
adcStartConversionI(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH);
chSysUnlockFromIsr();
}
/*
* ADC end conversion callback.
* The PWM channels are reprogrammed using the latest ADC samples.
* The latest samples are transmitted into a single SPI transaction.
*/
void adccb(ADCDriver *adcp, adcsample_t *buffer, size_t n) {
(void) buffer; (void) n;
/* Note, only in the ADC_COMPLETE state because the ADC driver fires an
intermediate callback when the buffer is half full.*/
if (adcp->state == ADC_COMPLETE) {
adcsample_t avg_ch1, avg_ch2;
/* Calculates the average values from the ADC samples.*/
avg_ch1 = (samples[0] + samples[2] + samples[4] + samples[6]) / 4;
avg_ch2 = (samples[1] + samples[3] + samples[5] + samples[7]) / 4;
chSysLockFromIsr();
/* Changes the channels pulse width, the change will be effective
starting from the next cycle.*/
pwmEnableChannelI(&PWMD4, 0, PWM_FRACTION_TO_WIDTH(&PWMD4, 4096, avg_ch1));
pwmEnableChannelI(&PWMD4, 1, PWM_FRACTION_TO_WIDTH(&PWMD4, 4096, avg_ch2));
/* SPI slave selection and transmission start.*/
spiSelectI(&SPID2);
spiStartSendI(&SPID2, ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH, samples);
chSysUnlockFromIsr();
}
}
/*
* SPI end transfer callback.
*/
static void spicb(SPIDriver *spip) {
/* On transfer end just releases the slave select line.*/
chSysLockFromIsr();
spiUnselectI(spip);
chSysUnlockFromIsr();
}
/*
* This is a periodic thread that does absolutely nothing except increasing
* a seconds counter.
*/
static WORKING_AREA(waThread1, 128);
static msg_t Thread1(void *arg) {
static uint32_t seconds_counter;
(void)arg;
chRegSetThreadName("blinker");
chRegSetThreadName("counter");
while (TRUE) {
palSetPad(GPIOB, GPIOB_LED3);
chThdSleepMilliseconds(250);
palClearPad(GPIOB, GPIOB_LED3);
chThdSleepMilliseconds(250);
palSetPad(GPIOB, GPIOB_LED4);
chThdSleepMilliseconds(250);
palClearPad(GPIOB, GPIOB_LED4);
chThdSleepMilliseconds(250);
chThdSleepMilliseconds(1000);
seconds_counter++;
}
}
@ -60,39 +185,51 @@ int main(void) {
/*
* Activates the serial driver 1 using the driver default configuration.
* PA9 and PA10 are routed to USART1.
*/
// sdStart(&SD1, NULL);
sdStart(&SD1, NULL);
palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7));
palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7));
/*
* If the user button is pressed after the reset then the test suite is
* executed immediately before activating the various device drivers in
* order to not alter the benchmark scores.
*/
// if (palReadPad(GPIOA, GPIOA_BUTTON))
// TestThread(&SD1);
if (palReadPad(GPIOA, GPIOA_BUTTON))
TestThread(&SD1);
/*
* Initializes the SPI driver 1.
* Initializes the SPI driver 2. The SPI2 signals are routed as follow:
* PB12 - NSS.
* PB13 - SCK.
* PB14 - MISO.
* PB15 - MOSI.
*/
// spiStart(&SPID1, &spicfg);
spiStart(&SPID2, &spicfg);
palSetPad(GPIOB, 12);
palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST); /* NSS. */
palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) |
PAL_STM32_OSPEED_HIGHEST); /* SCK. */
palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5)); /* MISO. */
palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) |
PAL_STM32_OSPEED_HIGHEST); /* MOSI. */
/*
* Initializes the ADC driver 1.
* Initializes the ADC driver 1 and enable the thermal sensor.
* The pin PC0 on the port GPIOC is programmed as analog input.
*/
// adcStart(&ADCD1, NULL);
// palSetGroupMode(GPIOC, PAL_PORT_BIT(0), PAL_MODE_INPUT_ANALOG);
adcStart(&ADCD1, NULL);
adcSTM32EnableTSVREFE();
palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG);
/*
* Initializes the PWM driver 1, re-routes the TIM3 outputs, programs the
* pins as alternate functions.
* Note, the AFIO access routes the TIM3 output pins on the PC6...PC9
* where the LEDs are connected.
* Initializes the PWM driver 4, routes the TIM4 outputs to the board LEDs.
*/
// pwmStart(&PWMD3, &pwmcfg);
// AFIO->MAPR |= AFIO_MAPR_TIM3_REMAP_0 | AFIO_MAPR_TIM3_REMAP_1;
// palSetGroupMode(GPIOC, PAL_PORT_BIT(GPIOC_LED3) | PAL_PORT_BIT(GPIOC_LED4),
// PAL_MODE_STM32_ALTERNATE_PUSHPULL);
pwmStart(&PWMD4, &pwmcfg);
palSetPadMode(GPIOB, GPIOB_LED4, PAL_MODE_ALTERNATE(2));
palSetPadMode(GPIOB, GPIOB_LED3, PAL_MODE_ALTERNATE(2));
/*
* Creates the example thread.
@ -106,8 +243,8 @@ int main(void) {
* driver 1.
*/
while (TRUE) {
// if (palReadPad(GPIOA, GPIOA_BUTTON))
// TestThread(&SD1);
if (palReadPad(GPIOA, GPIOA_BUTTON))
TestThread(&SD1);
chThdSleepMilliseconds(500);
}
}

27
demos/ARMCM3-STM32L152-DISCOVERY/mcuconf.h
View File

@ -61,8 +61,8 @@
*/
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
#define STM32_ADC_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
/*
* CAN driver system settings.
@ -70,6 +70,21 @@
#define STM32_CAN_USE_CAN1 TRUE
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
* EXT driver system settings.
*/
#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
/*
* GPT driver system settings.
*/
@ -108,8 +123,8 @@
#define STM32_PWM_USE_ADVANCED FALSE
#define STM32_PWM_USE_TIM1 FALSE
#define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 TRUE
#define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 TRUE
#define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_USE_TIM8 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
@ -127,16 +142,18 @@
#define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.
*/
#define STM32_SPI_USE_SPI1 TRUE
#define STM32_SPI_USE_SPI1 FALSE
#define STM32_SPI_USE_SPI2 TRUE
#define STM32_SPI_USE_SPI3 FALSE
#define STM32_SPI_SPI1_DMA_PRIORITY 1

4
demos/ARMCM3-STM32L152-DISCOVERY/readme.txt
View File

@ -4,14 +4,14 @@
** TARGET **
The demo runs on an ST STM32VL-Discovery board.
The demo runs on an ST STM32L-Discovery board.
** The Demo **
The demo shows how to use the ADC, PWM and SPI drivers using asynchronous
APIs. The ADC samples two channels (temperature sensor and PC0) and modulates
the PWM using the sampled values. The sample data is also transmitted using
the SPI port 1.
the SPI port 2 (NSS=PB12, SCK=PB13, MISO=PB14, MOSI=PB15).
By pressing the button located on the board the test procedure is activated
with output on the serial port COM1 (USART1).

209
demos/ARMCM4-STM32F407-DISCOVERY/Makefile Normal file
View File

@ -0,0 +1,209 @@
##############################################################################
# Build global options
# NOTE: Can be overridden externally.
#
# Compiler options here.
ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
endif
# Enable this if you want the linker to remove unused code and data
ifeq ($(USE_LINK_GC),)
USE_LINK_GC = yes
endif
# If enabled, this option allows to compile the application in THUMB mode.
ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#
# Build global options
##############################################################################
##############################################################################
# Architecture or project specific options
#
# Enable this if you really want to use the STM FWLib.
ifeq ($(USE_FWLIB),)
USE_FWLIB = no
endif
#
# Architecture or project specific options
##############################################################################
##############################################################################
# Project, sources and paths
#
# Define project name here
PROJECT = ch
# Imported source files and paths
CHIBIOS = ../..
include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk
include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk
include $(CHIBIOS)/os/kernel/kernel.mk
include $(CHIBIOS)/test/test.mk
# Define linker script file here
LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CSRC = $(PORTSRC) \
$(KERNSRC) \
$(TESTSRC) \
$(HALSRC) \
$(PLATFORMSRC) \
$(BOARDSRC) \
$(CHIBIOS)/os/various/evtimer.c \
$(CHIBIOS)/os/various/syscalls.c \
main.c
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CPPSRC =
# C sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACSRC =
# C++ sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACPPSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCPPSRC =
# List ASM source files here
ASMSRC = $(PORTASM)
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
$(CHIBIOS)/os/various
#
# Project, sources and paths
##############################################################################
##############################################################################
# Compiler settings
#
MCU = cortex-m3
#TRGT = arm-elf-
TRGT = arm-none-eabi-
CC = $(TRGT)gcc
CPPC = $(TRGT)g++
# Enable loading with g++ only if you need C++ runtime support.
# NOTE: You can use C++ even without C++ support if you are careful. C++
# runtime support makes code size explode.
LD = $(TRGT)gcc
#LD = $(TRGT)g++
CP = $(TRGT)objcopy
AS = $(TRGT)gcc -x assembler-with-cpp
OD = $(TRGT)objdump
HEX = $(CP) -O ihex
BIN = $(CP) -O binary
# ARM-specific options here
AOPT =
# THUMB-specific options here
TOPT = -mthumb -DTHUMB
# Define C warning options here
CWARN = -Wall -Wextra -Wstrict-prototypes
# Define C++ warning options here
CPPWARN = -Wall -Wextra
#
# Compiler settings
##############################################################################
##############################################################################
# Start of default section
#
# List all default C defines here, like -D_DEBUG=1
DDEFS =
# List all default ASM defines here, like -D_DEBUG=1
DADEFS =
# List all default directories to look for include files here
DINCDIR =
# List the default directory to look for the libraries here
DLIBDIR =
# List all default libraries here
DLIBS =
#
# End of default section
##############################################################################
##############################################################################
# Start of user section
#
# List all user C define here, like -D_DEBUG=1
UDEFS =
# Define ASM defines here
UADEFS =
# List all user directories here
UINCDIR =
# List the user directory to look for the libraries here
ULIBDIR =
# List all user libraries here
ULIBS =
#
# End of user defines
##############################################################################
ifeq ($(USE_FWLIB),yes)
include $(CHIBIOS)/ext/stm32lib/stm32lib.mk
CSRC += $(STM32SRC)
INCDIR += $(STM32INC)
USE_OPT += -DUSE_STDPERIPH_DRIVER
endif
include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/chconf.h
* @brief Configuration file template.
* @details A copy of this file must be placed in each project directory, it
* contains the application specific kernel settings.
*
* @addtogroup config
* @details Kernel related settings and hooks.
* @{
*/
#ifndef _CHCONF_H_
#define _CHCONF_H_
/*===========================================================================*/
/**
* @name Kernel parameters and options
* @{
*/
/*===========================================================================*/
/**
* @brief System tick frequency.
* @details Frequency of the system timer that drives the system ticks. This
* setting also defines the system tick time unit.
*/
#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
#define CH_FREQUENCY 1000
#endif
/**
* @brief Round robin interval.
* @details This constant is the number of system ticks allowed for the
* threads before preemption occurs. Setting this value to zero
* disables the preemption for threads with equal priority and the
* round robin becomes cooperative. Note that higher priority
* threads can still preempt, the kernel is always preemptive.
*
* @note Disabling the round robin preemption makes the kernel more compact
* and generally faster.
*/
#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
#define CH_TIME_QUANTUM 20
#endif
/**
* @brief Managed RAM size.
* @details Size of the RAM area to be managed by the OS. If set to zero
* then the whole available RAM is used. The core memory is made
* available to the heap allocator and/or can be used directly through
* the simplified core memory allocator.
*
* @note In order to let the OS manage the whole RAM the linker script must
* provide the @p __heap_base__ and @p __heap_end__ symbols.
* @note Requires @p CH_USE_MEMCORE.
*/
#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
#define CH_MEMCORE_SIZE 0
#endif
/**
* @brief Idle thread automatic spawn suppression.
* @details When this option is activated the function @p chSysInit()
* does not spawn the idle thread automatically. The application has
* then the responsibility to do one of the following:
* - Spawn a custom idle thread at priority @p IDLEPRIO.
* - Change the main() thread priority to @p IDLEPRIO then enter
* an endless loop. In this scenario the @p main() thread acts as
* the idle thread.
* .
* @note Unless an idle thread is spawned the @p main() thread must not
* enter a sleep state.
*/
#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)
#define CH_NO_IDLE_THREAD FALSE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Performance options
* @{
*/
/*===========================================================================*/
/**
* @brief OS optimization.
* @details If enabled then time efficient rather than space efficient code
* is used when two possible implementations exist.
*
* @note This is not related to the compiler optimization options.
* @note The default is @p TRUE.
*/
#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
#define CH_OPTIMIZE_SPEED TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Subsystem options
* @{
*/
/*===========================================================================*/
/**
* @brief Threads registry APIs.
* @details If enabled then the registry APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
#define CH_USE_REGISTRY TRUE
#endif
/**
* @brief Threads synchronization APIs.
* @details If enabled then the @p chThdWait() function is included in
* the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
#define CH_USE_WAITEXIT TRUE
#endif
/**
* @brief Semaphores APIs.
* @details If enabled then the Semaphores APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES TRUE
#endif
/**
* @brief Semaphores queuing mode.
* @details If enabled then the threads are enqueued on semaphores by
* priority rather than in FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES_PRIORITY FALSE
#endif
/**
* @brief Atomic semaphore API.
* @details If enabled then the semaphores the @p chSemSignalWait() API
* is included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
#define CH_USE_SEMSW TRUE
#endif
/**
* @brief Mutexes APIs.
* @details If enabled then the mutexes APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
#define CH_USE_MUTEXES TRUE
#endif
/**
* @brief Conditional Variables APIs.
* @details If enabled then the conditional variables APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MUTEXES.
*/
#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS TRUE
#endif
/**
* @brief Conditional Variables APIs with timeout.
* @details If enabled then the conditional variables APIs with timeout
* specification are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_CONDVARS.
*/
#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS_TIMEOUT TRUE
#endif
/**
* @brief Events Flags APIs.
* @details If enabled then the event flags APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
#define CH_USE_EVENTS TRUE
#endif
/**
* @brief Events Flags APIs with timeout.
* @details If enabled then the events APIs with timeout specification
* are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_EVENTS.
*/
#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_EVENTS_TIMEOUT TRUE
#endif
/**
* @brief Synchronous Messages APIs.
* @details If enabled then the synchronous messages APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES TRUE
#endif
/**
* @brief Synchronous Messages queuing mode.
* @details If enabled then messages are served by priority rather than in
* FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_MESSAGES.
*/
#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES_PRIORITY FALSE
#endif
/**
* @brief Mailboxes APIs.
* @details If enabled then the asynchronous messages (mailboxes) APIs are
* included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
#define CH_USE_MAILBOXES TRUE
#endif
/**
* @brief I/O Queues APIs.
* @details If enabled then the I/O queues APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
#define CH_USE_QUEUES TRUE
#endif
/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
#define CH_USE_MEMCORE TRUE
#endif
/**
* @brief Heap Allocator APIs.
* @details If enabled then the memory heap allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or
* @p CH_USE_SEMAPHORES.
* @note Mutexes are recommended.
*/
#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
#define CH_USE_HEAP TRUE
#endif
/**
* @brief C-runtime allocator.
* @details If enabled the the heap allocator APIs just wrap the C-runtime
* @p malloc() and @p free() functions.
*
* @note The default is @p FALSE.
* @note Requires @p CH_USE_HEAP.
* @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the
* appropriate documentation.
*/
#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
#define CH_USE_MALLOC_HEAP FALSE
#endif
/**
* @brief Memory Pools Allocator APIs.
* @details If enabled then the memory pools allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
#define CH_USE_MEMPOOLS TRUE
#endif
/**
* @brief Dynamic Threads APIs.
* @details If enabled then the dynamic threads creation APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_WAITEXIT.
* @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
*/
#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
#define CH_USE_DYNAMIC TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Debug options
* @{
*/
/*===========================================================================*/
/**
* @brief Debug option, system state check.
* @details If enabled the correct call protocol for system APIs is checked
* at runtime.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
#endif
/**
* @brief Debug option, parameters checks.
* @details If enabled then the checks on the API functions input
* parameters are activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_CHECKS FALSE
#endif
/**
* @brief Debug option, consistency checks.
* @details If enabled then all the assertions in the kernel code are
* activated. This includes consistency checks inside the kernel,
* runtime anomalies and port-defined checks.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_ASSERTS FALSE
#endif
/**
* @brief Debug option, trace buffer.
* @details If enabled then the context switch circular trace buffer is
* activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_TRACE FALSE
#endif
/**
* @brief Debug option, stack checks.
* @details If enabled then a runtime stack check is performed.
*
* @note The default is @p FALSE.
* @note The stack check is performed in a architecture/port dependent way.
* It may not be implemented or some ports.
* @note The default failure mode is to halt the system with the global
* @p panic_msg variable set to @p NULL.
*/
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_STACK_CHECK FALSE
#endif
/**
* @brief Debug option, stacks initialization.
* @details If enabled then the threads working area is filled with a byte
* value when a thread is created. This can be useful for the
* runtime measurement of the used stack.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
#define CH_DBG_FILL_THREADS FALSE
#endif
/**
* @brief Debug option, threads profiling.
* @details If enabled then a field is added to the @p Thread structure that
* counts the system ticks occurred while executing the thread.
*
* @note The default is @p TRUE.
* @note This debug option is defaulted to TRUE because it is required by
* some test cases into the test suite.
*/
#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
#define CH_DBG_THREADS_PROFILING TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Kernel hooks
* @{
*/
/*===========================================================================*/
/**
* @brief Threads descriptor structure extension.
* @details User fields added to the end of the @p Thread structure.
*/
#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
#define THREAD_EXT_FIELDS \
/* Add threads custom fields here.*/
#endif
/**
* @brief Threads initialization hook.
* @details User initialization code added to the @p chThdInit() API.
*
* @note It is invoked from within @p chThdInit() and implicitily from all
* the threads creation APIs.
*/
#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_INIT_HOOK(tp) { \
/* Add threads initialization code here.*/ \
}
#endif
/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
*
* @note It is inserted into lock zone.
* @note It is also invoked when the threads simply return in order to
* terminate.
*/
#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_EXIT_HOOK(tp) { \
/* Add threads finalization code here.*/ \
}
#endif
/**
* @brief Context switch hook.
* @details This hook is invoked just before switching between threads.
*/
#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)
#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \
/* System halt code here.*/ \
}
#endif
/**
* @brief Idle Loop hook.
* @details This hook is continuously invoked by the idle thread loop.
*/
#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
#define IDLE_LOOP_HOOK() { \
/* Idle loop code here.*/ \
}
#endif
/**
* @brief System tick event hook.
* @details This hook is invoked in the system tick handler immediately
* after processing the virtual timers queue.
*/
#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_TICK_EVENT_HOOK() { \
/* System tick event code here.*/ \
}
#endif
/**
* @brief System halt hook.
* @details This hook is invoked in case to a system halting error before
* the system is halted.
*/
#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_HALT_HOOK() { \
/* System halt code here.*/ \
}
#endif
/** @} */
/*===========================================================================*/
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
#endif /* _CHCONF_H_ */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/halconf.h
* @brief HAL configuration header.
* @details HAL configuration file, this file allows to enable or disable the
* various device drivers from your application. You may also use
* this file in order to override the device drivers default settings.
*
* @addtogroup HAL_CONF
* @{
*/
#ifndef _HALCONF_H_
#define _HALCONF_H_
#include "mcuconf.h"
/**
* @brief Enables the PAL subsystem.
*/
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
#define HAL_USE_PAL TRUE
#endif
/**
* @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
#define HAL_USE_ADC TRUE
#endif
/**
* @brief Enables the CAN subsystem.
*/
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
#define HAL_USE_GPT FALSE
#endif
/**
* @brief Enables the I2C subsystem.
*/
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
#define HAL_USE_I2C FALSE
#endif
/**
* @brief Enables the ICU subsystem.
*/
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
#define HAL_USE_ICU FALSE
#endif
/**
* @brief Enables the MAC subsystem.
*/
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
#define HAL_USE_MAC FALSE
#endif
/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define HAL_USE_MMC_SPI FALSE
#endif
/**
* @brief Enables the PWM subsystem.
*/
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
#define HAL_USE_PWM TRUE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
#define HAL_USE_SDC FALSE
#endif
/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL TRUE
#endif
/**
* @brief Enables the SERIAL over USB subsystem.
*/
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL_USB FALSE
#endif
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
#define HAL_USE_SPI TRUE
#endif
/**
* @brief Enables the UART subsystem.
*/
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
#define HAL_USE_UART FALSE
#endif
/**
* @brief Enables the USB subsystem.
*/
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
#define HAL_USE_USB FALSE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
#define ADC_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define ADC_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/
/**
* @brief Sleep mode related APIs inclusion switch.
*/
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
#define CAN_USE_SLEEP_MODE TRUE
#endif
/*===========================================================================*/
/* I2C driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the mutual exclusion APIs on the I2C bus.
*/
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define I2C_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Block size for MMC transfers.
*/
#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__)
#define MMC_SECTOR_SIZE 512
#endif
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
* This option is recommended also if the SPI driver does not
* use a DMA channel and heavily loads the CPU.
*/
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
#define MMC_NICE_WAITING TRUE
#endif
/**
* @brief Number of positive insertion queries before generating the
* insertion event.
*/
#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__)
#define MMC_POLLING_INTERVAL 10
#endif
/**
* @brief Interval, in milliseconds, between insertion queries.
*/
#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__)
#define MMC_POLLING_DELAY 10
#endif
/**
* @brief Uses the SPI polled API for small data transfers.
* @details Polled transfers usually improve performance because it
* saves two context switches and interrupt servicing. Note
* that this option has no effect on large transfers which
* are always performed using DMAs/IRQs.
*/
#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__)
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
*/
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
#define SDC_INIT_RETRY 100
#endif
/**
* @brief Include support for MMC cards.
* @note MMC support is not yet implemented so this option must be kept
* at @p FALSE.
*/
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
#define SDC_MMC_SUPPORT FALSE
#endif
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
*/
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
#define SDC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
/**
* @brief Default bit rate.
* @details Configuration parameter, this is the baud rate selected for the
* default configuration.
*/
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
#define SERIAL_DEFAULT_BITRATE 38400
#endif
/**
* @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application.
* @note The default is 64 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 16
#endif
/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
#define SPI_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
#endif /* _HALCONF_H_ */
/** @} */

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<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\ch.ewp</path>
</project>
<batchBuild/>
</workspace>

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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x400;
/**** End of ICF editor section. ###ICF###*/
/* Size of the IRQ Stack (Main Stack).*/
define symbol __ICFEDIT_size_irqstack__ = 0x400;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ {section CSTACK};
define block IRQSTACK with alignment = 8, size = __ICFEDIT_size_irqstack__ {};
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ {};
define block SYSHEAP with alignment = 8 {section SYSHEAP};
define block DATABSS with alignment = 8 {readwrite, zeroinit};
initialize by copy { readwrite };
do not initialize { section .noinit };
keep { section .intvec };
place at address mem:__ICFEDIT_intvec_start__ {section .intvec};
place in ROM_region {readonly};
place at start of RAM_region {block IRQSTACK};
place in RAM_region {block DATABSS, block HEAP};
place in RAM_region {block SYSHEAP};
place at end of RAM_region {block CSTACK};

980
demos/ARMCM4-STM32F407-DISCOVERY/keil/ch.uvproj Normal file
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@ -0,0 +1,980 @@
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<Header>### uVision Project, (C) Keil Software</Header>
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<FilePath>..\..\..\os\kernel\include\chregistry.h</FilePath>
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<File>
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<FileType>5</FileType>
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<FilePath>..\..\..\os\kernel\include\chsem.h</FilePath>
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<Group>
<GroupName>hal</GroupName>
<Files>
<File>
<FileName>adc.c</FileName>
<FileType>1</FileType>
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<File>
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<File>
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<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\pwm.c</FilePath>
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<File>
<FileName>serial.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\serial.c</FilePath>
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<File>
<FileName>spi.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\src\spi.c</FilePath>
</File>
<File>
<FileName>adc.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\adc.h</FilePath>
</File>
<File>
<FileName>hal.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\hal.h</FilePath>
</File>
<File>
<FileName>pal.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\pal.h</FilePath>
</File>
<File>
<FileName>pwm.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\pwm.h</FilePath>
</File>
<File>
<FileName>serial.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\serial.h</FilePath>
</File>
<File>
<FileName>spi.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\include\spi.h</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>platform</GroupName>
<Files>
<File>
<FileName>adc_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F4xx\adc_lld.c</FilePath>
</File>
<File>
<FileName>adc_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F4xx\adc_lld.h</FilePath>
</File>
<File>
<FileName>hal_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F4xx\hal_lld.c</FilePath>
</File>
<File>
<FileName>hal_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F4xx\hal_lld.h</FilePath>
</File>
<File>
<FileName>pal_lld.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.c</FilePath>
</File>
<File>
<FileName>pal_lld.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.h</FilePath>
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<File>
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<File>
<FileName>pwm_lld.h</FileName>
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<File>
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<FileName>stm32_dma.h</FileName>
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<FilePath>..\..\..\os\hal\platforms\STM32F4xx\stm32_dma.h</FilePath>
</File>
<File>
<FileName>stm32_rcc.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F4xx\stm32_rcc.h</FilePath>
</File>
<File>
<FileName>stm32l1xx.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\os\hal\platforms\STM32F4xx\stm32l1xx.h</FilePath>
</File>
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</Group>
<Group>
<GroupName>test</GroupName>
<Files>
<File>
<FileName>test.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\test.c</FilePath>
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<File>
<FileName>testbmk.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testbmk.c</FilePath>
</File>
<File>
<FileName>testdyn.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testdyn.c</FilePath>
</File>
<File>
<FileName>testevt.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testevt.c</FilePath>
</File>
<File>
<FileName>testheap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testheap.c</FilePath>
</File>
<File>
<FileName>testmbox.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testmbox.c</FilePath>
</File>
<File>
<FileName>testmsg.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testmsg.c</FilePath>
</File>
<File>
<FileName>testmtx.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testmtx.c</FilePath>
</File>
<File>
<FileName>testpools.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testpools.c</FilePath>
</File>
<File>
<FileName>testqueues.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testqueues.c</FilePath>
</File>
<File>
<FileName>testsem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testsem.c</FilePath>
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<File>
<FileName>testthd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\test\testthd.c</FilePath>
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<FileName>test.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\test.h</FilePath>
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<FileName>testbmk.h</FileName>
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<FilePath>..\..\..\test\testbmk.h</FilePath>
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<FilePath>..\..\..\test\testdyn.h</FilePath>
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<FileName>testevt.h</FileName>
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<FilePath>..\..\..\test\testmsg.h</FilePath>
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<FileName>testmtx.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\testmtx.h</FilePath>
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<File>
<FileName>testpools.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\testpools.h</FilePath>
</File>
<File>
<FileName>testqueues.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\testqueues.h</FilePath>
</File>
<File>
<FileName>testsem.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\testsem.h</FilePath>
</File>
<File>
<FileName>testthd.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\..\test\testthd.h</FilePath>
</File>
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<Group>
<GroupName>demo</GroupName>
<Files>
<File>
<FileName>main.c</FileName>
<FileType>1</FileType>
<FilePath>..\main.c</FilePath>
</File>
<File>
<FileName>mcuconf.h</FileName>
<FileType>5</FileType>
<FilePath>..\mcuconf.h</FilePath>
</File>
<File>
<FileName>chconf.h</FileName>
<FileType>5</FileType>
<FilePath>..\chconf.h</FilePath>
</File>
<File>
<FileName>halconf.h</FileName>
<FileType>5</FileType>
<FilePath>..\halconf.h</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
</Project>

248
demos/ARMCM4-STM32F407-DISCOVERY/main.c Normal file
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "ch.h"
#include "hal.h"
#include "test.h"
static void pwmpcb(PWMDriver *pwmp);
static void adccb(ADCDriver *adcp, adcsample_t *buffer, size_t n);
static void spicb(SPIDriver *spip);
/* Total number of channels to be sampled by a single ADC operation.*/
#define ADC_GRP1_NUM_CHANNELS 2
/* Depth of the conversion buffer, channels are sampled four times each.*/
#define ADC_GRP1_BUF_DEPTH 4
/*
* ADC samples buffer.
*/
static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
/*
* ADC conversion group.
* Mode: Linear buffer, 4 samples of 2 channels, SW triggered.
* Channels: IN11 (48 cycles sample time)
* Sensor (192 cycles sample time)
*/
static const ADCConversionGroup adcgrpcfg = {
FALSE,
ADC_GRP1_NUM_CHANNELS,
adccb,
NULL,
/* HW dependent part.*/
0,
ADC_CR2_SWSTART,
ADC_SMPR1_SMP_AN11(ADC_SAMPLE_56) | ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_144),
0,
ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS),
0,
ADC_SQR3_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ1_N(ADC_CHANNEL_SENSOR)
};
/*
* PWM configuration structure.
* Cyclic callback enabled, channels 1 and 4 enabled without callbacks,
* the active state is a logic one.
*/
static PWMConfig pwmcfg = {
10000, /* 10KHz PWM clock frequency. */
10000, /* PWM period 1S (in ticks). */
pwmpcb,
{
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
{PWM_OUTPUT_DISABLED, NULL},
{PWM_OUTPUT_DISABLED, NULL},
{PWM_OUTPUT_ACTIVE_HIGH, NULL}
},
/* HW dependent part.*/
0
};
/*
* SPI configuration structure.
* Maximum speed (12MHz), CPHA=0, CPOL=0, 16bits frames, MSb transmitted first.
* The slave select line is the pin GPIOA_SPI1NSS on the port GPIOA.
*/
static const SPIConfig spicfg = {
spicb,
/* HW dependent part.*/
GPIOB,
12,
SPI_CR1_DFF
};
/*
* PWM cyclic callback.
* A new ADC conversion is started.
*/
static void pwmpcb(PWMDriver *pwmp) {
(void)pwmp;
/* Starts an asynchronous ADC conversion operation, the conversion
will be executed in parallel to the current PWM cycle and will
terminate before the next PWM cycle.*/
chSysLockFromIsr();
adcStartConversionI(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH);
chSysUnlockFromIsr();
}
/*
* ADC end conversion callback.
* The PWM channels are reprogrammed using the latest ADC samples.
* The latest samples are transmitted into a single SPI transaction.
*/
void adccb(ADCDriver *adcp, adcsample_t *buffer, size_t n) {
(void) buffer; (void) n;
/* Note, only in the ADC_COMPLETE state because the ADC driver fires an
intermediate callback when the buffer is half full.*/
if (adcp->state == ADC_COMPLETE) {
adcsample_t avg_ch1, avg_ch2;
/* Calculates the average values from the ADC samples.*/
avg_ch1 = (samples[0] + samples[2] + samples[4] + samples[6]) / 4;
avg_ch2 = (samples[1] + samples[3] + samples[5] + samples[7]) / 4;
chSysLockFromIsr();
/* Changes the channels pulse width, the change will be effective
starting from the next cycle.*/
pwmEnableChannelI(&PWMD4, 0, PWM_FRACTION_TO_WIDTH(&PWMD4, 4096, avg_ch1));
pwmEnableChannelI(&PWMD4, 3, PWM_FRACTION_TO_WIDTH(&PWMD4, 4096, avg_ch2));
/* SPI slave selection and transmission start.*/
spiSelectI(&SPID2);
spiStartSendI(&SPID2, ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH, samples);
chSysUnlockFromIsr();
}
}
/*
* SPI end transfer callback.
*/
static void spicb(SPIDriver *spip) {
/* On transfer end just releases the slave select line.*/
chSysLockFromIsr();
spiUnselectI(spip);
chSysUnlockFromIsr();
}
/*
* This is a periodic thread that does absolutely nothing except flashing
* a LED.
*/
static WORKING_AREA(waThread1, 128);
static msg_t Thread1(void *arg) {
(void)arg;
chRegSetThreadName("blinker");
while (TRUE) {
palSetPad(GPIOD, GPIOD_LED3); /* Orange. */
chThdSleepMilliseconds(500);
palClearPad(GPIOD, GPIOD_LED3); /* Orange. */
chThdSleepMilliseconds(500);
}
}
/*
* Application entry point.
*/
int main(void) {
/*
* System initializations.
* - HAL initialization, this also initializes the configured device drivers
* and performs the board-specific initializations.
* - Kernel initialization, the main() function becomes a thread and the
* RTOS is active.
*/
halInit();
chSysInit();
/*
* Activates the serial driver 2 using the driver default configuration.
* PA2(TX) and PA3(RX) are routed to USART2.
*/
sdStart(&SD2, NULL);
palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7));
palSetPadMode(GPIOA, 3, PAL_MODE_ALTERNATE(7));
/*
* If the user button is pressed after the reset then the test suite is
* executed immediately before activating the various device drivers in
* order to not alter the benchmark scores.
*/
if (palReadPad(GPIOA, GPIOA_BUTTON))
TestThread(&SD2);
/*
* Initializes the SPI driver 2. The SPI2 signals are routed as follow:
* PB12 - NSS.
* PB13 - SCK.
* PB14 - MISO.
* PB15 - MOSI.
*/
spiStart(&SPID2, &spicfg);
palSetPad(GPIOB, 12);
palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST); /* NSS. */
palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) |
PAL_STM32_OSPEED_HIGHEST); /* SCK. */
palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5)); /* MISO. */
palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) |
PAL_STM32_OSPEED_HIGHEST); /* MOSI. */
/*
* Initializes the ADC driver 1 and enable the thermal sensor.
* The pin PC0 on the port GPIOC is programmed as analog input.
*/
adcStart(&ADCD1, NULL);
adcSTM32EnableTSVREFE();
palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG);
/*
* Initializes the PWM driver 4, routes the TIM4 outputs to the board LEDs.
*/
pwmStart(&PWMD4, &pwmcfg);
palSetPadMode(GPIOD, GPIOD_LED4, PAL_MODE_ALTERNATE(2)); /* Green. */
palSetPadMode(GPIOD, GPIOD_LED6, PAL_MODE_ALTERNATE(2)); /* Blue. */
/*
* Creates the example thread.
*/
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
/*
* Normal main() thread activity, in this demo it does nothing except
* sleeping in a loop and check the button state, when the button is
* pressed the test procedure is launched with output on the serial
* driver 2.
*/
while (TRUE) {
if (palReadPad(GPIOA, GPIOA_BUTTON))
TestThread(&SD2);
chThdSleepMilliseconds(500);
}
}

206
demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h Normal file
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* STM32F4xx drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the whole
* driver is enabled in halconf.h.
*
* IRQ priorities:
* 15...0 Lowest...Highest.
*
* DMA priorities:
* 0...3 Lowest...Highest.
*/
/*
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_HIGH
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
#define STM32_LSE_ENABLED FALSE
#define STM32_CLOCK48_REQUIRED TRUE
#define STM32_SW STM32_SW_PLL
#define STM32_PLLSRC STM32_PLLSRC_HSE
#define STM32_PLLM_VALUE 8
#define STM32_PLLN_VALUE 336
#define STM32_PLLP_VALUE 2
#define STM32_PLLQ_VALUE 7
#define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE1 STM32_PPRE1_DIV4
#define STM32_PPRE2 STM32_PPRE2_DIV2
#define STM32_RTCSEL STM32_RTCSEL_LSI
#define STM32_RTCPRE_VALUE 8
#define STM32_MCO1SEL STM32_MCO1SEL_HSI
#define STM32_MCO1PRE STM32_MCO1PRE_DIV1
#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
#define STM32_I2SSRC STM32_I2CSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
/*
* ADC driver system settings.
*/
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_USE_ADC2 TRUE
#define STM32_ADC_USE_ADC3 TRUE
#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC2_DMA_PRIORITY 2
#define STM32_ADC_ADC3_DMA_PRIORITY 2
#define STM32_ADC_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5
#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5
/*
* CAN driver system settings.
*/
#define STM32_CAN_USE_CAN1 TRUE
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
* EXT driver system settings.
*/
#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
#define STM32_GPT_USE_TIM2 FALSE
#define STM32_GPT_USE_TIM3 FALSE
#define STM32_GPT_USE_TIM4 FALSE
#define STM32_GPT_USE_TIM5 FALSE
#define STM32_GPT_USE_TIM8 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
/*
* ICU driver system settings.
*/
#define STM32_ICU_USE_TIM1 FALSE
#define STM32_ICU_USE_TIM2 FALSE
#define STM32_ICU_USE_TIM3 FALSE
#define STM32_ICU_USE_TIM4 TRUE
#define STM32_ICU_USE_TIM5 FALSE
#define STM32_ICU_USE_TIM8 FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
/*
* PWM driver system settings.
*/
#define STM32_PWM_USE_ADVANCED FALSE
#define STM32_PWM_USE_TIM1 FALSE
#define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 TRUE
#define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_USE_TIM8 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
/*
* SERIAL driver system settings.
*/
#define STM32_SERIAL_USE_USART1 FALSE
#define STM32_SERIAL_USE_USART2 TRUE
#define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_USART6_PRIORITY 12
/*
* SPI driver system settings.
*/
#define STM32_SPI_USE_SPI1 FALSE
#define STM32_SPI_USE_SPI2 TRUE
#define STM32_SPI_USE_SPI3 FALSE
#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
#define STM32_SPI_SPI1_DMA_PRIORITY 1
#define STM32_SPI_SPI2_DMA_PRIORITY 1
#define STM32_SPI_SPI3_DMA_PRIORITY 1
#define STM32_SPI_SPI1_IRQ_PRIORITY 10
#define STM32_SPI_SPI2_IRQ_PRIORITY 10
#define STM32_SPI_SPI3_IRQ_PRIORITY 10
#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt()
/*
* UART driver system settings.
*/
#define STM32_UART_USE_USART1 FALSE
#define STM32_UART_USE_USART2 TRUE
#define STM32_UART_USE_USART3 FALSE
#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_UART_USART1_IRQ_PRIORITY 12
#define STM32_UART_USART2_IRQ_PRIORITY 12
#define STM32_UART_USART3_IRQ_PRIORITY 12
#define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0
#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()

31
demos/ARMCM4-STM32F407-DISCOVERY/readme.txt Normal file
View File

@ -0,0 +1,31 @@
*****************************************************************************
** ChibiOS/RT port for ARM-Cortex-M3 STM32F100xB. **
*****************************************************************************
** TARGET **
The demo runs on an ST STM32F4-Discovery board.
** The Demo **
The demo shows how to use the ADC, PWM and SPI drivers using asynchronous
APIs. The ADC samples two channels (temperature sensor and PC1) and modulates
the PWM using the sampled values. The sample data is also transmitted using
the SPI port 2 (NSS=PB12, SCK=PB13, MISO=PB14, MOSI=PB15).
By pressing the button located on the board the test procedure is activated
with output on the serial port SD2 (USART2).
** Build Procedure **
The demo has been tested by using the free Codesourcery GCC-based toolchain
and YAGARTO. just modify the TRGT line in the makefile in order to use
different GCC toolchains.
** Notes **
Some files used by the demo are not part of ChibiOS/RT but are copyright of
ST Microelectronics and are licensed under a different license.
Also note that not all the files present in the ST library are distribited
with ChibiOS/RT, you can find the whole library on the ST web site:
http://www.st.com

36
demos/AVR-AT90CANx-GCC/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the PAL subsystem.
*/
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
#define HAL_USE_PAL FALSE
#define HAL_USE_PAL TRUE
#endif
/**
@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

32
demos/AVR-AT90CANx-GCC/main.c
View File

@ -20,34 +20,22 @@
#include "ch.h"
#include "hal.h"
#include "evtimer.h"
#include "test.h"
static WORKING_AREA(waThread1, 32);
static msg_t Thread1(void *arg) {
while (TRUE) {
PORTE ^= PORTE_LED;
chThdSleepMilliseconds(500);
palTogglePad(IOPORT5, PORTE_LED);
chThdSleepMilliseconds(500);
}
return 0;
}
static void TimerHandler(eventid_t id) {
msg_t TestThread(void *p);
if (!(PORTE & PORTE_BUTTON))
TestThread(&SD2);
}
/*
* Application entry point.
*/
int main(void) {
static EvTimer evt;
static evhandler_t handlers[1] = {
TimerHandler
};
static EventListener el0;
/*
* System initializations.
@ -64,20 +52,16 @@ int main(void) {
*/
sdStart(&SD2, NULL);
/*
* Event Timer initialization.
*/
evtInit(&evt, MS2ST(500)); /* Initializes an event timer object. */
evtStart(&evt); /* Starts the event timer. */
chEvtRegister(&evt.et_es, &el0, 0); /* Registers on the timer event source. */
/*
* Starts the LED blinker thread.
*/
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
while(TRUE)
chEvtDispatch(handlers, chEvtWaitOne(ALL_EVENTS));
while(TRUE) {
if (!palReadPad(IOPORT5, PORTE_BUTTON))
TestThread(&SD2);
chThdSleepMilliseconds(500);
}
return 0;
}

36
demos/AVR-ATmega128-GCC/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the PAL subsystem.
*/
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
#define HAL_USE_PAL FALSE
#define HAL_USE_PAL TRUE
#endif
/**
@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

26
demos/AVR-ATmega128-GCC/lcd.c
View File

@ -25,10 +25,10 @@
static void e_pulse(void) {
volatile uint8_t i;
PORTC |= PORTC_44780_E;
PORTC |= PORTC_44780_E_MASK;
for (i = 0; i < ELOOPVALUE; i++);
;
PORTC &= ~PORTC_44780_E;
PORTC &= ~PORTC_44780_E_MASK;
}
static void wait_not_busy(void) {
@ -41,8 +41,9 @@ static void wait_not_busy(void) {
*/
void lcdInit(void) {
PORTC = (PORTC & ~(PORTC_44780_DATA | PORTC_44780_RS | PORTC_44780_E | PORTC_44780_RW)) |
(LCD_CMD_INIT8 & PORTC_44780_DATA);
PORTC = (PORTC & ~(PORTC_44780_DATA_MASK | PORTC_44780_RS_MASK |
PORTC_44780_E_MASK | PORTC_44780_RW_MASK)) |
(LCD_CMD_INIT8 & PORTC_44780_DATA_MASK);
chThdSleep(50);
e_pulse();
chThdSleep(10);
@ -50,8 +51,9 @@ void lcdInit(void) {
chThdSleep(2);
e_pulse();
wait_not_busy();
PORTC = (PORTC & ~(PORTC_44780_DATA | PORTC_44780_RS | PORTC_44780_E | PORTC_44780_RW)) |
(LCD_CMD_INIT4 & PORTC_44780_DATA);
PORTC = (PORTC & ~(PORTC_44780_DATA_MASK | PORTC_44780_RS_MASK |
PORTC_44780_E_MASK | PORTC_44780_RW_MASK)) |
(LCD_CMD_INIT4 & PORTC_44780_DATA_MASK);
e_pulse();
lcdCmd(LCD_CMD_INIT4);
lcdCmd(LCD_SET_DM | LCD_DM_DISPLAY_ON);
@ -64,9 +66,11 @@ void lcdInit(void) {
void lcdCmd(uint8_t cmd) {
wait_not_busy();
PORTC = (PORTC | PORTC_44780_DATA) & (cmd | (0x0F & ~PORTC_44780_RS));
PORTC = (PORTC | PORTC_44780_DATA_MASK) & (cmd |
(0x0F & ~PORTC_44780_RS_MASK));
e_pulse();
PORTC = (PORTC | PORTC_44780_DATA) & ((cmd << 4) | (0x0F & ~PORTC_44780_RS));
PORTC = (PORTC | PORTC_44780_DATA_MASK) & ((cmd << 4) |
(0x0F & ~PORTC_44780_RS_MASK));
e_pulse();
}
@ -78,9 +82,11 @@ void lcdPutc(char c) {
wait_not_busy();
b = c | 0x0F;
PORTC = (PORTC | PORTC_44780_DATA | PORTC_44780_RS) & (c | 0x0F);
PORTC = (PORTC | PORTC_44780_DATA_MASK | PORTC_44780_RS_MASK) &
(c | 0x0F);
e_pulse();
PORTC = (PORTC | PORTC_44780_DATA | PORTC_44780_RS) & ((c << 4) | 0x0F);
PORTC = (PORTC | PORTC_44780_DATA_MASK | PORTC_44780_RS_MASK) &
((c << 4) | 0x0F);
e_pulse();
}

34
demos/AVR-ATmega128-GCC/main.c
View File

@ -20,7 +20,7 @@
#include "ch.h"
#include "hal.h"
#include "evtimer.h"
#include "test.h"
#include "lcd.h"
@ -28,29 +28,17 @@ static WORKING_AREA(waThread1, 32);
static msg_t Thread1(void *arg) {
while (TRUE) {
if (!(PINA & PORTA_BUTTON2))
PORTA ^= PORTA_RELAY;
if (!palReadPad(IOPORT1, PORTA_BUTTON2))
palTogglePad(IOPORT1, PORTA_RELAY);
chThdSleepMilliseconds(1000);
}
return 0;
}
static void TimerHandler(eventid_t id) {
msg_t TestThread(void *p);
if (!(PINA & PORTA_BUTTON1))
TestThread(&SD2);
}
/*
* Application entry point.
*/
int main(void) {
static EvTimer evt;
static evhandler_t handlers[1] = {
TimerHandler
};
static EventListener el0;
/*
* System initializations.
@ -76,20 +64,14 @@ int main(void) {
lcdPuts(LCD_LINE1, " ChibiOS/RT ");
lcdPuts(LCD_LINE2, " Hello World! ");
/*
* Event Timer initialization.
*/
evtInit(&evt, MS2ST(500)); /* Initializes an event timer object. */
evtStart(&evt); /* Starts the event timer. */
chEvtRegister(&evt.et_es, &el0, 0); /* Registers on the timer event source. */
/*
* Starts the LED blinker thread.
*/
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
while(TRUE)
chEvtDispatch(handlers, chEvtWaitOne(ALL_EVENTS));
return 0;
while(TRUE) {
if (!palReadPad(IOPORT1, PORTA_BUTTON1))
TestThread(&SD2);
chThdSleepMilliseconds(500);
}
}

5
demos/MSP430-MSP430x1611-GCC/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti

34
demos/MSP430-MSP430x1611-GCC/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

5
demos/PPC-SPC563-GCC/Makefile
View File

@ -8,6 +8,11 @@ ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti

34
demos/PPC-SPC563-GCC/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

18
demos/PPC-SPC563-GCC/main.c
View File

@ -44,23 +44,7 @@ static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) {
}
static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) {
static const char *states[] = {
"READY",
"CURRENT",
"SUSPENDED",
"WTSEM",
"WTMTX",
"WTCOND",
"SLEEPING",
"WTEXIT",
"WTOREVT",
"WTANDEVT",
"SNDMSGQ",
"SNDMSG",
"WTMSG",
"WTQUEUE",
"FINAL"
};
static const char *states[] = {THD_STATE_NAMES};
Thread *tp;
(void)argv;

34
demos/Posix-GCC/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

18
demos/Posix-GCC/main.c
View File

@ -51,23 +51,7 @@ static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) {
}
static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) {
static const char *states[] = {
"READY",
"CURRENT",
"SUSPENDED",
"WTSEM",
"WTMTX",
"WTCOND",
"SLEEPING",
"WTEXIT",
"WTOREVT",
"WTANDEVT",
"SNDMSGQ",
"SNDMSG",
"WTMSG",
"WTQUEUE",
"FINAL"
};
static const char *states[] = {THD_STATE_NAMES};
Thread *tp;
(void)argv;

34
demos/STM8L-STM8L152-DISCOVERY-STVD/demo/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

34
demos/STM8S-STM8S105-DISCOVERY-STVD/demo/halconf.h
View File

@ -55,6 +55,13 @@
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
@ -97,6 +104,13 @@
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
@ -185,6 +199,13 @@
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
@ -234,17 +255,10 @@
#define MMC_USE_SPI_POLLING TRUE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intevals.
@ -316,10 +330,6 @@
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
#endif /* _HALCONF_H_ */
/** @} */

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