Fixed bug #654.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8439 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
parent
6750ea8406
commit
4d059c02e9
|
@ -56,9 +56,14 @@
|
|||
*/
|
||||
void nvicEnableVector(uint32_t n, uint32_t prio) {
|
||||
|
||||
NVIC->IP[n] = NVIC_PRIORITY_MASK(prio);
|
||||
NVIC->ICPR[n >> 5] = 1 << (n & 0x1F);
|
||||
NVIC->ISER[n >> 5] = 1 << (n & 0x1F);
|
||||
#if defined(__CORE_CM0_H_GENERIC)
|
||||
NVIC->IP[_IP_IDX(n)] = (NVIC->IP[_IP_IDX(n)] & ~(0xFFU << _BIT_SHIFT(n))) |
|
||||
(NVIC_PRIORITY_MASK(prio) << _BIT_SHIFT(n));
|
||||
#else
|
||||
NVIC->IP[n] = NVIC_PRIORITY_MASK(prio);
|
||||
#endif
|
||||
NVIC->ICPR[n >> 5U] = 1U << (n & 0x1FU);
|
||||
NVIC->ISER[n >> 5U] = 1U << (n & 0x1FU);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -68,8 +73,12 @@ void nvicEnableVector(uint32_t n, uint32_t prio) {
|
|||
*/
|
||||
void nvicDisableVector(uint32_t n) {
|
||||
|
||||
NVIC->ICER[n >> 5] = 1 << (n & 0x1F);
|
||||
NVIC->IP[n] = 0;
|
||||
NVIC->ICER[n >> 5U] = 1U << (n & 0x1FU);
|
||||
#if defined(__CORE_CM0_H_GENERIC)
|
||||
NVIC->IP[_IP_IDX(n)] = NVIC->IP[_IP_IDX(n)] & ~(0xFFU << _BIT_SHIFT(n));
|
||||
#else
|
||||
NVIC->IP[n] = 0U;
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -80,9 +89,12 @@ void nvicDisableVector(uint32_t n) {
|
|||
*/
|
||||
void nvicSetSystemHandlerPriority(uint32_t handler, uint32_t prio) {
|
||||
|
||||
osalDbgCheck(handler <= 12);
|
||||
osalDbgCheck(handler <= 12U);
|
||||
|
||||
#if defined(__CORE_CM7_H_GENERIC)
|
||||
#if defined(__CORE_CM0_H_GENERIC)
|
||||
SCB->SHP[_SHP_IDX(handler)] = (SCB->SHP[_SHP_IDX(handler)] & ~(0xFFU << _BIT_SHIFT(handler))) |
|
||||
(NVIC_PRIORITY_MASK(prio) << _BIT_SHIFT(handler));
|
||||
#elif defined(__CORE_CM7_H_GENERIC)
|
||||
SCB->SHPR[handler] = NVIC_PRIORITY_MASK(prio);
|
||||
#else
|
||||
SCB->SHP[handler] = NVIC_PRIORITY_MASK(prio);
|
||||
|
|
|
@ -66,7 +66,7 @@
|
|||
/**
|
||||
* @brief Priority level to priority mask conversion macro.
|
||||
*/
|
||||
#define NVIC_PRIORITY_MASK(prio) ((prio) << (8 - __NVIC_PRIO_BITS))
|
||||
#define NVIC_PRIORITY_MASK(prio) ((prio) << (8U - (unsigned)__NVIC_PRIO_BITS))
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
|
|
|
@ -141,6 +141,8 @@
|
|||
to 3.0.3 and 2.6.10).
|
||||
- HAL: Fixed wrong vector name for STM32F3xx EXTI33 (bug #655)(backported
|
||||
to 3.0.3 and 2.6.10).
|
||||
- HAL: Fixed nvicEnableVector broken for Cortex-M0 (bug #654)(backported
|
||||
to 3.0.3).
|
||||
- HAL: Fixed no demo for nucleo STM32F072RB board (bug #652).
|
||||
- HAL: Fixed missing RCC and ISR definitions for STM32F0xx timers (bug #651)
|
||||
(backported to 3.0.3 and 2.6.10).
|
||||
|
|
Loading…
Reference in New Issue