diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c
index 8039140a1..1b5d1c9f6 100644
--- a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c
+++ b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c
@@ -228,11 +228,9 @@ static uint8_t sd_out_buflp1[STM32_SERIAL_LPUART1_OUT_BUF_SIZE];
  *
  * @param[in] sdp       pointer to a @p SerialDriver object
  * @param[in] config    the architecture-dependent serial driver configuration
- * @param[in] clock      base clock for the USART
  */
 static void usart_init(SerialDriver *sdp,
-                       const SerialConfig *config,
-                       uint32_t clock) {
+                       const SerialConfig *config) {
   uint32_t brr;
   USART_TypeDef *u = sdp->usart;
 
@@ -250,7 +248,8 @@ static void usart_init(SerialDriver *sdp,
   else
 #endif
   {
-    brr = (uint32_t)((clock + config->speed/2) / config->speed);
+    brr = (uint32_t)((sdp->clock + config->speed / 2) /
+                     config->speed);
 
     /* Correcting BRR value when oversampling by 8 instead of 16.
        Fraction is still 4 bits wide, but only lower 3 bits used.
@@ -605,6 +604,7 @@ void sd_lld_init(void) {
   iqObjectInit(&SD1.iqueue, sd_in_buf1, sizeof sd_in_buf1, NULL, &SD1);
   oqObjectInit(&SD1.oqueue, sd_out_buf1, sizeof sd_out_buf1, notify1, &SD1);
   SD1.usart = USART1;
+  SD1.clock = STM32_USART1CLK;
 #if !defined(STM32_USART1_SUPPRESS_ISR) && defined(STM32_USART1_NUMBER)
   nvicEnableVector(STM32_USART1_NUMBER, STM32_SERIAL_USART1_PRIORITY);
 #endif
@@ -615,6 +615,7 @@ void sd_lld_init(void) {
   iqObjectInit(&SD2.iqueue, sd_in_buf2, sizeof sd_in_buf2, NULL, &SD2);
   oqObjectInit(&SD2.oqueue, sd_out_buf2, sizeof sd_out_buf2, notify2, &SD2);
   SD2.usart = USART2;
+  SD2.clock = STM32_USART2CLK;
 #if !defined(STM32_USART2_SUPPRESS_ISR) && defined(STM32_USART2_NUMBER)
   nvicEnableVector(STM32_USART2_NUMBER, STM32_SERIAL_USART2_PRIORITY);
 #endif
@@ -625,6 +626,7 @@ void sd_lld_init(void) {
   iqObjectInit(&SD3.iqueue, sd_in_buf3, sizeof sd_in_buf3, NULL, &SD3);
   oqObjectInit(&SD3.oqueue, sd_out_buf3, sizeof sd_out_buf3, notify3, &SD3);
   SD3.usart = USART3;
+  SD3.clock = STM32_USART3CLK;
 #if !defined(STM32_USART3_SUPPRESS_ISR) && defined(STM32_USART3_NUMBER)
   nvicEnableVector(STM32_USART3_NUMBER, STM32_SERIAL_USART3_PRIORITY);
 #endif
@@ -635,6 +637,7 @@ void sd_lld_init(void) {
   iqObjectInit(&SD4.iqueue, sd_in_buf4, sizeof sd_in_buf4, NULL, &SD4);
   oqObjectInit(&SD4.oqueue, sd_out_buf4, sizeof sd_out_buf4, notify4, &SD4);
   SD4.usart = UART4;
+  SD4.clock = STM32_UART4CLK;
 #if !defined(STM32_UART4_SUPPRESS_ISR) && defined(STM32_UART4_NUMBER)
   nvicEnableVector(STM32_UART4_NUMBER, STM32_SERIAL_UART4_PRIORITY);
 #endif
@@ -645,6 +648,7 @@ void sd_lld_init(void) {
   iqObjectInit(&SD5.iqueue, sd_in_buf5, sizeof sd_in_buf5, NULL, &SD5);
   oqObjectInit(&SD5.oqueue, sd_out_buf5, sizeof sd_out_buf5, notify5, &SD5);
   SD5.usart = UART5;
+  SD5.clock = STM32_UART5CLK;
 #if !defined(STM32_UART5_SUPPRESS_ISR) && defined(STM32_UART5_NUMBER)
   nvicEnableVector(STM32_UART5_NUMBER, STM32_SERIAL_UART5_PRIORITY);
 #endif
@@ -655,6 +659,7 @@ void sd_lld_init(void) {
   iqObjectInit(&SD6.iqueue, sd_in_buf6, sizeof sd_in_buf6, NULL, &SD6);
   oqObjectInit(&SD6.oqueue, sd_out_buf6, sizeof sd_out_buf6, notify6, &SD6);
   SD6.usart = USART6;
+  SD6.clock = STM32_USART6CLK;
 #if !defined(STM32_USART6_SUPPRESS_ISR) && defined(STM32_USART6_NUMBER)
   nvicEnableVector(STM32_USART6_NUMBER, STM32_SERIAL_USART6_PRIORITY);
 #endif
@@ -665,6 +670,7 @@ void sd_lld_init(void) {
   iqObjectInit(&SD7.iqueue, sd_in_buf7, sizeof sd_in_buf7, NULL, &SD7);
   oqObjectInit(&SD7.oqueue, sd_out_buf7, sizeof sd_out_buf7, notify7, &SD7);
   SD7.usart = UART7;
+  SD7.clock = STM32_UART7CLK;
 #if !defined(STM32_UART7_SUPPRESS_ISR) && defined(STM32_UART7_NUMBER)
   nvicEnableVector(STM32_UART7_NUMBER, STM32_SERIAL_UART7_PRIORITY);
 #endif
@@ -675,6 +681,7 @@ void sd_lld_init(void) {
   iqObjectInit(&SD8.iqueue, sd_in_buf8, sizeof sd_in_buf8, NULL, &SD8);
   oqObjectInit(&SD8.oqueue, sd_out_buf8, sizeof sd_out_buf8, notify8, &SD8);
   SD8.usart = UART8;
+  SD8.clock = STM32_UART8CLK;
 #if !defined(STM32_UART8_SUPPRESS_ISR) && defined(STM32_UART8_NUMBER)
   nvicEnableVector(STM32_UART8_NUMBER, STM32_SERIAL_UART8_PRIORITY);
 #endif
@@ -685,6 +692,7 @@ void sd_lld_init(void) {
   iqObjectInit(&LPSD1.iqueue, sd_in_buflp1, sizeof sd_in_buflp1, NULL, &LPSD1);
   oqObjectInit(&LPSD1.oqueue, sd_out_buflp1, sizeof sd_out_buflp1, notifylp1, &LPSD1);
   LPSD1.usart = LPUART1;
+  LPSD1.clock = STM32_LPUART1CLK;
 #if !defined(STM32_LPUART1_SUPPRESS_ISR) && defined(STM32_LPUART1_NUMBER)
   nvicEnableVector(STM32_LPUART1_NUMBER, STM32_SERIAL_LPUART1_PRIORITY);
 #endif
@@ -702,7 +710,6 @@ void sd_lld_init(void) {
  * @notapi
  */
 void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
-  uint32_t clock = 0U;
 
   if (config == NULL)
     config = &default_config;
@@ -710,60 +717,51 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
   if (sdp->state == SD_STOP) {
 #if STM32_SERIAL_USE_USART1
     if (&SD1 == sdp) {
-      clock = STM32_USART1CLK;
       rccEnableUSART1(true);
     }
 #endif
 #if STM32_SERIAL_USE_USART2
     if (&SD2 == sdp) {
-      clock = STM32_USART2CLK;
       rccEnableUSART2(true);
     }
 #endif
 #if STM32_SERIAL_USE_USART3
     if (&SD3 == sdp) {
-      clock = STM32_USART3CLK;
       rccEnableUSART3(true);
     }
 #endif
 #if STM32_SERIAL_USE_UART4
     if (&SD4 == sdp) {
-      clock = STM32_UART4CLK;
       rccEnableUART4(true);
     }
 #endif
 #if STM32_SERIAL_USE_UART5
     if (&SD5 == sdp) {
-      clock = STM32_UART5CLK;
       rccEnableUART5(true);
     }
 #endif
 #if STM32_SERIAL_USE_USART6
     if (&SD6 == sdp) {
-      clock = STM32_USART6CLK;
       rccEnableUSART6(true);
     }
 #endif
 #if STM32_SERIAL_USE_UART7
     if (&SD7 == sdp) {
-      clock = STM32_UART7CLK;
       rccEnableUART7(true);
     }
 #endif
 #if STM32_SERIAL_USE_UART8
     if (&SD8 == sdp) {
-      clock = STM32_UART8CLK;
       rccEnableUART8(true);
     }
 #endif
 #if STM32_SERIAL_USE_LPUART1
     if (&LPSD1 == sdp) {
-      clock = STM32_LPUART1CLK;
       rccEnableLPUART1(true);
     }
 #endif
   }
-  usart_init(sdp, config, clock);
+  usart_init(sdp, config);
 }
 
 /**
diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.h b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.h
index 03e851598..17c3401f8 100644
--- a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.h
+++ b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.h
@@ -542,6 +542,8 @@ typedef struct hal_serial_config {
   /* End of the mandatory fields.*/                                         \
   /* Pointer to the USART registers block.*/                                \
   USART_TypeDef             *usart;                                         \
+  /* Clock frequency for the associated USART/UART.*/                       \
+  uint32_t                  clock;                                          \
   /* Mask to be applied on received frames.*/                               \
   uint8_t                   rxmask;
 
diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_sio_lld.c b/os/hal/ports/STM32/LLD/USARTv2/hal_sio_lld.c
index 1b2702eac..fcc8543f8 100644
--- a/os/hal/ports/STM32/LLD/USARTv2/hal_sio_lld.c
+++ b/os/hal/ports/STM32/LLD/USARTv2/hal_sio_lld.c
@@ -185,14 +185,14 @@ __STATIC_INLINE void usart_enable_tx_end_irq(SIODriver *siop) {
  * @details This function must be invoked with interrupts disabled.
  *
  * @param[in] siop       pointer to a @p SIODriver object
- * @param[in] clock      base clock for the USART
  */
-__STATIC_INLINE void usart_init(SIODriver *siop, uint32_t clock) {
+__STATIC_INLINE void usart_init(SIODriver *siop) {
   USART_TypeDef *u = siop->usart;
-  uint32_t presc, brr;
+  uint32_t presc, brr, clock;
 
   /* Prescaler calculation.*/
   static const uint32_t prescvals[] = {1, 2, 4, 6, 8, 10, 12, 16, 32, 64, 128, 256};
+  clock = siop->clock;
   presc = prescvals[siop->config->presc];
 
  /* Baud rate setting.*/
@@ -247,40 +247,48 @@ void sio_lld_init(void) {
 #if STM32_SIO_USE_USART1 == TRUE
   sioObjectInit(&SIOD1);
   SIOD1.usart = USART1;
+  SIOD1.clock = STM32_USART1CLK;
 #endif
 #if STM32_SIO_USE_USART2 == TRUE
   sioObjectInit(&SIOD2);
   SIOD2.usart = USART2;
+  SIOD2.clock = STM32_USART2CLK;
 #endif
 #if STM32_SIO_USE_USART3 == TRUE
   sioObjectInit(&SIOD3);
   SIOD3.usart = USART3;
+  SIOD3.clock = STM32_USART3CLK;
 #endif
 #if STM32_SIO_USE_UART4 == TRUE
   sioObjectInit(&SIOD4);
   SIOD4.usart = UART4;
+  SIOD4.clock = STM32_UART4CLK;
 #endif
 #if STM32_SIO_USE_UART5 == TRUE
   sioObjectInit(&SIOD5);
   SIOD5.usart = UART5;
+  SIOD5.clock = STM32_UART5CLK;
 #endif
 #if STM32_SIO_USE_USART6 == TRUE
   sioObjectInit(&SIOD6);
   SIOD6.usart = USART6;
+  SIOD6.clock = STM32_USART6CLK;
 #endif
 #if STM32_SIO_USE_UART7 == TRUE
   sioObjectInit(&SIOD7);
   SIOD7.usart = UART7;
+  SIOD7.clock = STM32_UART7CLK;
 #endif
 #if STM32_SIO_USE_UART8 == TRUE
   sioObjectInit(&SIOD8);
   SIOD8.usart = UART8;
+  SIOD8.clock = STM32_UART8CLK;
 #endif
 #if STM32_SIO_USE_LPUART1 == TRUE
   sioObjectInit(&LPSIOD1);
   LPSIOD1.usart = LPUART1;
+  LPSIOD1.clock = STM32_LPUART1CLK;
 #endif
-
 }
 
 /**
@@ -292,7 +300,6 @@ void sio_lld_init(void) {
  * @notapi
  */
 msg_t sio_lld_start(SIODriver *siop) {
-  uint32_t clock = 0U;
 
   /* Using the default configuration if the application passed a
      NULL pointer.*/
@@ -307,63 +314,54 @@ msg_t sio_lld_start(SIODriver *siop) {
     }
 #if STM32_SIO_USE_USART1 == TRUE
     else if (&SIOD1 == siop) {
-      clock = STM32_USART1CLK;
       rccResetUSART1();
       rccEnableUSART1(true);
     }
 #endif
 #if STM32_SIO_USE_USART2 == TRUE
     else if (&SIOD2 == siop) {
-      clock = STM32_USART2CLK;
       rccResetUSART2();
       rccEnableUSART2(true);
     }
 #endif
 #if STM32_SIO_USE_USART3 == TRUE
     else if (&SIOD3 == siop) {
-      clock = STM32_USART3CLK;
       rccResetUSART3();
       rccEnableUSART3(true);
     }
 #endif
 #if STM32_SIO_USE_UART4 == TRUE
     else if (&SIOD4 == siop) {
-      clock = STM32_UART4CLK;
       rccResetUART4();
       rccEnableUART4(true);
     }
 #endif
 #if STM32_SIO_USE_UART5 == TRUE
     else if (&SIOD5 == siop) {
-      clock = STM32_UART5CLK;
       rccResetUART5();
       rccEnableUART5(true);
     }
 #endif
 #if STM32_SIO_USE_USART6 == TRUE
     else if (&SIOD6 == siop) {
-      clock = STM32_USART6CLK;
       rccResetUSART6();
       rccEnableUSART6(true);
     }
 #endif
 #if STM32_SIO_USE_UART7 == TRUE
     else if (&SIOD7 == siop) {
-      clock = STM32_UART7CLK;
       rccResetUART7();
       rccEnableUART7(true);
     }
 #endif
 #if STM32_SIO_USE_UART8 == TRUE
     else if (&SIOD8 == siop) {
-      clock = STM32_UART8CLK;
       rccResetUART8();
       rccEnableUART8(true);
     }
 #endif
 #if STM32_SIO_USE_LPUART1 == TRUE
     else if (&LPSIOD1 == siop) {
-      clock = STM32_LPUART1CLK;
       rccResetLPUART1();
       rccEnableLPUART1(true);
     }
@@ -381,7 +379,7 @@ msg_t sio_lld_start(SIODriver *siop) {
   }
 
   /* Configures the peripheral.*/
-  usart_init(siop, clock);
+  usart_init(siop);
 
   return HAL_RET_SUCCESS;
 }
diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_sio_lld.h b/os/hal/ports/STM32/LLD/USARTv2/hal_sio_lld.h
index ec59c822e..3310fa443 100644
--- a/os/hal/ports/STM32/LLD/USARTv2/hal_sio_lld.h
+++ b/os/hal/ports/STM32/LLD/USARTv2/hal_sio_lld.h
@@ -262,7 +262,9 @@ typedef uint32_t sio_events_mask_t;
  */
 #define sio_lld_driver_fields                                               \
   /* Pointer to the USARTx registers block.*/                               \
-  USART_TypeDef             *usart
+  USART_TypeDef             *usart;                                         \
+  /* Clock frequency for the associated USART/UART.*/                       \
+  uint32_t                  clock
 
 /**
  * @brief   Low level fields of the SIO configuration structure.
diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c
index 6c7df17de..ff5015207 100644
--- a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c
+++ b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c
@@ -250,9 +250,8 @@ static void usart_stop(UARTDriver *uartp) {
  * @details This function must be invoked with interrupts disabled.
  *
  * @param[in] uartp     pointer to the @p UARTDriver object
- * @param[in] clock      base clock for the USART
  */
-static void usart_start(UARTDriver *uartp, uint32_t clock) {
+static void usart_start(UARTDriver *uartp) {
   uint32_t fck;
   uint32_t cr1;
   const uint32_t tmo = uartp->config->timeout;
@@ -262,7 +261,8 @@ static void usart_start(UARTDriver *uartp, uint32_t clock) {
   usart_stop(uartp);
 
   /* Baud rate setting.*/
-  fck = (uint32_t)((clock + uartp->config->speed/2) / uartp->config->speed);
+  fck = (uint32_t)((uartp->clock + uartp->config->speed / 2) /
+                   uartp->config->speed);
 
   /* Correcting USARTDIV when oversampling by 8 instead of 16.
      Fraction is still 4 bits wide, but only lower 3 bits used.
@@ -535,6 +535,7 @@ void uart_lld_init(void) {
 #if STM32_UART_USE_USART1
   uartObjectInit(&UARTD1);
   UARTD1.usart   = USART1;
+  UARTD1.clock  = STM32_USART1CLK;
   UARTD1.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD1.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD1.dmarx   = NULL;
@@ -547,6 +548,7 @@ void uart_lld_init(void) {
 #if STM32_UART_USE_USART2
   uartObjectInit(&UARTD2);
   UARTD2.usart   = USART2;
+  UARTD2.clock  = STM32_USART2CLK;
   UARTD2.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD2.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD2.dmarx   = NULL;
@@ -559,6 +561,7 @@ void uart_lld_init(void) {
 #if STM32_UART_USE_USART3
   uartObjectInit(&UARTD3);
   UARTD3.usart   = USART3;
+  UARTD3.clock  = STM32_USART3CLK;
   UARTD3.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD3.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD3.dmarx   = NULL;
@@ -571,6 +574,7 @@ void uart_lld_init(void) {
 #if STM32_UART_USE_UART4
   uartObjectInit(&UARTD4);
   UARTD4.usart   = UART4;
+  UARTD4.clock  = STM32_UART4CLK;
   UARTD4.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD4.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD4.dmarx   = NULL;
@@ -583,6 +587,7 @@ void uart_lld_init(void) {
 #if STM32_UART_USE_UART5
   uartObjectInit(&UARTD5);
   UARTD5.usart   = UART5;
+  UARTD5.clock  = STM32_UART5CLK;
   UARTD5.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD5.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD5.dmarx   = NULL;
@@ -595,6 +600,7 @@ void uart_lld_init(void) {
 #if STM32_UART_USE_USART6
   uartObjectInit(&UARTD6);
   UARTD6.usart   = USART6;
+  UARTD6.clock  = STM32_USART6CLK;
   UARTD6.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD6.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD6.dmarx   = NULL;
@@ -607,6 +613,7 @@ void uart_lld_init(void) {
 #if STM32_UART_USE_UART7
   uartObjectInit(&UARTD7);
   UARTD7.usart   = UART7;
+  UARTD7.clock  = STM32_UART7CLK;
   UARTD7.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD7.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD7.dmarx   = NULL;
@@ -619,6 +626,7 @@ void uart_lld_init(void) {
 #if STM32_UART_USE_UART8
   uartObjectInit(&UARTD8);
   UARTD8.usart   = UART8;
+  UARTD8.clock  = STM32_UART8CLK;
   UARTD8.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD8.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD8.dmarx   = NULL;
@@ -637,7 +645,6 @@ void uart_lld_init(void) {
  * @notapi
  */
 void uart_lld_start(UARTDriver *uartp) {
-  uint32_t clock = 0U;
 
   if (uartp->state == UART_STOP) {
 
@@ -645,7 +652,6 @@ void uart_lld_start(UARTDriver *uartp) {
     }
 #if STM32_UART_USE_USART1
     else if (&UARTD1 == uartp) {
-      clock = STM32_USART1CLK;
       uartp->dmarx = dmaStreamAllocI(STM32_UART_USART1_RX_DMA_STREAM,
                                      STM32_UART_USART1_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
@@ -671,7 +677,6 @@ void uart_lld_start(UARTDriver *uartp) {
 
 #if STM32_UART_USE_USART2
     else if (&UARTD2 == uartp) {
-      clock = STM32_USART2CLK;
       uartp->dmarx = dmaStreamAllocI(STM32_UART_USART2_RX_DMA_STREAM,
                                      STM32_UART_USART2_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
@@ -697,7 +702,6 @@ void uart_lld_start(UARTDriver *uartp) {
 
 #if STM32_UART_USE_USART3
     else if (&UARTD3 == uartp) {
-      clock = STM32_USART3CLK;
       uartp->dmarx = dmaStreamAllocI(STM32_UART_USART3_RX_DMA_STREAM,
                                      STM32_UART_USART3_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
@@ -723,7 +727,6 @@ void uart_lld_start(UARTDriver *uartp) {
 
 #if STM32_UART_USE_UART4
     else if (&UARTD4 == uartp) {
-      clock = STM32_UART4CLK;
       uartp->dmarx = dmaStreamAllocI(STM32_UART_UART4_RX_DMA_STREAM,
                                      STM32_UART_UART4_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
@@ -749,7 +752,6 @@ void uart_lld_start(UARTDriver *uartp) {
 
 #if STM32_UART_USE_UART5
     else if (&UARTD5 == uartp) {
-      clock = STM32_UART5CLK;
       uartp->dmarx = dmaStreamAllocI(STM32_UART_UART5_RX_DMA_STREAM,
                                      STM32_UART_UART5_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
@@ -775,7 +777,6 @@ void uart_lld_start(UARTDriver *uartp) {
 
 #if STM32_UART_USE_USART6
     else if (&UARTD6 == uartp) {
-      clock = STM32_USART6CLK;
       uartp->dmarx = dmaStreamAllocI(STM32_UART_USART6_RX_DMA_STREAM,
                                      STM32_UART_USART6_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
@@ -801,7 +802,6 @@ void uart_lld_start(UARTDriver *uartp) {
 
 #if STM32_UART_USE_UART7
     else if (&UARTD7 == uartp) {
-      clock = STM32_UART7CLK;
       uartp->dmarx = dmaStreamAllocI(STM32_UART_UART7_RX_DMA_STREAM,
                                      STM32_UART_UART7_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
@@ -827,7 +827,6 @@ void uart_lld_start(UARTDriver *uartp) {
 
 #if STM32_UART_USE_UART8
     else if (&UARTD8 == uartp) {
-      clock = STM32_UART8CLK;
       uartp->dmarx = dmaStreamAllocI(STM32_UART_UART8_RX_DMA_STREAM,
                                      STM32_UART_UART8_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
@@ -867,7 +866,7 @@ void uart_lld_start(UARTDriver *uartp) {
 
   uartp->rxstate = UART_RX_IDLE;
   uartp->txstate = UART_TX_IDLE;
-  usart_start(uartp, clock);
+  usart_start(uartp);
 }
 
 /**
diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.h b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.h
index a2d3592e7..61bb80e81 100644
--- a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.h
+++ b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.h
@@ -819,6 +819,10 @@ struct hal_uart_driver {
    * @brief   Pointer to the USART registers block.
    */
   USART_TypeDef             *usart;
+  /**
+   * @brief   Clock frequency for the associated USART/UART.
+   */
+  uint32_t                  clock;
   /**
    * @brief   Receive DMA mode bit mask.
    */
diff --git a/os/hal/ports/STM32/LLD/USARTv3/hal_serial_lld.c b/os/hal/ports/STM32/LLD/USARTv3/hal_serial_lld.c
index 39026cc78..a9c287301 100644
--- a/os/hal/ports/STM32/LLD/USARTv3/hal_serial_lld.c
+++ b/os/hal/ports/STM32/LLD/USARTv3/hal_serial_lld.c
@@ -228,15 +228,14 @@ static uint8_t sd_out_buflp1[STM32_SERIAL_LPUART1_OUT_BUF_SIZE];
  *
  * @param[in] sdp       pointer to a @p SerialDriver object
  * @param[in] config    the architecture-dependent serial driver configuration
- * @param[in] clock      base clock for the USART
  */
 static void usart_init(SerialDriver *sdp,
-                       const SerialConfig *config,
-                       uint32_t clock) {
-  uint32_t brr;
+                       const SerialConfig *config) {
+  uint32_t brr, clock;
   USART_TypeDef *u = sdp->usart;
 
   /* Baud rate setting.*/
+  clock = sdp->clock;
 #if STM32_SERIAL_USE_LPUART1
   if (sdp == &LPSD1) {
     osalDbgAssert((clock >= config->speed * 3U) &&
@@ -605,6 +604,7 @@ void sd_lld_init(void) {
   iqObjectInit(&SD1.iqueue, sd_in_buf1, sizeof sd_in_buf1, NULL, &SD1);
   oqObjectInit(&SD1.oqueue, sd_out_buf1, sizeof sd_out_buf1, notify1, &SD1);
   SD1.usart = USART1;
+  SD1.clock = STM32_USART1CLK;
 #if !defined(STM32_USART1_SUPPRESS_ISR) && defined(STM32_USART1_NUMBER)
   nvicEnableVector(STM32_USART1_NUMBER, STM32_SERIAL_USART1_PRIORITY);
 #endif
@@ -615,6 +615,7 @@ void sd_lld_init(void) {
   iqObjectInit(&SD2.iqueue, sd_in_buf2, sizeof sd_in_buf2, NULL, &SD2);
   oqObjectInit(&SD2.oqueue, sd_out_buf2, sizeof sd_out_buf2, notify2, &SD2);
   SD2.usart = USART2;
+  SD2.clock = STM32_USART2CLK;
 #if !defined(STM32_USART2_SUPPRESS_ISR) && defined(STM32_USART2_NUMBER)
   nvicEnableVector(STM32_USART2_NUMBER, STM32_SERIAL_USART2_PRIORITY);
 #endif
@@ -625,6 +626,7 @@ void sd_lld_init(void) {
   iqObjectInit(&SD3.iqueue, sd_in_buf3, sizeof sd_in_buf3, NULL, &SD3);
   oqObjectInit(&SD3.oqueue, sd_out_buf3, sizeof sd_out_buf3, notify3, &SD3);
   SD3.usart = USART3;
+  SD3.clock = STM32_USART3CLK;
 #if !defined(STM32_USART3_SUPPRESS_ISR) && defined(STM32_USART3_NUMBER)
   nvicEnableVector(STM32_USART3_NUMBER, STM32_SERIAL_USART3_PRIORITY);
 #endif
@@ -635,6 +637,7 @@ void sd_lld_init(void) {
   iqObjectInit(&SD4.iqueue, sd_in_buf4, sizeof sd_in_buf4, NULL, &SD4);
   oqObjectInit(&SD4.oqueue, sd_out_buf4, sizeof sd_out_buf4, notify4, &SD4);
   SD4.usart = UART4;
+  SD4.clock = STM32_UART4CLK;
 #if !defined(STM32_UART4_SUPPRESS_ISR) && defined(STM32_UART4_NUMBER)
   nvicEnableVector(STM32_UART4_NUMBER, STM32_SERIAL_UART4_PRIORITY);
 #endif
@@ -645,6 +648,7 @@ void sd_lld_init(void) {
   iqObjectInit(&SD5.iqueue, sd_in_buf5, sizeof sd_in_buf5, NULL, &SD5);
   oqObjectInit(&SD5.oqueue, sd_out_buf5, sizeof sd_out_buf5, notify5, &SD5);
   SD5.usart = UART5;
+  SD5.clock = STM32_UART5CLK;
 #if !defined(STM32_UART5_SUPPRESS_ISR) && defined(STM32_UART5_NUMBER)
   nvicEnableVector(STM32_UART5_NUMBER, STM32_SERIAL_UART5_PRIORITY);
 #endif
@@ -655,6 +659,7 @@ void sd_lld_init(void) {
   iqObjectInit(&SD6.iqueue, sd_in_buf6, sizeof sd_in_buf6, NULL, &SD6);
   oqObjectInit(&SD6.oqueue, sd_out_buf6, sizeof sd_out_buf6, notify6, &SD6);
   SD6.usart = USART6;
+  SD6.clock = STM32_USART6CLK;
 #if !defined(STM32_USART6_SUPPRESS_ISR) && defined(STM32_USART6_NUMBER)
   nvicEnableVector(STM32_USART6_NUMBER, STM32_SERIAL_USART6_PRIORITY);
 #endif
@@ -665,6 +670,7 @@ void sd_lld_init(void) {
   iqObjectInit(&SD7.iqueue, sd_in_buf7, sizeof sd_in_buf7, NULL, &SD7);
   oqObjectInit(&SD7.oqueue, sd_out_buf7, sizeof sd_out_buf7, notify7, &SD7);
   SD7.usart = UART7;
+  SD7.clock = STM32_UART7CLK;
 #if !defined(STM32_UART7_SUPPRESS_ISR) && defined(STM32_UART7_NUMBER)
   nvicEnableVector(STM32_UART7_NUMBER, STM32_SERIAL_UART7_PRIORITY);
 #endif
@@ -675,6 +681,7 @@ void sd_lld_init(void) {
   iqObjectInit(&SD8.iqueue, sd_in_buf8, sizeof sd_in_buf8, NULL, &SD8);
   oqObjectInit(&SD8.oqueue, sd_out_buf8, sizeof sd_out_buf8, notify8, &SD8);
   SD8.usart = UART8;
+  SD8.clock = STM32_UART8CLK;
 #if !defined(STM32_UART8_SUPPRESS_ISR) && defined(STM32_UART8_NUMBER)
   nvicEnableVector(STM32_UART8_NUMBER, STM32_SERIAL_UART8_PRIORITY);
 #endif
@@ -685,6 +692,7 @@ void sd_lld_init(void) {
   iqObjectInit(&LPSD1.iqueue, sd_in_buflp1, sizeof sd_in_buflp1, NULL, &LPSD1);
   oqObjectInit(&LPSD1.oqueue, sd_out_buflp1, sizeof sd_out_buflp1, notifylp1, &LPSD1);
   LPSD1.usart = LPUART1;
+  LPSD1.clock = STM32_LPUART1CLK;
 #if !defined(STM32_LPUART1_SUPPRESS_ISR) && defined(STM32_LPUART1_NUMBER)
   nvicEnableVector(STM32_LPUART1_NUMBER, STM32_SERIAL_LPUART1_PRIORITY);
 #endif
@@ -702,7 +710,6 @@ void sd_lld_init(void) {
  * @notapi
  */
 void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
-  uint32_t clock = 0U;
 
   if (config == NULL)
     config = &default_config;
@@ -710,60 +717,51 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
   if (sdp->state == SD_STOP) {
 #if STM32_SERIAL_USE_USART1
     if (&SD1 == sdp) {
-      clock = STM32_USART1CLK;
       rccEnableUSART1(true);
     }
 #endif
 #if STM32_SERIAL_USE_USART2
     if (&SD2 == sdp) {
-      clock = STM32_USART2CLK;
       rccEnableUSART2(true);
     }
 #endif
 #if STM32_SERIAL_USE_USART3
     if (&SD3 == sdp) {
-      clock = STM32_USART3CLK;
       rccEnableUSART3(true);
     }
 #endif
 #if STM32_SERIAL_USE_UART4
     if (&SD4 == sdp) {
-      clock = STM32_UART4CLK;
       rccEnableUART4(true);
     }
 #endif
 #if STM32_SERIAL_USE_UART5
     if (&SD5 == sdp) {
-      clock = STM32_UART5CLK;
       rccEnableUART5(true);
     }
 #endif
 #if STM32_SERIAL_USE_USART6
     if (&SD6 == sdp) {
-      clock = STM32_USART6CLK;
       rccEnableUSART6(true);
     }
 #endif
 #if STM32_SERIAL_USE_UART7
     if (&SD7 == sdp) {
-      clock = STM32_UART7CLK;
       rccEnableUART7(true);
     }
 #endif
 #if STM32_SERIAL_USE_UART8
     if (&SD8 == sdp) {
-      clock = STM32_UART8CLK;
       rccEnableUART8(true);
     }
 #endif
 #if STM32_SERIAL_USE_LPUART1
     if (&LPSD1 == sdp) {
-      clock = STM32_LPUART1CLK;
       rccEnableLPUART1(true);
     }
 #endif
   }
-  usart_init(sdp, config, clock);
+  usart_init(sdp, config);
 }
 
 /**
diff --git a/os/hal/ports/STM32/LLD/USARTv3/hal_serial_lld.h b/os/hal/ports/STM32/LLD/USARTv3/hal_serial_lld.h
index e016ca3eb..135a5d972 100644
--- a/os/hal/ports/STM32/LLD/USARTv3/hal_serial_lld.h
+++ b/os/hal/ports/STM32/LLD/USARTv3/hal_serial_lld.h
@@ -542,6 +542,8 @@ typedef struct hal_serial_config {
   /* End of the mandatory fields.*/                                         \
   /* Pointer to the USART registers block.*/                                \
   USART_TypeDef             *usart;                                         \
+  /* Clock frequency for the associated USART/UART.*/                       \
+  uint32_t                  clock;                                          \
   /* Mask to be applied on received frames.*/                               \
   uint8_t                   rxmask;
 
diff --git a/os/hal/ports/STM32/LLD/USARTv3/hal_sio_lld.c b/os/hal/ports/STM32/LLD/USARTv3/hal_sio_lld.c
index 148b4a4a1..ce4af1001 100644
--- a/os/hal/ports/STM32/LLD/USARTv3/hal_sio_lld.c
+++ b/os/hal/ports/STM32/LLD/USARTv3/hal_sio_lld.c
@@ -193,14 +193,14 @@ __STATIC_INLINE void usart_enable_tx_end_irq(SIODriver *siop) {
  * @details This function must be invoked with interrupts disabled.
  *
  * @param[in] siop       pointer to a @p SIODriver object
- * @param[in] clock      base clock for the USART
  */
-__STATIC_INLINE void usart_init(SIODriver *siop, uint32_t clock) {
+__STATIC_INLINE void usart_init(SIODriver *siop) {
   USART_TypeDef *u = siop->usart;
-  uint32_t presc, brr;
+  uint32_t presc, brr, clock;
 
   /* Prescaler calculation.*/
   static const uint32_t prescvals[] = {1, 2, 4, 6, 8, 10, 12, 16, 32, 64, 128, 256};
+  clock = siop->clock;
   presc = prescvals[siop->config->presc];
 
  /* Baud rate setting.*/
@@ -256,38 +256,47 @@ void sio_lld_init(void) {
 #if STM32_SIO_USE_USART1 == TRUE
   sioObjectInit(&SIOD1);
   SIOD1.usart = USART1;
+  SIOD1.clock = STM32_USART1CLK;
 #endif
 #if STM32_SIO_USE_USART2 == TRUE
   sioObjectInit(&SIOD2);
   SIOD2.usart = USART2;
+  SIOD2.clock = STM32_USART2CLK;
 #endif
 #if STM32_SIO_USE_USART3 == TRUE
   sioObjectInit(&SIOD3);
   SIOD3.usart = USART3;
+  SIOD3.clock = STM32_USART3CLK;
 #endif
 #if STM32_SIO_USE_UART4 == TRUE
   sioObjectInit(&SIOD4);
   SIOD4.usart = UART4;
+  SIOD4.clock = STM32_UART4CLK;
 #endif
 #if STM32_SIO_USE_UART5 == TRUE
   sioObjectInit(&SIOD5);
   SIOD5.usart = UART5;
+  SIOD5.clock = STM32_UART5CLK;
 #endif
 #if STM32_SIO_USE_USART6 == TRUE
   sioObjectInit(&SIOD6);
   SIOD6.usart = USART6;
+  SIOD6.clock = STM32_USART6CLK;
 #endif
 #if STM32_SIO_USE_UART7 == TRUE
   sioObjectInit(&SIOD7);
   SIOD7.usart = UART7;
+  SIOD7.clock = STM32_UART7CLK;
 #endif
 #if STM32_SIO_USE_UART8 == TRUE
   sioObjectInit(&SIOD8);
   SIOD8.usart = UART8;
+  SIOD8.clock = STM32_UART8CLK;
 #endif
 #if STM32_SIO_USE_LPUART1 == TRUE
   sioObjectInit(&LPSIOD1);
   LPSIOD1.usart = LPUART1;
+  LPSIOD1.clock = STM32_LPUART1CLK;
 #endif
 }
 
@@ -300,7 +309,6 @@ void sio_lld_init(void) {
  * @notapi
  */
 msg_t sio_lld_start(SIODriver *siop) {
-  uint32_t clock = 0U;
 
   /* Using the default configuration if the application passed a
      NULL pointer.*/
@@ -315,63 +323,54 @@ msg_t sio_lld_start(SIODriver *siop) {
     }
 #if STM32_SIO_USE_USART1 == TRUE
     else if (&SIOD1 == siop) {
-      clock = STM32_USART1CLK;
       rccResetUSART1();
       rccEnableUSART1(true);
     }
 #endif
 #if STM32_SIO_USE_USART2 == TRUE
     else if (&SIOD2 == siop) {
-      clock = STM32_USART2CLK;
       rccResetUSART2();
       rccEnableUSART2(true);
     }
 #endif
 #if STM32_SIO_USE_USART3 == TRUE
     else if (&SIOD3 == siop) {
-      clock = STM32_USART3CLK;
       rccResetUSART3();
       rccEnableUSART3(true);
     }
 #endif
 #if STM32_SIO_USE_UART4 == TRUE
     else if (&SIOD4 == siop) {
-      clock = STM32_UART4CLK;
       rccResetUART4();
       rccEnableUART4(true);
     }
 #endif
 #if STM32_SIO_USE_UART5 == TRUE
     else if (&SIOD5 == siop) {
-      clock = STM32_UART5CLK;
       rccResetUART5();
       rccEnableUART5(true);
     }
 #endif
 #if STM32_SIO_USE_USART6 == TRUE
     else if (&SIOD6 == siop) {
-      clock = STM32_USART6CLK;
       rccResetUSART6();
       rccEnableUSART6(true);
     }
 #endif
 #if STM32_SIO_USE_UART7 == TRUE
     else if (&SIOD7 == siop) {
-      clock = STM32_UART7CLK;
       rccResetUART7();
       rccEnableUART7(true);
     }
 #endif
 #if STM32_SIO_USE_UART8 == TRUE
     else if (&SIOD8 == siop) {
-      clock = STM32_UART8CLK;
       rccResetUART8();
       rccEnableUART8(true);
     }
 #endif
 #if STM32_SIO_USE_LPUART1 == TRUE
     else if (&LPSIOD1 == siop) {
-      clock = STM32_LPUART1CLK;
       rccResetLPUART1();
       rccEnableLPUART1(true);
     }
@@ -389,7 +388,7 @@ msg_t sio_lld_start(SIODriver *siop) {
   }
 
   /* Configures the peripheral.*/
-  usart_init(siop, clock);
+  usart_init(siop);
 
   return HAL_RET_SUCCESS;
 }
diff --git a/os/hal/ports/STM32/LLD/USARTv3/hal_sio_lld.h b/os/hal/ports/STM32/LLD/USARTv3/hal_sio_lld.h
index 77ca25b4f..d25c41e03 100644
--- a/os/hal/ports/STM32/LLD/USARTv3/hal_sio_lld.h
+++ b/os/hal/ports/STM32/LLD/USARTv3/hal_sio_lld.h
@@ -266,7 +266,9 @@ typedef uint32_t sio_events_mask_t;
  */
 #define sio_lld_driver_fields                                               \
   /* Pointer to the USARTx registers block.*/                               \
-  USART_TypeDef             *usart
+  USART_TypeDef             *usart;                                         \
+  /* Clock frequency for the associated USART/UART.*/                       \
+  uint32_t                  clock
 
 /**
  * @brief   Low level fields of the SIO configuration structure.
diff --git a/os/hal/ports/STM32/LLD/USARTv3/hal_uart_lld.c b/os/hal/ports/STM32/LLD/USARTv3/hal_uart_lld.c
index bbf6f86b2..461fbe535 100644
--- a/os/hal/ports/STM32/LLD/USARTv3/hal_uart_lld.c
+++ b/os/hal/ports/STM32/LLD/USARTv3/hal_uart_lld.c
@@ -250,9 +250,8 @@ static void usart_stop(UARTDriver *uartp) {
  * @details This function must be invoked with interrupts disabled.
  *
  * @param[in] uartp     pointer to the @p UARTDriver object
- * @param[in] clock      base clock for the USART
  */
-static void usart_start(UARTDriver *uartp, uint32_t clock) {
+static void usart_start(UARTDriver *uartp) {
   uint32_t fck;
   uint32_t cr1;
   const uint32_t tmo = uartp->config->timeout;
@@ -262,7 +261,8 @@ static void usart_start(UARTDriver *uartp, uint32_t clock) {
   usart_stop(uartp);
 
   /* Baud rate setting.*/
-  fck = (uint32_t)((clock + uartp->config->speed/2) / uartp->config->speed);
+  fck = (uint32_t)((uartp->clock + uartp->config->speed / 2) /
+                   uartp->config->speed);
 
   /* Correcting USARTDIV when oversampling by 8 instead of 16.
      Fraction is still 4 bits wide, but only lower 3 bits used.
@@ -535,6 +535,7 @@ void uart_lld_init(void) {
 #if STM32_UART_USE_USART1
   uartObjectInit(&UARTD1);
   UARTD1.usart   = USART1;
+  UARTD1.clock   = STM32_USART1CLK;
   UARTD1.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD1.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD1.dmarx   = NULL;
@@ -547,6 +548,7 @@ void uart_lld_init(void) {
 #if STM32_UART_USE_USART2
   uartObjectInit(&UARTD2);
   UARTD2.usart   = USART2;
+  UARTD2.clock   = STM32_USART2CLK;
   UARTD2.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD2.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD2.dmarx   = NULL;
@@ -559,6 +561,7 @@ void uart_lld_init(void) {
 #if STM32_UART_USE_USART3
   uartObjectInit(&UARTD3);
   UARTD3.usart   = USART3;
+  UARTD3.clock   = STM32_USART3CLK;
   UARTD3.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD3.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD3.dmarx   = NULL;
@@ -571,6 +574,7 @@ void uart_lld_init(void) {
 #if STM32_UART_USE_UART4
   uartObjectInit(&UARTD4);
   UARTD4.usart   = UART4;
+  UARTD4.clock   = STM32_UART4CLK;
   UARTD4.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD4.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD4.dmarx   = NULL;
@@ -583,6 +587,7 @@ void uart_lld_init(void) {
 #if STM32_UART_USE_UART5
   uartObjectInit(&UARTD5);
   UARTD5.usart   = UART5;
+  UARTD5.clock   = STM32_UART5CLK;
   UARTD5.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD5.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD5.dmarx   = NULL;
@@ -595,6 +600,7 @@ void uart_lld_init(void) {
 #if STM32_UART_USE_USART6
   uartObjectInit(&UARTD6);
   UARTD6.usart   = USART6;
+  UARTD6.clock   = STM32_USART6CLK;
   UARTD6.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD6.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD6.dmarx   = NULL;
@@ -607,6 +613,7 @@ void uart_lld_init(void) {
 #if STM32_UART_USE_UART7
   uartObjectInit(&UARTD7);
   UARTD7.usart   = UART7;
+  UARTD7.clock   = STM32_UART7CLK;
   UARTD7.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD7.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD7.dmarx   = NULL;
@@ -619,6 +626,7 @@ void uart_lld_init(void) {
 #if STM32_UART_USE_UART8
   uartObjectInit(&UARTD8);
   UARTD8.usart   = UART8;
+  UARTD8.clock   = STM32_UART8CLK;
   UARTD8.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD8.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
   UARTD8.dmarx   = NULL;
@@ -637,7 +645,6 @@ void uart_lld_init(void) {
  * @notapi
  */
 void uart_lld_start(UARTDriver *uartp) {
-  uint32_t clock = 0U;
 
   if (uartp->state == UART_STOP) {
 
@@ -645,7 +652,6 @@ void uart_lld_start(UARTDriver *uartp) {
     }
 #if STM32_UART_USE_USART1
     else if (&UARTD1 == uartp) {
-      clock = STM32_USART1CLK;
       uartp->dmarx = dmaStreamAllocI(STM32_UART_USART1_RX_DMA_STREAM,
                                      STM32_UART_USART1_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
@@ -671,7 +677,6 @@ void uart_lld_start(UARTDriver *uartp) {
 
 #if STM32_UART_USE_USART2
     else if (&UARTD2 == uartp) {
-      clock = STM32_USART2CLK;
       uartp->dmarx = dmaStreamAllocI(STM32_UART_USART2_RX_DMA_STREAM,
                                      STM32_UART_USART2_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
@@ -697,7 +702,6 @@ void uart_lld_start(UARTDriver *uartp) {
 
 #if STM32_UART_USE_USART3
     else if (&UARTD3 == uartp) {
-      clock = STM32_USART3CLK;
       uartp->dmarx = dmaStreamAllocI(STM32_UART_USART3_RX_DMA_STREAM,
                                      STM32_UART_USART3_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
@@ -723,7 +727,6 @@ void uart_lld_start(UARTDriver *uartp) {
 
 #if STM32_UART_USE_UART4
     else if (&UARTD4 == uartp) {
-      clock = STM32_UART4CLK;
       uartp->dmarx = dmaStreamAllocI(STM32_UART_UART4_RX_DMA_STREAM,
                                      STM32_UART_UART4_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
@@ -749,7 +752,6 @@ void uart_lld_start(UARTDriver *uartp) {
 
 #if STM32_UART_USE_UART5
     else if (&UARTD5 == uartp) {
-      clock = STM32_UART5CLK;
       uartp->dmarx = dmaStreamAllocI(STM32_UART_UART5_RX_DMA_STREAM,
                                      STM32_UART_UART5_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
@@ -775,7 +777,6 @@ void uart_lld_start(UARTDriver *uartp) {
 
 #if STM32_UART_USE_USART6
     else if (&UARTD6 == uartp) {
-      clock = STM32_USART6CLK;
       uartp->dmarx = dmaStreamAllocI(STM32_UART_USART6_RX_DMA_STREAM,
                                      STM32_UART_USART6_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
@@ -801,7 +802,6 @@ void uart_lld_start(UARTDriver *uartp) {
 
 #if STM32_UART_USE_UART7
     else if (&UARTD7 == uartp) {
-      clock = STM32_UART7CLK;
       uartp->dmarx = dmaStreamAllocI(STM32_UART_UART7_RX_DMA_STREAM,
                                      STM32_UART_UART7_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
@@ -827,7 +827,6 @@ void uart_lld_start(UARTDriver *uartp) {
 
 #if STM32_UART_USE_UART8
     else if (&UARTD8 == uartp) {
-      clock = STM32_UART8CLK;
       uartp->dmarx = dmaStreamAllocI(STM32_UART_UART8_RX_DMA_STREAM,
                                      STM32_UART_UART8_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
@@ -867,7 +866,7 @@ void uart_lld_start(UARTDriver *uartp) {
 
   uartp->rxstate = UART_RX_IDLE;
   uartp->txstate = UART_TX_IDLE;
-  usart_start(uartp, clock);
+  usart_start(uartp);
 }
 
 /**
diff --git a/os/hal/ports/STM32/LLD/USARTv3/hal_uart_lld.h b/os/hal/ports/STM32/LLD/USARTv3/hal_uart_lld.h
index c6a398c26..42d8505f0 100644
--- a/os/hal/ports/STM32/LLD/USARTv3/hal_uart_lld.h
+++ b/os/hal/ports/STM32/LLD/USARTv3/hal_uart_lld.h
@@ -819,6 +819,10 @@ struct hal_uart_driver {
    * @brief   Pointer to the USART registers block.
    */
   USART_TypeDef             *usart;
+  /**
+   * @brief   Clock frequency for the associated USART/UART.
+   */
+  uint32_t                  clock;
   /**
    * @brief   Receive DMA mode bit mask.
    */
diff --git a/readme.txt b/readme.txt
index 2b588ef01..32fd20880 100644
--- a/readme.txt
+++ b/readme.txt
@@ -112,6 +112,8 @@
 - NEW: On STM32WBxx added a check on STM32_LSI_ENABLE required by IWDG.
 - NEW: Added SPIv2 support also to STM32WB and STM32WL.
 - FIX: Reverted bug #1100 (backported to 20.3.5)(backported to 21.11.2).
+- FIX: Fixed clock re-initialization problem in STM32 USARTv2 and USARTv3
+       drivers (bug #1217)(backported to 21.11.2).
 - FIX: Fixed assertion on initialization of STM32H7xx (bug #1216)
        (backported to 21.11.2).
 - FIX: Fixed Virtual Timers failure in a specific condition (bug #1215)