diff --git a/os/common/ports/ARMv6-M/compilers/RVCT/chcoreasm.s b/os/common/ports/ARMv6-M/compilers/RVCT/chcoreasm.s
index 70d5b6122..dabc0ebf3 100644
--- a/os/common/ports/ARMv6-M/compilers/RVCT/chcoreasm.s
+++ b/os/common/ports/ARMv6-M/compilers/RVCT/chcoreasm.s
@@ -110,7 +110,7 @@ __port_thread_start PROC
                 blx     r4
                 movs    r0, #0              /* MSG_OK */
                 bl      chThdExit
-.zombies        b       .zombies
+zombies         b       zombies
                 ENDP
 
 /*
@@ -133,7 +133,7 @@ __port_switch_from_isr PROC
 #if CH_DBG_STATISTICS
                 bl      __stats_stop_measure_crit_thd
 #endif
-_port_exit_from_isr
+__port_exit_from_isr
                 ldr     r2, =SCB_ICSR
                 movs    r3, #128
 #if CORTEX_ALTERNATE_SWITCH
@@ -144,7 +144,7 @@ _port_exit_from_isr
                 lsls    r3, r3, #24
                 str     r3, [r2, #0]
 #endif
-.waithere       b       .waithere
+waithere        b       waithere
                 ENDP
 
                 END
diff --git a/readme.txt b/readme.txt
index e3162b54c..eddf7e713 100644
--- a/readme.txt
+++ b/readme.txt
@@ -123,6 +123,8 @@
 - NEW: Added SPIv2 support also to STM32WB and STM32WL.
 - FIX: Re-opened and fixed bug #1100
        (backported to 20.3.5)(backported to 21.11.2).
+- FIX: Fixed ARMv6-M port Keil compiler fail (bug #1228)
+       (backported to 21.11.2).
 - FIX: Fixed invalid handling of lwIP NETIF_FLAG_LINK_UP flag (bug #1227)
        (backported to 20.3.5)(backported to 21.11.2).
 - FIX: Fixed missing TIM16/17 errata handling for STM32G0xx (bug #1226)