git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2168 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -51,7 +51,7 @@ typedef struct {
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uint32_t data;
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/** Initial value for FIO_DIR register.*/
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uint32_t dir;
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} LPC13xx_gpio_setup_t;
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} lpc13xx_gpio_setup_t;
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/**
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* @brief GPIO static initializer.
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@ -67,13 +67,13 @@ typedef struct {
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*/
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typedef struct {
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/** @brief GPIO 0 setup data.*/
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LPC13xx_gpio_setup_t P0;
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lpc13xx_gpio_setup_t P0;
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/** @brief GPIO 1 setup data.*/
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LPC13xx_gpio_setup_t P1;
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lpc13xx_gpio_setup_t P1;
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/** @brief GPIO 2 setup data.*/
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LPC13xx_gpio_setup_t P2;
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lpc13xx_gpio_setup_t P2;
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/** @brief GPIO 3 setup data.*/
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LPC13xx_gpio_setup_t P3;
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lpc13xx_gpio_setup_t P3;
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} PALConfig;
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/**
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@ -47,7 +47,7 @@
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* @details This structure represents the common part of all the MSP430 I/O
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* ports.
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*/
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struct port_common_t {
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struct msp430_port_common {
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ioregister_t in;
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ioregister_t out;
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ioregister_t dir;
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@ -56,11 +56,11 @@ struct port_common_t {
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/**
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* @brief Generic MSP430 I/O port.
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*/
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union __ioport {
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struct port_common_t iop_common;
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typedef union {
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struct msp430_port_common iop_common;
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struct port_simple_t iop_simple;
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struct port_full_t iop_full;
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};
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} msp430_ioport_t;
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/**
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* @brief Setup registers common to all the MSP430 ports.
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@ -138,7 +138,7 @@ typedef uint8_t ioportmask_t;
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* any assumption about it, use the provided macros when populating
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* variables of this type.
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*/
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typedef union __ioport * ioportid_t;
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typedef union msp430_ioport_t *ioportid_t;
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/*===========================================================================*/
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/* I/O Ports Identifiers. */
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@ -187,18 +187,37 @@
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#if defined(__DOXYGEN__)
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/**
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* @brief Macro defining the specific ARM architecture.
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* @note This macro is for documentation only, the real name changes
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* depending on the selected architecture, the possible names are:
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* - CH_ARCHITECTURE_ARM_v6M.
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* - CH_ARCHITECTURE_ARM_v7M.
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* .
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*/
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#define CH_ARCHITECTURE_ARM_vxm
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/**
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* @brief Name of the implemented architecture.
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* @note The value is for documentation only, the real value changes
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* depending on the selected architecture, the possible values are:
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* - "ARMv6-M".
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* - "ARMv7-M".
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* - "ARMv7-ME".
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* .
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*/
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#define CH_ARCHITECTURE_NAME "ARMvx-M"
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/**
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* @brief Name of the architecture variant (optional).
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* @note The value is for documentation only, the real value changes
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* depending on the selected architecture, the possible values are:
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* - "Cortex-M0"
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* - "Cortex-M1"
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* - "Cortex-M3"
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* - "Cortex-M4"
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* .
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*/
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#define CH_CORE_VARIANT_NAME "Cortex-Mx"
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#elif CORTEX_MODEL == CORTEX_M4
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#define CH_ARCHITECTURE_ARM_v7M
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#define CH_ARCHITECTURE_NAME "ARMv7-ME"
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@ -225,7 +244,12 @@
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* @brief Stack and memory alignment enforcement.
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*/
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#if (CORTEX_STACK_ALIGNMENT == 64) || defined(__DOXYGEN__)
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#if defined(__DOXYGEN__)
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/* Dummy declaration, for Doxygen only.*/
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typedef uint64_t stkalign_t;
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#else
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typedef uint64_t stkalign_t __attribute__ ((aligned (8)));
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#endif
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#elif CORTEX_STACK_ALIGNMENT == 32
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typedef uint32_t stkalign_t __attribute__ ((aligned (4)));
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#else
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@ -26,6 +26,8 @@
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* architectures.
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*
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* @section ARMCMx_STATES_A System logical states in ARMv6-M
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* The ChibiOS/RT logical @ref system_states are mapped as follow in the ARM
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* Cortex-M0 port:
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* - <b>Init</b>. This state is represented by the startup code and the
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* initialization code before @p chSysInit() is executed. It has not a
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* special hardware state associated.
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@ -119,7 +119,7 @@
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the name in order to make names more consistent.
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NOTE: ****** Make sure to use a chconf.h file taken from ******
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****** this version in your project. ******
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- HAL documentation improvements.
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- CHANGE: Extensive documentation improvements.
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*** 2.1.1 ***
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- FIX: Fixed insufficient stack size for idle thread (bug 3033624)(backported
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