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More LPC122x drivers from Marcin J. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5794 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
theshed 2013-06-01 22:00:28 +00:00
parent 62ae17087c
commit 51af0586c9
29 changed files with 7167 additions and 5 deletions
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234
os/hal/platforms/LPC122x/ext_lld.c Normal file
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/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
LPC122x EXT driver - Copyright (C) 2013 Marcin Jokel
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file LPC122x/ext_lld.c
* @brief LPC122x EXT subsystem low level driver source.
*
* @addtogroup EXT
* @{
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_EXT || defined(__DOXYGEN__)
#include "ext_lld_isr.h"
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/**
* @brief EXTD0 driver identifier.
*/
#if LPC122x_EXT_USE_EXT0 || defined(__DOXYGEN__)
EXTDriver EXTD0;
#endif
/**
* @brief EXTD1 driver identifier.
*/
#if LPC122x_EXT_USE_EXT1 || defined(__DOXYGEN__)
EXTDriver EXTD1;
#endif
/**
* @brief EXTD2 driver identifier.
*/
#if LPC122x_EXT_USE_EXT2 || defined(__DOXYGEN__)
EXTDriver EXTD2;
#endif
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Low level EXT driver initialization.
*
* @notapi
*/
void ext_lld_init(void) {
/* Driver initialization.*/
#if LPC122x_EXT_USE_EXT0
extObjectInit(&EXTD0);
EXTD0.gpio = LPC_GPIO0;
#endif
#if LPC122x_EXT_USE_EXT1
extObjectInit(&EXTD1);
EXTD1.gpio = LPC_GPIO1;
#endif
#if LPC122x_EXT_USE_EXT2
extObjectInit(&EXTD2);
EXTD2.gpio = LPC_GPIO2;
#endif
}
/**
* @brief Configures and activates the EXT peripheral.
*
* @param[in] extp pointer to the @p EXTDriver object
*
* @notapi
*/
void ext_lld_start(EXTDriver *extp) {
int i;
/* Configure all pins as edge sensitive */
#if LPC122x_EXT_USE_EXT0
if (extp == &EXTD0) {
LPC_GPIO0->IS = 0;
ext_lld_exti_irq_enable(EXTI0_IRQ);
}
#endif
#if LPC122x_EXT_USE_EXT1
if (extp == &EXTD1) {
LPC_GPIO1->IS = 0;
ext_lld_exti_irq_enable(EXTI1_IRQ);
}
#endif
#if LPC122x_EXT_USE_EXT2
if (extp == &EXTD2) {
LPC_GPIO2->IS = 0;
ext_lld_exti_irq_enable(EXTI2_IRQ);
}
#endif
/* Configuration of autostart channels.*/
for (i = 0; i < EXT_MAX_CHANNELS; i++)
if (extp->config->channels[i].mode & EXT_CH_MODE_AUTOSTART)
ext_lld_channel_enable(extp, i);
else
ext_lld_channel_disable(extp, i);
}
/**
* @brief Deactivates the EXT peripheral.
*
* @param[in] extp pointer to the @p EXTDriver object
*
* @notapi
*/
void ext_lld_stop(EXTDriver *extp) {
LPC_GPIO_Type * gp = extp->gpio;
if (extp->state == EXT_ACTIVE) {
#if LPC122x_EXT_USE_EXT0
if (extp == &EXTD0) {
ext_lld_exti_irq_disable(EXTI0_IRQ);
}
#endif
#if LPC122x_EXT_USE_EXT1
if (extp == &EXTD1) {
ext_lld_exti_irq_disable(EXTI1_IRQ);
}
#endif
#if LPC122x_EXT_USE_EXT2
if (extp == &EXTD2) {
ext_lld_exti_irq_disable(EXTI2_IRQ);
}
#endif
}
gp->IE = 0;
gp->IC = 0xFFFFFFFF;
__NOP();
__NOP();
}
/**
* @brief Enables an EXT channel.
*
* @param[in] extp pointer to the @p EXTDriver object
* @param[in] channel channel to be enabled
*
* @notapi
*/
void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel) {
LPC_GPIO_Type * gp;
gp = extp->gpio;
/* Programming edge irq enables */
if (extp->config->channels[channel].mode & EXT_CH_MODE_BOTH_EDGES)
gp->IBE |= (1 << channel);
else {
gp->IBE &= ~(1 << channel);
if (extp->config->channels[channel].mode & EXT_CH_MODE_RISING_EDGE)
gp->IEV |= (1 << channel);
else
gp->IEV &= (1 << channel);
}
gp->IC = (1 << channel); /* Clear interrupt on selected channel */
__NOP();
__NOP();
gp->IE |= (1 << channel); /* Interrupt on selected channel
is not masked */
}
/**
* @brief Disables an EXT channel.
*
* @param[in] extp pointer to the @p EXTDriver object
* @param[in] channel channel to be disabled
*
* @notapi
*/
void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel) {
LPC_GPIO_Type * gp;
gp = extp->gpio;
gp->IE &= ~(1 << channel); /* Mask interrupt on selected channel */
gp->IC = (1 << channel); /* Clear interrupt on selected channel */
__NOP();
__NOP();
}
#endif /* HAL_USE_EXT */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
LPC122x EXT driver - Copyright (C) 2013 Marcin Jokel
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file LPC122x/ext_lld.h
* @brief LPC122x EXT subsystem low level driver header.
*
* @addtogroup EXT
* @{
*/
#ifndef _EXT_LLD_H_
#define _EXT_LLD_H_
#if HAL_USE_EXT || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/**
* @brief Available number of EXT channels.
*/
#define EXT_MAX_CHANNELS 32
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @brief EXT0 driver enable switch.
* @details If set to @p TRUE the support for EXT1 is included.
* @note The default is @p FALSE.
*/
#if !defined(LPC122x_EXT_USE_EXT0) || defined(__DOXYGEN__)
#define LPC122x_EXT_USE_EXT0 FALSE
#endif
/**
* @brief EXT1 driver enable switch.
* @details If set to @p TRUE the support for EXT1 is included.
* @note The default is @p FALSE.
*/
#if !defined(LPC122x_EXT_USE_EXT1) || defined(__DOXYGEN__)
#define LPC122x_EXT_USE_EXT1 FALSE
#endif
/**
* @brief EXT2 driver enable switch.
* @details If set to @p TRUE the support for EXT1 is included.
* @note The default is @p FALSE.
*/
#if !defined(LPC122x_EXT_USE_EXT2) || defined(__DOXYGEN__)
#define LPC122x_EXT_USE_EXT2 FALSE
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief EXT channel identifier.
*/
typedef uint32_t expchannel_t;
/**
* @brief Type of an EXT generic notification callback.
*
* @param[in] extp pointer to the @p EXPDriver object triggering the
* callback
*/
typedef void (*extcallback_t)(EXTDriver *extp, expchannel_t channel);
/**
* @brief Channel configuration structure.
*/
typedef struct {
/**
* @brief Channel mode.
*/
uint8_t mode;
/**
* @brief Channel callback.
*/
extcallback_t cb;
} EXTChannelConfig;
/**
* @brief Driver configuration structure.
* @note It could be empty on some architectures.
*/
typedef struct {
/**
* @brief Channel configurations.
*/
EXTChannelConfig channels[EXT_MAX_CHANNELS];
/* End of the mandatory fields.*/
} EXTConfig;
/**
* @brief Structure representing an EXT driver.
*/
struct EXTDriver {
/**
* @brief Driver state.
*/
extstate_t state;
/**
* @brief Current configuration data.
*/
const EXTConfig *config;
/* End of the mandatory fields.*/
LPC_GPIO_Type *gpio;
};
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#if LPC122x_EXT_USE_EXT0 || !defined(__DOXYGEN__)
extern EXTDriver EXTD0;
#endif
#if LPC122x_EXT_USE_EXT1 || !defined(__DOXYGEN__)
extern EXTDriver EXTD1;
#endif
#if LPC122x_EXT_USE_EXT2 || !defined(__DOXYGEN__)
extern EXTDriver EXTD2;
#endif
#ifdef __cplusplus
extern "C" {
#endif
void ext_lld_init(void);
void ext_lld_start(EXTDriver *extp);
void ext_lld_stop(EXTDriver *extp);
void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel);
void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel);
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_EXT */
#endif /* _EXT_LLD_H_ */
/** @} */

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os/hal/platforms/LPC122x/ext_lld_isr.c Normal file
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/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
LPC122x EXT driver - Copyright (C) 2013 Marcin Jokel
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file LPC122x/ext_lld_isr.c
* @brief LPC122x EXT subsystem low level driver ISR code.
*
* @addtogroup EXT
* @{
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_EXT || defined(__DOXYGEN__)
#include "ext_lld_isr.h"
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
#if LPC122x_EXT_USE_EXT0 || LPC122x_EXT_USE_EXT1 || LPC122x_EXT_USE_EXT2 || \
defined(__DOXYGEN__)
/**
* @brief I2C error handler.
*
* @param[in] i2cp pointer to the @p I2CDriver object
*
* @notapi
*/
static void ext_lld_serve_interrupt(EXTDriver *extp) {
uint32_t port_stat;
uint8_t i;
port_stat = extp->gpio->MIS; /* Read interrupt status */
extp->gpio->IC = port_stat; /* Clear interrupt flags */
for (i = 0; i < EXT_MAX_CHANNELS; i++) {
if (port_stat & 0x01) {
extp->config->channels[i].cb(extp, i);
}
port_stat = port_stat >> 1;
}
}
#endif
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if LPC122x_EXT_USE_EXT0 || defined(__DOXYGEN__)
/**
* @brief PIO0 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(VectorA4) {
CH_IRQ_PROLOGUE();
ext_lld_serve_interrupt(&EXTD0);
CH_IRQ_EPILOGUE();
}
#endif
#if LPC122x_EXT_USE_EXT1 || defined(__DOXYGEN__)
/**
* @brief PIO1 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(VectorA8) {
CH_IRQ_PROLOGUE();
ext_lld_serve_interrupt(&EXTD1);
CH_IRQ_EPILOGUE();
}
#endif
#if LPC122x_EXT_USE_EXT2 || defined(__DOXYGEN__)
/**
* @brief PIO2 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(VectorAC) {
CH_IRQ_PROLOGUE();
ext_lld_serve_interrupt(&EXTD2);
CH_IRQ_EPILOGUE();
}
#endif
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Enables EXTI IRQ sources.
*
* @notapi
*/
void ext_lld_exti_irq_enable(extirq_t irqn) {
uint32_t pmask;
switch (irqn) {
case EXTI0_IRQ:
pmask = LPC122x_EXT_EXTI0_IRQ_PRIORITY;
break;
case EXTI1_IRQ:
pmask = LPC122x_EXT_EXTI1_IRQ_PRIORITY;
break;
case EXTI2_IRQ:
pmask = LPC122x_EXT_EXTI2_IRQ_PRIORITY;
break;
}
nvicEnableVector(EINT0_IRQn + irqn, CORTEX_PRIORITY_MASK(pmask));
}
/**
* @brief Disables EXTI IRQ sources.
*
* @notapi
*/
void ext_lld_exti_irq_disable(extirq_t irqn) {
nvicDisableVector(EINT0_IRQn + irqn);
}
#endif /* HAL_USE_EXT */
/** @} */

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os/hal/platforms/LPC122x/ext_lld_isr.h Normal file
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/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
LPC122x EXT driver - Copyright (C) 2013 Marcin Jokel
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file LPC122x/ext_lld_isr.h
* @brief LPC122x EXT subsystem low level driver ISR header.
*
* @addtogroup EXT
* @{
*/
#ifndef _EXT_LLD_ISR_H_
#define _EXT_LLD_ISR_H_
#if HAL_USE_EXT || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
#define EXTI0_IRQ 0
#define EXTI1_IRQ 1
#define EXTI2_IRQ 2
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @name Configuration options
* @{
*/
/**
* @brief EXTI0 interrupt priority level setting.
*/
#if !defined(LPC122x_EXT_EXTI0_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define LPC122x_EXT_EXTI0_IRQ_PRIORITY 3
#endif
/**
* @brief EXTI1 interrupt priority level setting.
*/
#if !defined(LPC122x_EXT_EXTI1_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define LPC122x_EXT_EXTI1_IRQ_PRIORITY 3
#endif
/**
* @brief EXTI2 interrupt priority level setting.
*/
#if !defined(LPC122x_EXT_EXTI2_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define LPC122x_EXT_EXTI2_IRQ_PRIORITY 3
#endif
/** @} */
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief EXT irq port identifier.
*/
typedef uint32_t extirq_t;
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#ifdef __cplusplus
extern "C" {
#endif
void ext_lld_exti_irq_enable(extirq_t irqn);
void ext_lld_exti_irq_disable(extirq_t irqn);
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_EXT */
#endif /* _EXT_LLD_ISR_H_ */
/** @} */

438
os/hal/platforms/LPC122x/i2c_lld.c Normal file
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/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
LPC122x I2C driver - Copyright (C) 2013 Marcin Jokel
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
Concepts and parts of this file have been contributed by Uladzimir Pylinsky
aka barthess.
*/
/**
* @file LPC122x/i2c_lld.h
* @brief LPC122x I2C subsystem low level driver header.
*
* @addtogroup I2C
* @{
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_I2C || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/** @brief I2C1 driver identifier.*/
I2CDriver I2CD1;
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/**
* @brief Wakes up the waiting thread.
*
* @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] msg wakeup message
*
* @notapi
*/
#define wakeup_isr(i2cp, msg) { \
chSysLockFromIsr(); \
if ((i2cp)->thread != NULL) { \
Thread *tp = (i2cp)->thread; \
(i2cp)->thread = NULL; \
tp->p_u.rdymsg = (msg); \
chSchReadyI(tp); \
} \
chSysUnlockFromIsr(); \
}
/**
* @brief Handling of stalled I2C transactions.
*
* @param[in] i2cp pointer to the @p I2CDriver object
*
* @notapi
*/
static void i2c_lld_safety_timeout(void *p) {
I2CDriver *i2cp = (I2CDriver *)p;
chSysLockFromIsr();
if (i2cp->thread) {
Thread *tp = i2cp->thread;
i2cp->thread = NULL;
tp->p_u.rdymsg = RDY_TIMEOUT;
chSchReadyI(tp);
}
chSysUnlockFromIsr();
}
/**
* @brief I2C error handler.
*
* @param[in] i2cp pointer to the @p I2CDriver object
*
* @notapi
*/
static void i2c_lld_serve_error_interrupt(I2CDriver *i2cp, uint32_t status) {
i2cflags_t error = 0;
switch (status) {
case I2C_STATE_ARB_LOST:
error = I2CD_ARBITRATION_LOST;
break;
case I2C_STATE_BUS_ERROR:
error = I2CD_BUS_ERROR;
break;
case I2C_STATE_MS_SLAR_NACK:
case I2C_STATE_MS_TDAT_NACK:
case I2C_STATE_MS_SLAW_NACK:
error = I2CD_ACK_FAILURE ;
break;
}
/* If some error has been identified then sends wakes the waiting thread.*/
i2cp->errors = error;
wakeup_isr(i2cp, RDY_RESET);
}
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/**
* @brief I2C1 event interrupt handler.
*
* @notapi
*/
CH_IRQ_HANDLER(Vector70) {
uint32_t status;
CH_IRQ_PROLOGUE();
status = LPC_I2C->STAT;
switch(status) {
case I2C_STATE_MS_START: /* A START condition has been transmitted. */
if (I2CD1.txbytes > 0) {
LPC_I2C->DAT = I2CD1.addr; /* Write slave address with WR bit. */
}
else {
LPC_I2C->DAT = I2CD1.addr | I2C_RD_BIT; /* Write slave address with RD bit. */
}
LPC_I2C->CONCLR = I2C_CONCLR_STAC | I2C_CONCLR_SIC; /* Clear START and SI bit. */
break;
case I2C_STATE_MS_SLAR_NACK: /* NOT ACK has been received, Master will be transmitted STOP. */
case I2C_STATE_MS_TDAT_NACK: /* NOT ACK has been received, Master will be transmitted STOP. */
case I2C_STATE_MS_SLAW_NACK: /* NOT ACK has been received, Master will be transmitted STOP. */
LPC_I2C->CONSET = I2C_CONSET_STO; /* Set STOP bit. */
LPC_I2C->CONCLR = I2C_CONCLR_SIC; /* Clear SI bit. */
i2c_lld_serve_error_interrupt(&I2CD1, status);
break;
case I2C_STATE_MS_SLAW_ACK: /* SLA + W has been transmitted, ACK has been received. */
case I2C_STATE_MS_TDAT_ACK: /* Data byte has been transmitted, ACK has been received. */
if (I2CD1.txbytes > 0) {
LPC_I2C->DAT = *I2CD1.txbuf++; /* Write data. */
I2CD1.txbytes--;
}
else {
if (I2CD1.rxbytes > 0) {
LPC_I2C->CONSET = I2C_CONSET_STO | I2C_CONSET_STA; /* Set START and STOP bit. */
} /* STOP bit will be transmit, then START bit. */
else {
LPC_I2C->CONSET = I2C_CONSET_STO; /* Set STOP bit. */
wakeup_isr(&I2CD1, RDY_OK);
}
}
LPC_I2C->CONCLR = I2C_CONCLR_SIC; /* Clear SI bit. */
break;
case I2C_STATE_MS_SLAR_ACK: /* SLA + R has been transmitted, ACK has been received. */
case I2C_STATE_MS_RDAT_ACK: /* Data byte has been received, ACK has been returned. */
if (status == I2C_STATE_MS_RDAT_ACK) {
*I2CD1.rxbuf++ = LPC_I2C->DAT; /* Read data */
I2CD1.rxbytes--;
}
if (I2CD1.rxbytes == 1) {
LPC_I2C->CONCLR = I2C_CONCLR_SIC | I2C_CONCLR_AAC; /* Clear SI and ACK bit. */
}
else {
LPC_I2C->CONSET = I2C_CONSET_AA; /* Set ACK bit. */
LPC_I2C->CONCLR = I2C_CONCLR_SIC; /* Clear SI bit. */
}
break;
case I2C_STATE_MS_RDAT_NACK: /* Data byte has been received, NOT ACK has been returned. */
*I2CD1.rxbuf++ = LPC_I2C->DAT; /* Read data. */
I2CD1.rxbytes--;
LPC_I2C->CONSET = I2C_CONSET_STO; /* Set STOP bit. */
LPC_I2C->CONCLR = I2C_CONCLR_SIC; /* Clear SI bit. */
wakeup_isr(&I2CD1, RDY_OK);
break;
case I2C_STATE_BUS_ERROR: /* Bus error. */
case I2C_STATE_ARB_LOST: /* Arbitration lost. */
LPC_I2C->CONCLR = I2C_CONCLR_SIC; /* Clear SI bit. */
i2c_lld_serve_error_interrupt(&I2CD1, status);
break;
}
CH_IRQ_EPILOGUE();
}
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Low level I2C driver initialization.
*
* @notapi
*/
void i2c_lld_init(void) {
i2cObjectInit(&I2CD1);
I2CD1.thread = NULL;
I2CD1.i2c = LPC_I2C;
LPC_IOCON->PIO0_10 = 0x0482; /* Set I2C SCL pin function */
LPC_IOCON->PIO0_11 = 0x0482; /* Set I2C SDA pin function */
}
/**
* @brief Configures and activates the I2C peripheral.
*
* @param[in] i2cp pointer to the @p I2CDriver object
*
* @notapi
*/
void i2c_lld_start(I2CDriver *i2cp) {
uint32_t i2cscl;
uint32_t mulh, mull, div;
LPC_I2C_Type *dp = i2cp->i2c;
/* Make sure I2C peripheral is disabled */
dp->CONCLR = I2C_CONCLR_ENC;
/* If in stopped state then enables the I2C clock. */
if (i2cp->state == I2C_STOP) {
if (&I2CD1 == i2cp) {
LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 5); /* Enable clock. */
LPC_SYSCON->PRESETCTRL &= ~(1 << 1); /* Reset I2C peripheral.*/
__NOP();
LPC_SYSCON->PRESETCTRL |= (1 << 1);
nvicEnableVector(I2C_IRQn,
CORTEX_PRIORITY_MASK(LPC122x_I2C_IRQ_PRIORITY));
}
}
/* Setup I2C clock parameters.*/
i2cscl = (LPC122x_SYSCLK/(i2cp->config->clock_timing));
if (i2cp->config->mode == I2C_FAST_MODE) {
div = 19;
mull = 13;
mulh = 6;
} else if (i2cp->config->mode == I2C_FAST_MODE_PLUS) {
div = 3;
mull = 2;
mulh = 1;
} else { /* i2cp->config->mode == I2C_STANDARD_MODE */
div = 2;
mull = 1;
mulh = 1;
}
dp->SCLH = (mulh * i2cscl) / div;
dp->SCLL = (mull *i2cscl) / div;
/* Enable I2C.*/
dp->CONSET |= I2C_CONSET_EN;
}
/**
* @brief Deactivates the I2C peripheral.
*
* @param[in] i2cp pointer to the @p I2CDriver object
*
* @notapi
*/
void i2c_lld_stop(I2CDriver *i2cp) {
/* If not in stopped state then disables the I2C clock.*/
if (i2cp->state != I2C_STOP) {
/* I2C disable.*/
i2cp->i2c->CONCLR = I2C_CONCLR_ENC;
if (&I2CD1 == i2cp) {
nvicDisableVector(I2C_IRQn);
LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 5);
}
}
}
/**
* @brief Receives data via the I2C bus as master.
* @details Number of receiving bytes must be more than 1 on STM32F1x. This is
* hardware restriction.
*
* @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] addr slave device address
* @param[out] rxbuf pointer to the receive buffer
* @param[in] rxbytes number of bytes to be received
* @param[in] timeout the number of ticks before the operation timeouts,
* the following special values are allowed:
* - @a TIME_INFINITE no timeout.
* .
* @return The operation status.
* @retval RDY_OK if the function succeeded.
* @retval RDY_RESET if one or more I2C errors occurred, the errors can
* be retrieved using @p i2cGetErrors().
* @retval RDY_TIMEOUT if a timeout occurred before operation end. <b>After a
* timeout the driver must be stopped and restarted
* because the bus is in an uncertain state</b>.
*
* @notapi
*/
msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr,
uint8_t *rxbuf, size_t rxbytes,
systime_t timeout) {
LPC_I2C_Type *dp = i2cp->i2c;
VirtualTimer vt;
i2cp->addr = addr << 1;
/* Global timeout for the whole operation.*/
if (timeout != TIME_INFINITE)
chVTSetI(&vt, timeout, i2c_lld_safety_timeout, (void *)i2cp);
/* Releases the lock from high level driver.*/
chSysUnlock();
/* Initializes driver fields */
i2cp->errors = 0;
i2cp->rxbuf = rxbuf;
i2cp->rxbytes = rxbytes;
/* This lock will be released in high level driver.*/
chSysLock();
/* Atomic check on the timer in order to make sure that a timeout didn't
happen outside the critical zone.*/
if ((timeout != TIME_INFINITE) && !chVTIsArmedI(&vt))
return RDY_TIMEOUT;
/* Starts the operation.*/
dp->CONSET = I2C_CONSET_STA;
/* Waits for the operation completion or a timeout.*/
i2cp->thread = chThdSelf();
chSchGoSleepS(THD_STATE_SUSPENDED);
if ((timeout != TIME_INFINITE) && chVTIsArmedI(&vt))
chVTResetI(&vt);
return chThdSelf()->p_u.rdymsg;
}
/**
* @brief Transmits data via the I2C bus as master.
* @details Number of receiving bytes must be 0 or more than 1 on STM32F1x.
* This is hardware restriction.
*
* @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] addr slave device address
* @param[in] txbuf pointer to the transmit buffer
* @param[in] txbytes number of bytes to be transmitted
* @param[out] rxbuf pointer to the receive buffer
* @param[in] rxbytes number of bytes to be received
* @param[in] timeout the number of ticks before the operation timeouts,
* the following special values are allowed:
* - @a TIME_INFINITE no timeout.
* .
* @return The operation status.
* @retval RDY_OK if the function succeeded.
* @retval RDY_RESET if one or more I2C errors occurred, the errors can
* be retrieved using @p i2cGetErrors().
* @retval RDY_TIMEOUT if a timeout occurred before operation end. <b>After a
* timeout the driver must be stopped and restarted
* because the bus is in an uncertain state</b>.
*
* @notapi
*/
msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr,
const uint8_t *txbuf, size_t txbytes,
uint8_t *rxbuf, size_t rxbytes,
systime_t timeout) {
LPC_I2C_Type *dp = i2cp->i2c;
VirtualTimer vt;
i2cp->addr = addr << 1;
/* Global timeout for the whole operation.*/
if (timeout != TIME_INFINITE)
chVTSetI(&vt, timeout, i2c_lld_safety_timeout, (void *)i2cp);
/* Releases the lock from high level driver.*/
chSysUnlock();
/* Initializes driver fields */
i2cp->errors = 0;
i2cp->txbuf = txbuf;
i2cp->txbytes = txbytes;
i2cp->rxbuf = rxbuf;
i2cp->rxbytes = rxbytes;
/* This lock will be released in high level driver.*/
chSysLock();
/* Atomic check on the timer in order to make sure that a timeout didn't
happen outside the critical zone.*/
if ((timeout != TIME_INFINITE) && !chVTIsArmedI(&vt))
return RDY_TIMEOUT;
/* Starts the operation.*/
dp->CONSET = I2C_CONSET_STA;
/* Waits for the operation completion or a timeout.*/
i2cp->thread = chThdSelf();
chSchGoSleepS(THD_STATE_SUSPENDED);
if ((timeout != TIME_INFINITE) && chVTIsArmedI(&vt))
chVTResetI(&vt);
return chThdSelf()->p_u.rdymsg;
}
#endif /* HAL_USE_I2C */
/** @} */

228
os/hal/platforms/LPC122x/i2c_lld.h Normal file
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@ -0,0 +1,228 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
LPC122x I2C driver - Copyright (C) 2013 Marcin Jokel
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
Concepts and parts of this file have been contributed by Uladzimir Pylinsky
aka barthess.
*/
/**
* @file LPC122x/i2c_lld.h
* @brief LPC122x I2C subsystem low level driver header.
*
* @addtogroup I2C
* @{
*/
#ifndef _I2C_LLD_H_
#define _I2C_LLD_H_
#if HAL_USE_I2C || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
#define I2C_CONSET_AA 0x04 /* Assert acknowledge flag. */
#define I2C_CONSET_SI 0x08 /* I2C interrupt flag. */
#define I2C_CONSET_STO 0x10 /* STOP flag. */
#define I2C_CONSET_STA 0x20 /* START flag. */
#define I2C_CONSET_EN 0x40 /* I2C interface enable. */
#define I2C_CONCLR_AAC 0x04 /* Assert acknowledge Clear bit. */
#define I2C_CONCLR_SIC 0x08 /* I2C interrupt Clear bit. */
#define I2C_CONCLR_STAC 0x20 /* START flag Clear bit. */
#define I2C_CONCLR_ENC 0x40 /* I2C interface Disable bit. */
#define I2C_WR_BIT 0x00
#define I2C_RD_BIT 0x01
#define I2C_STATE_MS_START 0x08
#define I2C_STATE_MS_RSTART 0x10
#define I2C_STATE_MS_SLAW_ACK 0x18
#define I2C_STATE_MS_SLAW_NACK 0x20
#define I2C_STATE_MS_TDAT_ACK 0x28
#define I2C_STATE_MS_TDAT_NACK 0x30
#define I2C_STATE_ARB_LOST 0x38
#define I2C_STATE_MS_SLAR_ACK 0x40
#define I2C_STATE_MS_SLAR_NACK 0x48
#define I2C_STATE_MS_RDAT_ACK 0x50
#define I2C_STATE_MS_RDAT_NACK 0x58
#define I2C_STATE_BUS_ERROR 0x00
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @name Configuration options
* @{
*/
/**
* @brief I2C interrupt priority level setting.
*/
#if !defined(LPC122x_I2C_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define LPC122x_I2C_IRQ_PRIORITY 3
#endif
/** @} */
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief Type representing I2C address.
*/
typedef uint16_t i2caddr_t;
/**
* @brief I2C Driver condition flags type.
*/
typedef uint32_t i2cflags_t;
/**
* @brief Supported modes for the I2C bus.
*/
typedef enum {
I2C_STANDARD_MODE = 1,
I2C_FAST_MODE = 2,
I2C_FAST_MODE_PLUS = 3
} i2cmode_t;
/**
* @brief Driver configuration structure.
*/
typedef struct {
i2cmode_t mode; /**< @brief Specifies the I2C mode. */
uint32_t clock_timing; /**< @brief Specifies the clock timing */
} I2CConfig;
/**
* @brief Type of a structure representing an I2C driver.
*/
typedef struct I2CDriver I2CDriver;
/**
* @brief Structure representing an I2C driver.
*/
struct I2CDriver {
/**
* @brief Driver state.
*/
i2cstate_t state;
/**
* @brief Current configuration data.
*/
const I2CConfig *config;
/**
* @brief Error flags.
*/
i2cflags_t errors;
#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
#if CH_USE_MUTEXES || defined(__DOXYGEN__)
/**
* @brief Mutex protecting the bus.
*/
Mutex mutex;
#elif CH_USE_SEMAPHORES
Semaphore semaphore;
#endif
#endif /* I2C_USE_MUTUAL_EXCLUSION */
#if defined(I2C_DRIVER_EXT_FIELDS)
I2C_DRIVER_EXT_FIELDS
#endif
/* End of the mandatory fields.*/
/**
* @brief Thread waiting for I/O completion.
*/
Thread *thread;
/**
* @brief Current slave address without R/W bit.
*/
i2caddr_t addr;
/**
* @brief Pointer to the transmit buffer.
*/
const uint8_t *txbuf;
/**
* @brief Number of bytes to transmit.
*/
size_t txbytes;
/**
* @brief Pointer to the receive buffer.
*/
uint8_t *rxbuf;
/**
* @brief Number of bytes to receive.
*/
size_t rxbytes;
/**
* @brief Pointer to the I2C registers block.
*/
LPC_I2C_Type *i2c;
};
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/**
* @brief Get errors from I2C driver.
*
* @param[in] i2cp pointer to the @p I2CDriver object
*
* @notapi
*/
#define i2c_lld_get_errors(i2cp) ((i2cp)->errors)
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#if !defined(__DOXYGEN__)
extern I2CDriver I2CD1;
#endif
#endif /* !defined(__DOXYGEN__) */
#ifdef __cplusplus
extern "C" {
#endif
void i2c_lld_init(void);
void i2c_lld_start(I2CDriver *i2cp);
void i2c_lld_stop(I2CDriver *i2cp);
msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr,
const uint8_t *txbuf, size_t txbytes,
uint8_t *rxbuf, size_t rxbytes,
systime_t timeout);
msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr,
uint8_t *rxbuf, size_t rxbytes,
systime_t timeout);
#ifdef __cplusplus
}
#endif
#endif /* _I2C_LLD_H_ */
/** @} */

5
os/hal/platforms/LPC122x/platform.mk
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@ -2,6 +2,11 @@
PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/LPC122x/hal_lld.c \
${CHIBIOS}/os/hal/platforms/LPC122x/gpt_lld.c \
${CHIBIOS}/os/hal/platforms/LPC122x/pal_lld.c \
${CHIBIOS}/os/hal/platforms/LPC122x/ext_lld.c \
${CHIBIOS}/os/hal/platforms/LPC122x/ext_lld_isr.c \
${CHIBIOS}/os/hal/platforms/LPC122x/pwm_lld.c \
${CHIBIOS}/os/hal/platforms/LPC122x/i2c_lld.c \
${CHIBIOS}/os/hal/platforms/LPC122x/rtc_lld.c \
${CHIBIOS}/os/hal/platforms/LPC122x/serial_lld.c \
${CHIBIOS}/os/hal/platforms/LPC122x/spi_lld.c

446
os/hal/platforms/LPC122x/pwm_lld.c Normal file
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/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
LPC122x PWM driver - Copyright (C) 2013 Marcin Jokel
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file LPC122x/pwm_lld.c
* @brief LPC122x PWM subsystem low level driver header.
*
* @addtogroup PWM
* @{
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_PWM || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/**
* @brief PWMD1 driver identifier.
* @note The driver PWMD1 allocates the complex timer TIM1 when enabled.
*/
#if LPC122x_PWM_USE_CT16B0 || defined(__DOXYGEN__)
PWMDriver PWMD1;
#endif
/**
* @brief PWMD2 driver identifier.
* @note The driver PWMD2 allocates the timer TIM2 when enabled.
*/
#if LPC122x_PWM_USE_CT16B1 || defined(__DOXYGEN__)
PWMDriver PWMD2;
#endif
/**
* @brief PWMD3 driver identifier.
* @note The driver PWMD3 allocates the timer TIM3 when enabled.
*/
#if LPC122x_PWM_USE_CT32B0 || defined(__DOXYGEN__)
PWMDriver PWMD3;
#endif
/**
* @brief PWMD4 driver identifier.
* @note The driver PWMD4 allocates the timer TIM4 when enabled.
*/
#if LPC122x_PWM_USE_CT32B1 || defined(__DOXYGEN__)
PWMDriver PWMD4;
#endif
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
#if LPC122x_PWM_USE_CT16B0 || LPC122x_PWM_USE_CT16B1 || \
LPC122x_PWM_USE_CT32B0 || LPC122x_PWM_USE_CT32B1 || defined(__DOXYGEN__)
/**
* @brief Common TIM2...TIM5 IRQ handler.
* @note It is assumed that the various sources are only activated if the
* associated callback pointer is not equal to @p NULL in order to not
* perform an extra check in a potentially critical interrupt handler.
*
* @param[in] pwmp pointer to a @p PWMDriver object
*/
static void pwm_lld_serve_interrupt(PWMDriver *pwmp) {
uint16_t sr;
sr = pwmp->tim->IR;
pwmp->tim->IR = sr;
if ((sr & IR_MR0INT) != 0)
pwmp->config->channels[0].callback(pwmp);
if ((sr & IR_MR1INT) != 0)
pwmp->config->channels[1].callback(pwmp);
if ((sr & IR_MR3INT) != 0)
pwmp->config->callback(pwmp);
}
#endif
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if LPC122x_PWM_USE_CT16B0 || defined(__DOXYGEN__)
/**
* @brief CT16B0 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(Vector74) {
CH_IRQ_PROLOGUE();
pwm_lld_serve_interrupt(&PWMD1);
CH_IRQ_EPILOGUE();
}
#endif /* STM32_PWM_USE_TIM1 */
#if LPC122x_PWM_USE_CT16B1 || defined(__DOXYGEN__)
/**
* @brief CT16B1 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(Vector78) {
CH_IRQ_PROLOGUE();
pwm_lld_serve_interrupt(&PWMD2);
CH_IRQ_EPILOGUE();
}
#endif /* LPC122x_PWM_USE_CT16B1 */
#if LPC122x_PWM_USE_CT32B0 || defined(__DOXYGEN__)
/**
* @brief CT32B0 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(Vector7C) {
CH_IRQ_PROLOGUE();
pwm_lld_serve_interrupt(&PWMD3);
CH_IRQ_EPILOGUE();
}
#endif /* LPC122x_PWM_USE_CT32B0 */
#if LPC122x_PWM_USE_CT32B1 || defined(__DOXYGEN__)
/**
* @brief CT32B1 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(Vector80) {
CH_IRQ_PROLOGUE();
pwm_lld_serve_interrupt(&PWMD4);
CH_IRQ_EPILOGUE();
}
#endif /* LPC122x_PWM_USE_CT32B1 */
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Low level PWM driver initialization.
*
* @notapi
*/
void pwm_lld_init(void) {
#if LPC122x_PWM_USE_CT16B0
/* Driver initialization.*/
pwmObjectInit(&PWMD1);
PWMD1.tim = LPC_CT16B0;
#if LPC122x_PWM_USE_CT16B0_CH0
#if LPC122x_PWM_CT16B0_CH0_SELECTOR == PWM_CT16B0_CH0_IS_PIO0_11
LPC_IOCON->PIO0_11 = 0x84;
#elif LPC122x_PWM_CT16B0_CH0_SELECTOR == PWM_CT16B0_CH0_IS_PIO0_28
LPC_IOCON->PIO0_28 = 0x84;
#else /* LPC122x_PWM_CT16B0_CH0_SELECTOR == PWM_CT16B0_CH0_IS_PIO2_0 */
LPC_IOCON->PIO2_0 = 0x84;
#endif
#endif
#if LPC122x_PWM_USE_CT16B0_CH1
#if LPC122x_PWM_CT16B0_CH1_SELECTOR == PWM_CT16B0_CH1_IS_PIO0_12
LPC_IOCON->PIO0_12 = 0x84;
#elif LPC122x_PWM_CT16B0_CH1_SELECTOR == PWM_CT16B0_CH1_IS_PIO0_29
LPC_IOCON->PIO0_29 = 0x84;
#else /* LPC122x_PWM_CT16B0_CH1_SELECTOR == PWM_CT16B0_CH1_IS_PIO2_1 */
LPC_IOCON->PIO2_1 = 0x83;
#endif
#endif
#endif
#if LPC122x_PWM_USE_CT16B1
/* Driver initialization.*/
pwmObjectInit(&PWMD2);
PWMD2.tim = LPC_CT16B1;
#if LPC122x_PWM_USE_CT16B1_CH0
#if LPC122x_PWM_CT16B1_CH0_SELECTOR == PWM_CT16B1_CH0_IS_PIO0_15
LPC_IOCON->PIO0_15 = 0x84;
#elif LPC122x_PWM_CT16B1_CH0_SELECTOR == PWM_CT16B1_CH0_IS_PIO1_5
LPC_IOCON->PIO1_5 = 0x83;
#else /* LPC122x_PWM_CT16B1_CH0_SELECTOR == PWM_CT16B1_CH0_IS_PIO2_2 */
LPC_IOCON->PIO2_2 = 0x83;
#endif
#endif
#if LPC122x_PWM_USE_CT16B1_CH1
#if LPC122x_PWM_CT16B1_CH1_SELECTOR == PWM_CT16B1_CH1_IS_PIO0_16
LPC_IOCON->PIO0_16 = 0x84;
#elif LPC122x_PWM_CT16B1_CH1_SELECTOR == PWM_CT16B1_CH1_IS_PIO1_6
LPC_IOCON->PIO1_6 = 0x82;
#else /* LPC122x_PWM_CT16B1_CH1_SELECTOR == PWM_CT16B1_CH1_IS_PIO2_3 */
LPC_IOCON->PIO2_3 = 0x83;
#endif
#endif
#endif
#if LPC122x_PWM_USE_CT32B0
/* Driver initialization.*/
pwmObjectInit(&PWMD3);
PWMD3.tim = LPC_CT32B0;
#if LPC122x_PWM_USE_CT32B0_CH0
#if LPC122x_PWM_CT32B0_CH0_SELECTOR == PWM_CT32B0_CH0_IS_PIO0_1
LPC_IOCON->PIO0_1 = 0x84;
#elif LPC122x_PWM_CT32B0_CH0_SELECTOR == PWM_CT32B0_CH0_IS_PIO0_18
LPC_IOCON->PIO0_18 = 0x84;
#else /* LPC122x_PWM_CT32B0_CH0_SELECTOR == PWM_CT32B0_CH0_IS_PIO2_4 */
LPC_IOCON->PIO2_4 = 0x83;
#endif
#endif
#if LPC122x_PWM_USE_CT32B0_CH1
#if LPC122x_PWM_CT32B0_CH1_SELECTOR == PWM_CT32B0_CH1_IS_PIO0_2
LPC_IOCON->PIO0_2 = 0x84;
#elif LPC122x_PWM_CT32B0_CH1_SELECTOR == PWM_CT32B0_CH1_IS_PIO0_19
LPC_IOCON->PIO0_19 = 0x84;
#else /* LPC122x_PWM_CT32B0_CH1_SELECTOR == PWM_CT32B0_CH1_IS_PIO2_5 */
LPC_IOCON->PIO2_5 = 0x83;
#endif
#endif
#endif
#if LPC122x_PWM_USE_CT32B1
/* Driver initialization.*/
pwmObjectInit(&PWMD4);
PWMD4.tim = LPC_CT32B1;
#if LPC122x_PWM_USE_CT32B1_CH0
#if LPC122x_PWM_CT32B1_CH0_SELECTOR == PWM_CT32B1_CH0_IS_PIO0_6
LPC_IOCON->PIO0_6 = 0x84;
#elif LPC122x_PWM_CT32B1_CH0_SELECTOR == PWM_CT32B1_CH0_IS_PIO0_23
LPC_IOCON->PIO0_23 = 0x84;
#else /* LPC122x_PWM_CT32B1_CH0_SELECTOR == PWM_CT32B1_CH0_IS_PIO2_8 */
LPC_IOCON->PIO2_8 = 0x83;
#endif
#endif
#if LPC122x_PWM_USE_CT32B1_CH1
#if LPC122x_PWM_CT32B1_CH1_SELECTOR == PWM_CT32B1_CH1_IS_PIO0_7
LPC_IOCON->PIO0_7 = 0x84;
#elif LPC122x_PWM_CT32B1_CH1_SELECTOR == PWM_CT32B1_CH1_IS_PIO0_24
LPC_IOCON->PIO0_24 = 0x84;
#else /* LPC122x_PWM_CT32B1_CH1_SELECTOR == PWM_CT32B1_CH1_IS_PIO2_9 */
LPC_IOCON->PIO2_9 = 0x83;
#endif
#endif
#endif
}
/**
* @brief Configures and activates the PWM peripheral.
* @note Starting a driver that is already in the @p PWM_READY state
* disables all the active channels.
*
* @param[in] pwmp pointer to a @p PWMDriver object
*
* @notapi
*/
void pwm_lld_start(PWMDriver *pwmp) {
uint32_t pr;
if (pwmp->state == PWM_STOP) {
/* Clock activation and timer reset.*/
#if LPC122x_PWM_USE_CT16B0
if (&PWMD1 == pwmp) {
LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 7);
nvicEnableVector(TIMER_16_0_IRQn, LPC122x_PWM_CT16B0_IRQ_PRIORITY);
}
#endif
#if LPC122x_PWM_USE_CT16B1
if (&PWMD2 == pwmp) {
LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 8);
nvicEnableVector(TIMER_16_1_IRQn, LPC122x_PWM_CT16B1_IRQ_PRIORITY);
}
#endif
#if LPC122x_PWM_USE_CT32B0
if (&PWMD3 == pwmp) {
LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 9);
nvicEnableVector(TIMER_32_0_IRQn, LPC122x_PWM_CT32B0_IRQ_PRIORITY);
}
#endif
#if LPC122x_PWM_USE_CT32B1
if (&PWMD4 == pwmp) {
LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 10);
nvicEnableVector(TIMER_32_1_IRQn, LPC122x_PWM_CT32B1_IRQ_PRIORITY);
}
#endif
}
else {
/* Driver re-configuration scenario, it must be stopped first.*/
pwmp->tim->TCR = 0;
}
/* Output enables and polarities setup.*/
if(pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_LOW)
pwmp->tim->PWMC = (1 << 0);
if(pwmp->config->channels[1].mode == PWM_OUTPUT_ACTIVE_LOW)
pwmp->tim->PWMC |= (1 << 1);
/* Timer configured and started.*/
pr = (uint16_t)((LPC122x_SYSCLK / pwmp->config->frequency) - 1);
chDbgAssert(((uint32_t)(pr + 1) * pwmp->config->frequency) == LPC122x_SYSCLK,
"pwm_lld_start(), #1", "invalid frequency");
pwmp->tim->TC = 0;
pwmp->tim->PR = pr;
pwmp->tim->IR = 0xFF;
pwmp->tim->MCR = MCR_MR3R; /* Reset on Match3 */
pwmp->tim->MR3 = pwmp->config->period;
if (pwmp->config->callback != NULL)
pwmp->tim->MCR |= MCR_MR3I;
pwmp->tim->TCR = 1; /* Timer start */
}
/**
* @brief Deactivates the PWM peripheral.
*
* @param[in] pwmp pointer to a @p PWMDriver object
*
* @notapi
*/
void pwm_lld_stop(PWMDriver *pwmp) {
/* If in ready state then disables the PWM clock.*/
if (pwmp->state == PWM_READY) {
pwmp->tim->TCR = 0; /* Timer disabled. */
pwmp->tim->MCR = 0; /* All IRQs disabled. */
pwmp->tim->IR = 0xFF; /* Clear eventual pending IRQs. */
pwmp->tim->PWMC = 0; /* PWM outputs disable */
#if LPC122x_PWM_USE_CT16B0
if (&PWMD1 == pwmp) {
nvicDisableVector(TIMER_16_0_IRQn);
LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 7);
}
#endif
#if LPC122x_PWM_USE_CT16B1
if (&PWMD2 == pwmp) {
nvicDisableVector(TIMER_16_1_IRQn);
LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 8);
}
#endif
#if LPC122x_PWM_USE_CT32B0
if (&PWMD3 == pwmp) {
nvicDisableVector(TIMER_32_0_IRQn);
LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 9);
}
#endif
#if LPC122x_PWM_USE_CT32B1
if (&PWMD4 == pwmp) {
nvicDisableVector(TIMER_32_1_IRQn);
LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 10);
}
#endif
}
}
/**
* @brief Enables a PWM channel.
* @pre The PWM unit must have been activated using @p pwmStart().
* @post The channel is active using the specified configuration.
* @note The function has effect at the next cycle start.
*
* @param[in] pwmp pointer to a @p PWMDriver object
* @param[in] channel PWM channel identifier (0...PWM_CHANNELS-1)
* @param[in] width PWM pulse width as clock pulses number
*
* @notapi
*/
void pwm_lld_enable_channel(PWMDriver *pwmp,
pwmchannel_t channel,
pwmcnt_t width) {
pwmp->tim->MCR &= ~(7 << (channel * 3));
if ( channel == 0)
pwmp->tim->MR0 = width; /* New duty cycle. */
else
pwmp->tim->MR1 = width; /* New duty cycle. */
/* If there is a callback defined for the channel then the associated
interrupt must be enabled.*/
if (pwmp->config->channels[channel].callback != NULL) {
pwmp->tim->IR = (1 << channel); /* Clear interrupt flag*/
pwmp->tim->MCR |= (1 << (channel * 3)); /* Set interrupt on selected channel */
}
}
/**
* @brief Disables a PWM channel.
* @pre The PWM unit must have been activated using @p pwmStart().
* @post The channel is disabled and its output line returned to the
* idle state.
* @note The function has effect at the next cycle start.
*
* @param[in] pwmp pointer to a @p PWMDriver object
* @param[in] channel PWM channel identifier (0...PWM_CHANNELS-1)
*
* @notapi
*/
void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) {
if ( channel == 0)
pwmp->tim->MR0 = 0;
else
pwmp->tim->MR1 = 0;
pwmp->tim->MCR &= ~(7 << (channel * 3));
pwmp->tim->IR = (1 << channel);
}
#endif /* HAL_USE_PWM */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
LPC122x PWM driver - Copyright (C) 2013 Marcin Jokel
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file LPC122x/pwm_lld.h
* @brief LPC122x PWM subsystem low level driver header.
*
* @addtogroup PWM
* @{
*/
#ifndef _PWM_LLD_H_
#define _PWM_LLD_H_
#if HAL_USE_PWM || defined(__DOXYGEN__)
/*===========================================================================*/
/* Unsupported modes and specific modes */
/*===========================================================================*/
#undef PWM_OUTPUT_ACTIVE_HIGH
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
#define IR_MR0INT (1 << 0)
#define IR_MR1INT (1 << 1)
#define IR_MR2INT (1 << 2)
#define IR_MR3INT (1 << 3)
#define IR_CR0INT (1 << 4)
#define IR_CR1INT (1 << 5)
#define IR_CR2INT (1 << 6)
#define IR_CR3INT (1 << 7)
#define MCR_MR3I (1 << 9)
#define MCR_MR3R (1 << 10)
#define MCR_MR3S (1 << 11)
/**
* @brief Number of PWM channels per PWM driver.
*/
#define PWM_CHANNELS 2
#define PWM_CT16B0_CH0_IS_PIO0_11 0
#define PWM_CT16B0_CH0_IS_PIO0_28 1
#define PWM_CT16B0_CH0_IS_PIO2_0 2
#define PWM_CT16B0_CH1_IS_PIO0_12 0
#define PWM_CT16B0_CH1_IS_PIO0_29 1
#define PWM_CT16B0_CH1_IS_PIO2_1 2
#define PWM_CT16B1_CH0_IS_PIO0_15 0
#define PWM_CT16B1_CH0_IS_PIO1_5 1
#define PWM_CT16B1_CH0_IS_PIO2_2 2
#define PWM_CT16B1_CH1_IS_PIO0_16 0
#define PWM_CT16B1_CH1_IS_PIO1_6 1
#define PWM_CT16B1_CH1_IS_PIO2_3 2
#define PWM_CT32B0_CH0_IS_PIO0_1 0
#define PWM_CT32B0_CH0_IS_PIO0_18 1
#define PWM_CT32B0_CH0_IS_PIO2_4 2
#define PWM_CT32B0_CH1_IS_PIO0_2 0
#define PWM_CT32B0_CH1_IS_PIO0_19 1
#define PWM_CT32B0_CH1_IS_PIO2_5 2
#define PWM_CT32B1_CH0_IS_PIO0_6 0
#define PWM_CT32B1_CH0_IS_PIO0_23 1
#define PWM_CT32B1_CH0_IS_PIO2_8 2
#define PWM_CT32B1_CH1_IS_PIO0_7 0
#define PWM_CT32B1_CH1_IS_PIO0_24 1
#define PWM_CT32B1_CH1_IS_PIO2_9 2
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @name Configuration options
* @{
*/
/**
* @brief PWMD1 driver enable switch.
* @details If set to @p TRUE the support for PWMD1 is included.
* @note The default is @p TRUE.
*/
#if !defined(LPC122x_PWM_USE_CT16B0) || defined(__DOXYGEN__)
#define LPC122x_PWM_USE_CT16B0 FALSE
#endif
/**
* @brief PWMD2 driver enable switch.
* @details If set to @p TRUE the support for PWMD2 is included.
* @note The default is @p TRUE.
*/
#if !defined(LPC122x_PWM_USE_CT16B1) || defined(__DOXYGEN__)
#define LPC122x_PWM_USE_CT16B1 FALSE
#endif
/**
* @brief PWMD3 driver enable switch.
* @details If set to @p TRUE the support for PWMD3 is included.
* @note The default is @p TRUE.
*/
#if !defined(LPC122x_PWM_USE_CT32B0) || defined(__DOXYGEN__)
#define LPC122x_PWM_USE_CT32B0 FALSE
#endif
/**
* @brief PWMD4 driver enable switch.
* @details If set to @p TRUE the support for PWMD4 is included.
* @note The default is @p TRUE.
*/
#if !defined(LPC122x_PWM_USE_CT32B1) || defined(__DOXYGEN__)
#define LPC122x_PWM_USE_CT32B1 FALSE
#endif
/**
* @brief PWMD1 Channel 0 driver enable switch.
* @details If set to @p TRUE PWMD1 Channel 0 is enabled.
* @note The default is @p FALSE.
*/
#if !defined(LPC122x_PWM_USE_CT16B0_CH0) || defined(__DOXYGEN__)
#define LPC122x_PWM_USE_CT16B0_CH0 FALSE
#endif
/**
* @brief PWMD1 Channel 1 driver enable switch.
* @details If set to @p TRUE PWMD1 Channel 1 is enabled.
* @note The default is @p FALSE.
*/
#if !defined(LPC122x_PWM_USE_CT16B0_CH1) || defined(__DOXYGEN__)
#define LPC122x_PWM_USE_CT16B0_CH1 FALSE
#endif
/**
* @brief PWMD2 Channel 0 driver enable switch.
* @details If set to @p TRUE PWMD2 Channel 0 is enabled.
* @note The default is @p FALSE.
*/
#if !defined(LPC122x_PWM_USE_CT16B1_CH0) || defined(__DOXYGEN__)
#define LPC122x_PWM_USE_CT16B1_CH0 FALSE
#endif
/**
* @brief PWMD2 Channel 1 driver enable switch.
* @details If set to @p TRUE PWMD2 Channel 1 is enabled.
* @note The default is @p FALSE.
*/
#if !defined(LPC122x_PWM_USE_CT16B1_CH1) || defined(__DOXYGEN__)
#define LPC122x_PWM_USE_CT16B1_CH1 FALSE
#endif
/**
* @brief PWMD3 Channel 0 driver enable switch.
* @details If set to @p TRUE PWMD3 Channel 0 is enabled.
* @note The default is @p FALSE.
*/
#if !defined(LPC122x_PWM_USE_CT32B0_CH0) || defined(__DOXYGEN__)
#define LPC122x_PWM_USE_CT32B0_CH0 FALSE
#endif
/**
* @brief PWMD3 Channel 1 driver enable switch.
* @details If set to @p TRUE PWMD3 Channel 1 is enabled.
* @note The default is @p FALSE.
*/
#if !defined(LPC122x_PWM_USE_CT32B0_CH1) || defined(__DOXYGEN__)
#define LPC122x_PWM_USE_CT32B0_CH1 FALSE
#endif
/**
* @brief PWMD4 Channel 0 driver enable switch.
* @details If set to @p TRUE PWMD4 Channel 0 is enabled.
* @note The default is @p FALSE.
*/
#if !defined(LPC122x_PWM_USE_CT32B1_CH0) || defined(__DOXYGEN__)
#define LPC122x_PWM_USE_CT32B1_CH0 FALSE
#endif
/**
* @brief PWMD4 Channel 1 driver enable switch.
* @details If set to @p TRUE PWMD4 Channel 1 is enabled.
* @note The default is @p FALSE.
*/
#if !defined(LPC122x_PWM_USE_CT32B1_CH1) || defined(__DOXYGEN__)
#define LPC122x_PWM_USE_CT32B1_CH1 FALSE
#endif
/**
* @brief PWMD1 interrupt priority level setting.
*/
#if !defined(LPC122x_PWM_CT16B0_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define LPC122x_PWM_CT16B0_IRQ_PRIORITY 3
#endif
/**
* @brief PWMD2 interrupt priority level setting.
*/
#if !defined(LPC122x_PWM_CT16B1_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define LPC122x_PWM_CT16B1_IRQ_PRIORITY 3
#endif
/**
* @brief PWMD3 interrupt priority level setting.
*/
#if !defined(LPC122x_PWM_CT32B0_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define LPC122x_PWM_CT32B0_IRQ_PRIORITY 3
#endif
/**
* @brief PWMD4 interrupt priority level setting.
*/
#if !defined(LPC122x_PWM_CT32B1_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define LPC122x_PWM_CT32B1_IRQ_PRIORITY 3
#endif
/**
* @brief PWM_CT16B0_CH0 signal selector.
*/
#if !defined(LPC122x_PWM_CT16B0_CH0_SELECTOR) || defined(__DOXYGEN__)
#define LPC122x_PWM_CT16B0_CH0_SELECTOR PWM_CT16B0_CH0_IS_PIO0_11
#endif
/**
* @brief PWM_CT16B0_CH1 signal selector.
*/
#if !defined(LPC122x_PWM_CT16B0_CH1_SELECTOR) || defined(__DOXYGEN__)
#define LPC122x_PWM_CT16B0_CH1_SELECTOR PWM_CT16B0_CH1_IS_PIO0_12
#endif
/**
* @brief PWM_CT16B1_CH0 signal selector.
*/
#if !defined(LPC122x_PWM_CT16B1_CH0_SELECTOR) || defined(__DOXYGEN__)
#define LPC122x_PWM_CT16B1_CH0_SELECTOR PWM_CT16B1_CH0_IS_PIO0_15
#endif
/**
* @brief PWM_CT16B1_CH1 signal selector.
*/
#if !defined(LPC122x_PWM_CT16B1_CH1_SELECTOR) || defined(__DOXYGEN__)
#define LPC122x_PWM_CT16B1_CH1_SELECTOR PWM_CT16B1_CH1_IS_PIO0_16
#endif
/**
* @brief PWM_CT32B0_CH0 signal selector.
*/
#if !defined(LPC122x_PWM_CT32B0_CH0_SELECTOR) || defined(__DOXYGEN__)
#define LPC122x_PWM_CT32B0_CH0_SELECTOR PWM_CT32B0_CH0_IS_PIO0_1
#endif
/**
* @brief PWM_CT32B0_CH1 signal selector.
*/
#if !defined(LPC122x_PWM_CT32B0_CH1_SELECTOR) || defined(__DOXYGEN__)
#define LPC122x_PWM_CT32B0_CH1_SELECTOR PWM_CT32B0_CH1_IS_PIO0_2
#endif
/**
* @brief PWM_CT32B1_CH0 signal selector.
*/
#if !defined(LPC122x_PWM_CT32B1_CH0_SELECTOR) || defined(__DOXYGEN__)
#define LPC122x_PWM_CT32B1_CH0_SELECTOR PWM_CT32B1_CH0_IS_PIO0_6
#endif
/**
* @brief PWM_CT32B1_CH1 signal selector.
*/
#if !defined(LPC122x_PWM_CT32B1_CH1_SELECTOR) || defined(__DOXYGEN__)
#define LPC122x_PWM_CT32B1_CH1_SELECTOR PWM_CT32B1_CH1_IS_PIO0_7
#endif
/*===========================================================================*/
/* Configuration checks. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief PWM mode type.
*/
typedef uint32_t pwmmode_t;
/**
* @brief PWM channel type.
*/
typedef uint8_t pwmchannel_t;
/**
* @brief PWM counter type.
*/
typedef uint16_t pwmcnt_t;
/**
* @brief PWM driver channel configuration structure.
*/
typedef struct {
/**
* @brief Channel active logic level.
*/
pwmmode_t mode;
/**
* @brief Channel callback pointer.
* @note This callback is invoked on the channel compare event. If set to
* @p NULL then the callback is disabled.
*/
pwmcallback_t callback;
/* End of the mandatory fields.*/
} PWMChannelConfig;
/**
* @brief PWM driver configuration structure.
*/
typedef struct {
/**
* @brief Timer clock in Hz.
* @note The low level can use assertions in order to catch invalid
* frequency specifications.
*/
uint32_t frequency;
/**
* @brief PWM period in ticks.
* @note The low level can use assertions in order to catch invalid
* period specifications.
*/
pwmcnt_t period;
/**
* @brief Periodic callback pointer.
* @note This callback is invoked on PWM counter reset. If set to
* @p NULL then the callback is disabled.
*/
pwmcallback_t callback;
/**
* @brief Channels configurations.
*/
PWMChannelConfig channels[PWM_CHANNELS];
/* End of the mandatory fields.*/
} PWMConfig;
/**
* @brief Structure representing a PWM driver.
*/
struct PWMDriver {
/**
* @brief Driver state.
*/
pwmstate_t state;
/**
* @brief Current driver configuration data.
*/
const PWMConfig *config;
/**
* @brief Current PWM period in ticks.
*/
pwmcnt_t period;
#if defined(PWM_DRIVER_EXT_FIELDS)
PWM_DRIVER_EXT_FIELDS
#endif
/* End of the mandatory fields.*/
/**
* @brief Timer base clock.
*/
uint32_t clock;
/**
* @brief Pointer to the TIMx registers block.
*/
LPC_CTxxBx_Type *tim;
};
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/**
* @brief Changes the period the PWM peripheral.
* @details This function changes the period of a PWM unit that has already
* been activated using @p pwmStart().
* @pre The PWM unit must have been activated using @p pwmStart().
* @post The PWM unit period is changed to the new value.
* @note The function has effect at the next cycle start.
* @note If a period is specified that is shorter than the pulse width
* programmed in one of the channels then the behavior is not
* guaranteed.
*
* @param[in] pwmp pointer to a @p PWMDriver object
* @param[in] period new cycle time in ticks
*
* @notapi
*/
#define pwm_lld_change_period(pwmp, period) \
((pwmp)->tim->MR3 = (period))
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#if LPC122x_PWM_USE_CT16B0 && !defined(__DOXYGEN__)
extern PWMDriver PWMD1;
#endif
#if LPC122x_PWM_USE_CT16B1 && !defined(__DOXYGEN__)
extern PWMDriver PWMD2;
#endif
#if LPC122x_PWM_USE_CT32B0 && !defined(__DOXYGEN__)
extern PWMDriver PWMD3;
#endif
#if LPC122x_PWM_USE_CT32B1 && !defined(__DOXYGEN__)
extern PWMDriver PWMD4;
#endif
#ifdef __cplusplus
extern "C" {
#endif
void pwm_lld_init(void);
void pwm_lld_start(PWMDriver *pwmp);
void pwm_lld_stop(PWMDriver *pwmp);
void pwm_lld_enable_channel(PWMDriver *pwmp,
pwmchannel_t channel,
pwmcnt_t width);
void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel);
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_PWM */
#endif /* _PWM_LLD_H_ */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
LPC122x RTC driver - Copyright (C) 2013 Marcin Jokel
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
Concepts and parts of this file have been contributed by Uladzimir Pylinsky
aka barthess.
*/
/**
* @file LPC122x/rtc_lld.c
* @brief LPC122x RTC low level driver.
*
* @addtogroup RTC
* @{
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_RTC || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/**
* @brief RTC driver identifier.
*/
RTCDriver RTCD1;
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/**
* @brief RTC interrupt handler.
*
* @isr
*/
#if LPC122x_RTC_USE_ALARM || defined(__DOXYGEN__)
CH_IRQ_HANDLER(VectorB8) {
uint32_t flag;
CH_IRQ_PROLOGUE();
flag = LPC_RTC->RIS;
LPC_RTC->ICR = flag; /* Clear interrupt flag */
if ((flag & RIS_RTCRIS) && (RTCD1.callback != NULL))
RTCD1.callback(&RTCD1, RTC_EVENT_ALARM);
CH_IRQ_EPILOGUE();
}
#endif
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Enable access to registers.
*
* @api
*/
void rtc_lld_init(void) {
uint32_t temp[2];
if(LPC_SYSCON->SYSRESSTAT & 0x1) { /* POR detected */
LPC_SYSCON->SYSAHBCLKCTRL &= ~(1UL << 19); /* Disable clock for RTC */
LPC_PMU->SYSCFG &= ~(0x0FUL << 11); /* Clear RTC clock source */
LPC_SYSCON->RTCCLKDIV = LPC122x_RTC_CLKDIV;
LPC_PMU->SYSCFG |= (LPC122x_RTCCLK << 11); /* Set RTC clock source */
LPC_SYSCON->SYSAHBCLKCTRL |= (1UL << 19); /* Enable clock for RTC registers*/
LPC_RTC->ICR = 0x01; /* Clear interrupt flag */
LPC_RTC->CR= 1; /* Enable RTC start */
LPC_SYSCON->SYSRESSTAT = 0x1; /* Clear POR flag */
while(LPC_RTC->DR <3 ) { /* Wait, data read not valid */
__NOP();
}
}
else {
LPC_SYSCON->SYSAHBCLKCTRL |= (1UL << 19); /* Enable clock for RTC registers*/
do {
temp[0] = LPC_RTC->DR;
temp[1] = LPC_RTC->DR;
} while(temp[0] == temp[1]);
#if LPC122x_RTC_USE_ALARM
if (temp[1] >= LPC_RTC->MR) { /* Check for match event in software, handle if found */
CH_IRQ_HANDLER(VectorB8); /* Manually invoke ISR */
}
#endif
}
#if LPC122x_RTC_USE_ALARM
nvicEnableVector(RTC_IRQn, CORTEX_PRIORITY_MASK(LPC122x_RTC_IRQ_PRIORITY));
#endif
return;
}
/**
* @brief Set current time.
* @note Fractional part will be silently ignored. There is no possibility
* to set it on STM32 platform.
*
* @param[in] rtcp pointer to RTC driver structure
* @param[in] timespec pointer to a @p RTCTime structure
*
* @api
*/
void rtc_lld_set_time(RTCDriver *rtcp, const RTCTime *timespec) {
(void)rtcp;
LPC_RTC->LR = timespec->tv_sec;
}
/**
* @brief Get current time.
*
* @param[in] rtcp pointer to RTC driver structure
* @param[out] timespec pointer to a @p RTCTime structure
*
* @api
*/
void rtc_lld_get_time(RTCDriver *rtcp, RTCTime *timespec) {
(void)rtcp;
timespec->tv_sec = LPC_RTC->DR;
}
/**
* @brief Set alarm time.
*
* @note Default value after BKP domain reset for both comparators is 0.
* @note Function does not performs any checks of alarm time validity.
*
* @param[in] rtcp Pointer to RTC driver structure.
* @param[in] alarm Alarm identifier. Can be 1 or 2.
* @param[in] alarmspec Pointer to a @p RTCAlarm structure.
*
* @api
*/
void rtc_lld_set_alarm(RTCDriver *rtcp,
rtcalarm_t alarm,
const RTCAlarm *alarmspec) {
(void)rtcp;
(void)alarm;
LPC_RTC->MR = alarmspec->tv_sec;
}
/**
* @brief Get alarm time.
*
* @param[in] rtcp pointer to RTC driver structure
* @param[in] alarm alarm identifier
* @param[out] alarmspec pointer to a @p RTCAlarm structure
*
* @api
*/
void rtc_lld_get_alarm(RTCDriver *rtcp,
rtcalarm_t alarm,
RTCAlarm *alarmspec) {
(void)rtcp;
(void)alarm;
alarmspec->tv_sec = LPC_RTC->MR;
}
/**
* @brief Enables or disables RTC callbacks.
* @details This function enables or disables callbacks, use a @p NULL pointer
* in order to disable a callback.
*
* @param[in] rtcp pointer to RTC driver structure
* @param[in] callback callback function pointer or @p NULL
*
* @notapi
*/
void rtc_lld_set_callback(RTCDriver *rtcp, rtccb_t callback) {
LPC_RTC->ICR = 0x01; /* Clear interrupt flag */
if (callback != NULL) {
/* IRQ sources enabled only after setting up the callback.*/
rtcp->callback = callback;
LPC_RTC->ICSC = ICSC_RTCCIC; /* Enable RTC interrupt */
}
else {
LPC_RTC->ICSC = 0; /* Disable RTC interrupt */
/* Callback set to NULL only after disabling the IRQ sources.*/
rtcp->callback = NULL;
}
}
#include "chrtclib.h"
/**
* @brief Get current time in format suitable for usage in FatFS.
*
* @param[in] rtcp pointer to RTC driver structure
* @return FAT time value.
*
* @api
*/
uint32_t rtc_lld_get_time_fat(RTCDriver *rtcp) {
uint32_t fattime;
struct tm timp;
rtcGetTimeTm(rtcp, &timp);
fattime = (timp.tm_sec) >> 1;
fattime |= (timp.tm_min) << 5;
fattime |= (timp.tm_hour) << 11;
fattime |= (timp.tm_mday) << 16;
fattime |= (timp.tm_mon + 1) << 21;
fattime |= (timp.tm_year - 80) << 25;
return fattime;
}
#endif /* HAL_USE_RTC */
/** @} */

236
os/hal/platforms/LPC122x/rtc_lld.h Normal file
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@ -0,0 +1,236 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
LPC122x RTC driver - Copyright (C) 2013 Marcin Jokel
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
Concepts and parts of this file have been contributed by Uladzimir Pylinsky
aka barthess.
*/
/**
* @file LPC122x/rtc_lld.h
* @brief LPC122x RTC low level driver header.
*
* @addtogroup RTC
* @{
*/
#ifndef _RTC_LLD_H_
#define _RTC_LLD_H_
#if HAL_USE_RTC || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
#define CR_RTCSTART 1
#define ICSC_RTCCIC 1
#define RIS_RTCRIS 1
#define MIS_RTCMIS 1
#define ICR_RTCICR 1
/**
* @brief This RTC implementation supports callbacks.
*/
#define RTC_SUPPORTS_CALLBACKS TRUE
/**
* @brief One alarm comparator available.
*/
#define RTC_ALARMS 1
/**
* @brief RTC Clock source type
*/
#define SYSCFG_RTCCLK_1Hz 0 /* 1 Hz clock */
#define SYSCFG_RTCCLK_DEL_1Hz 1 /* delayed 1 Hz clock */
#define SYSCFG_RTCCLK_1kHz 10 /* 1 kHz clock */
#define SYSCFG_RTCCLK_PCLK 4 /* Main clock source divided by RTC */
/* clock divider */
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @name Configuration options
* @{
*/
/*
* RTC driver system settings.
*/
/**
* @brief RTC PCLK divider.
*/
#if !defined(LPC122x_RTC_CLKDIV) || defined(__DOXYGEN__)
#define LPC122x_RTC_CLKDIV 0
#endif
/**
* @brief RTC CLK Source
*/
#if !defined(LPC122x_RTCCLK) || defined(__DOXYGEN__)
#define LPC122x_RTCCLK SYSCFG_RTCCLK_1Hz
#endif
/**
* @brief RTC Alarm enable.
*/
#if !defined(LPC122x_RTC_USE_ALARM) || defined(__DOXYGEN__)
#define LPC122x_RTC_USE_ALARM FALSE
#endif
/**
* @brief RTC IRQ Priority.
*/
#if !defined(LPC122x_RTC_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define LPC122x_RTC_IRQ_PRIORITY 3
#endif
/** @} */
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if !(LPC122x_RTCCLK == SYSCFG_RTCCLK_1Hz) && \
!(LPC122x_RTCCLK == SYSCFG_RTCCLK_DEL_1Hz) && \
!(LPC122x_RTCCLK == SYSCFG_RTCCLK_1kHz) && \
!(LPC122x_RTCCLK == SYSCFG_RTCCLK_PCLK)
#error "Invalid source selected for RTC clock"
#endif
#if LPC122x_RTCCLK == SYSCFG_RTCCLK_1kHz
#error "1 kHz RTC clock not supported"
#endif
#if LPC122x_RTCCLK == SYSCFG_RTCCLK_PCLK
#if (LPC122x_MAINCLK/LPC122x_RTC_CLKDIV) != 1
#error "RTC clock is not 1 Hz"
#endif
#endif
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief Type of a structure representing an RTC alarm time stamp.
*/
typedef struct RTCAlarm RTCAlarm;
/**
* @brief Type of a structure representing an RTC wakeup period.
*/
typedef struct RTCWakeup RTCWakeup;
/**
* @brief Type of a structure representing an RTC callbacks config.
*/
typedef struct RTCCallbackConfig RTCCallbackConfig;
/**
* @brief Type of an RTC alarm.
* @details Meaningful on platforms with more than 1 alarm comparator.
*/
typedef uint32_t rtcalarm_t;
/**
* @brief Type of an RTC event.
*/
typedef enum {
RTC_EVENT_ALARM = 0 /** Triggered on alarm. */
} rtcevent_t;
/**
* @brief Type of a generic RTC callback.
*/
typedef void (*rtccb_t)(RTCDriver *rtcp, rtcevent_t event);
/**
* @brief Structure representing an RTC callbacks config.
*/
struct RTCCallbackConfig{
/**
* @brief Generic RTC callback pointer.
*/
rtccb_t callback;
};
/**
* @brief Structure representing an RTC time stamp.
*/
struct RTCTime {
/**
* @brief Seconds since UNIX epoch.
*/
uint32_t tv_sec;
};
/**
* @brief Structure representing an RTC alarm time stamp.
*/
struct RTCAlarm {
/**
* @brief Seconds since UNIX epoch.
*/
uint32_t tv_sec;
};
/**
* @brief Structure representing an RTC driver.
*/
struct RTCDriver{
/**
* @brief Callback pointer.
*/
rtccb_t callback;
};
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#if !defined(__DOXYGEN__)
extern RTCDriver RTCD1;
#endif
#ifdef __cplusplus
extern "C" {
#endif
void rtc_lld_init(void);
void rtc_lld_set_time(RTCDriver *rtcp, const RTCTime *timespec);
void rtc_lld_get_time(RTCDriver *rtcp, RTCTime *timespec);
void rtc_lld_set_alarm(RTCDriver *rtcp,
rtcalarm_t alarm,
const RTCAlarm *alarmspec);
void rtc_lld_get_alarm(RTCDriver *rtcp,
rtcalarm_t alarm,
RTCAlarm *alarmspec);
void rtc_lld_set_callback(RTCDriver *rtcp, rtccb_t callback);
uint32_t rtc_lld_get_time_fat(RTCDriver *rtcp);
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_RTC */
#endif /* _RTC_LLD_H_ */
/** @} */

14
os/various/chrtclib.c
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@ -35,7 +35,7 @@
#if (defined(STM32F4XX) || defined(STM32F2XX) || defined(STM32L1XX) || \
defined(STM32F1XX) || defined(STM32F10X_MD) || defined(STM32F10X_LD) || \
defined(STM32F10X_HD) || defined(__DOXYGEN__))
defined(STM32F10X_HD) || defined(LPC122X) || defined(__DOXYGEN__))
#if STM32_RTC_IS_CALENDAR
/**
* @brief Converts from STM32 BCD to canonicalized time format.
@ -250,7 +250,7 @@ uint64_t rtcGetTimeUnixUsec(RTCDriver *rtcp) {
* @api
*/
void rtcGetTimeTm(RTCDriver *rtcp, struct tm *timp) {
RTCTime timespec = {0,0};
RTCTime timespec = {0};
rtcGetTime(rtcp, &timespec);
localtime_r((time_t *)&(timespec.tv_sec), timp);
@ -265,10 +265,12 @@ void rtcGetTimeTm(RTCDriver *rtcp, struct tm *timp) {
* @api
*/
void rtcSetTimeTm(RTCDriver *rtcp, struct tm *timp) {
RTCTime timespec = {0,0};
RTCTime timespec = {0};
timespec.tv_sec = mktime(timp);
#if !defined(LPC122X)
timespec.tv_msec = 0;
#endif
rtcSetTime(rtcp, &timespec);
}
@ -281,7 +283,7 @@ void rtcSetTimeTm(RTCDriver *rtcp, struct tm *timp) {
* @api
*/
time_t rtcGetTimeUnixSec(RTCDriver *rtcp) {
RTCTime timespec = {0,0};
RTCTime timespec = {0};
rtcGetTime(rtcp, &timespec);
return timespec.tv_sec;
@ -297,10 +299,12 @@ time_t rtcGetTimeUnixSec(RTCDriver *rtcp) {
* @api
*/
void rtcSetTimeUnixSec(RTCDriver *rtcp, time_t tv_sec) {
RTCTime timespec = {0,0};
RTCTime timespec = {0};
timespec.tv_sec = tv_sec;
#if !defined(LPC122X)
timespec.tv_msec = 0;
#endif
rtcSetTime(rtcp, &timespec);
}

310
os/various/devices_lib/lcd/lcd3310.c Normal file
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@ -0,0 +1,310 @@
/*
Copyright (C) 2013 Marcin Jokel
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file lcd3310.c
* @brief Nokia 3310 LCD interface module through SPI code.
*
* @addtogroup lcd3310
* @{
*/
#include "ch.h"
#include "hal.h"
#include "lcd3310.h"
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
const uint8_t Fonts8x5 [][LCD3310_FONT_X_SIZE] =
{
{ 0x00, 0x00, 0x00, 0x00, 0x00 }, /* space */
{ 0x00, 0x00, 0x2f, 0x00, 0x00 }, /* ! */
{ 0x00, 0x07, 0x00, 0x07, 0x00 }, /* " */
{ 0x14, 0x7f, 0x14, 0x7f, 0x14 }, /* # */
{ 0x24, 0x2a, 0x7f, 0x2a, 0x12 }, /* $ */
{ 0xc4, 0xc8, 0x10, 0x26, 0x46 }, /* % */
{ 0x36, 0x49, 0x55, 0x22, 0x50 }, /* & */
{ 0x00, 0x05, 0x03, 0x00, 0x00 }, /* ' */
{ 0x00, 0x1c, 0x22, 0x41, 0x00 }, /* ( */
{ 0x00, 0x41, 0x22, 0x1c, 0x00 }, /* ) */
{ 0x14, 0x08, 0x3E, 0x08, 0x14 }, /* * */
{ 0x08, 0x08, 0x3E, 0x08, 0x08 }, /* + */
{ 0x00, 0x00, 0x50, 0x30, 0x00 }, /* , */
{ 0x10, 0x10, 0x10, 0x10, 0x10 }, /* - */
{ 0x00, 0x60, 0x60, 0x00, 0x00 }, /* . */
{ 0x20, 0x10, 0x08, 0x04, 0x02 }, /* / */
{ 0x3E, 0x51, 0x49, 0x45, 0x3E }, /* 0 */
{ 0x00, 0x42, 0x7F, 0x40, 0x00 }, /* 1 */
{ 0x42, 0x61, 0x51, 0x49, 0x46 }, /* 2 */
{ 0x21, 0x41, 0x45, 0x4B, 0x31 }, /* 3 */
{ 0x18, 0x14, 0x12, 0x7F, 0x10 }, /* 4 */
{ 0x27, 0x45, 0x45, 0x45, 0x39 }, /* 5 */
{ 0x3C, 0x4A, 0x49, 0x49, 0x30 }, /* 6 */
{ 0x01, 0x71, 0x09, 0x05, 0x03 }, /* 7 */
{ 0x36, 0x49, 0x49, 0x49, 0x36 }, /* 8 */
{ 0x06, 0x49, 0x49, 0x29, 0x1E }, /* 9 */
{ 0x00, 0x36, 0x36, 0x00, 0x00 }, /* : */
{ 0x00, 0x56, 0x36, 0x00, 0x00 }, /* ; */
{ 0x08, 0x14, 0x22, 0x41, 0x00 }, /* < */
{ 0x14, 0x14, 0x14, 0x14, 0x14 }, /* = */
{ 0x00, 0x41, 0x22, 0x14, 0x08 }, /* > */
{ 0x02, 0x01, 0x51, 0x09, 0x06 }, /* ? */
{ 0x32, 0x49, 0x59, 0x51, 0x3E }, /* @ */
{ 0x7E, 0x11, 0x11, 0x11, 0x7E }, /* A */
{ 0x7F, 0x49, 0x49, 0x49, 0x36 }, /* B */
{ 0x3E, 0x41, 0x41, 0x41, 0x22 }, /* C */
{ 0x7F, 0x41, 0x41, 0x22, 0x1C }, /* D */
{ 0x7F, 0x49, 0x49, 0x49, 0x41 }, /* E */
{ 0x7F, 0x09, 0x09, 0x09, 0x01 }, /* F */
{ 0x3E, 0x41, 0x49, 0x49, 0x7A }, /* G */
{ 0x7F, 0x08, 0x08, 0x08, 0x7F }, /* H */
{ 0x00, 0x41, 0x7F, 0x41, 0x00 }, /* I */
{ 0x20, 0x40, 0x41, 0x3F, 0x01 }, /* J */
{ 0x7F, 0x08, 0x14, 0x22, 0x41 }, /* K */
{ 0x7F, 0x40, 0x40, 0x40, 0x40 }, /* L */
{ 0x7F, 0x02, 0x0C, 0x02, 0x7F }, /* M */
{ 0x7F, 0x04, 0x08, 0x10, 0x7F }, /* N */
{ 0x3E, 0x41, 0x41, 0x41, 0x3E }, /* O */
{ 0x7F, 0x09, 0x09, 0x09, 0x06 }, /* P */
{ 0x3E, 0x41, 0x51, 0x21, 0x5E }, /* Q */
{ 0x7F, 0x09, 0x19, 0x29, 0x46 }, /* R */
{ 0x46, 0x49, 0x49, 0x49, 0x31 }, /* S */
{ 0x01, 0x01, 0x7F, 0x01, 0x01 }, /* T */
{ 0x3F, 0x40, 0x40, 0x40, 0x3F }, /* U */
{ 0x1F, 0x20, 0x40, 0x20, 0x1F }, /* V */
{ 0x3F, 0x40, 0x38, 0x40, 0x3F }, /* W */
{ 0x63, 0x14, 0x08, 0x14, 0x63 }, /* X */
{ 0x07, 0x08, 0x70, 0x08, 0x07 }, /* Y */
{ 0x61, 0x51, 0x49, 0x45, 0x43 }, /* Z */
{ 0x00, 0x7F, 0x41, 0x41, 0x00 }, /* [ */
{ 0x55, 0x2A, 0x55, 0x2A, 0x55 }, /* \ */
{ 0x00, 0x41, 0x41, 0x7F, 0x00 }, /* ] */
{ 0x04, 0x02, 0x01, 0x02, 0x04 }, /* ^ */
{ 0x40, 0x40, 0x40, 0x40, 0x40 }, /* _ */
{ 0x00, 0x01, 0x02, 0x04, 0x00 }, /* ' */
{ 0x20, 0x54, 0x54, 0x54, 0x78 }, /* a */
{ 0x7F, 0x48, 0x44, 0x44, 0x38 }, /* b */
{ 0x38, 0x44, 0x44, 0x44, 0x20 }, /* c */
{ 0x38, 0x44, 0x44, 0x48, 0x7F }, /* d */
{ 0x38, 0x54, 0x54, 0x54, 0x18 }, /* e */
{ 0x08, 0x7E, 0x09, 0x01, 0x02 }, /* f */
{ 0x0C, 0x52, 0x52, 0x52, 0x3E }, /* g */
{ 0x7F, 0x08, 0x04, 0x04, 0x78 }, /* h */
{ 0x00, 0x44, 0x7D, 0x40, 0x00 }, /* i */
{ 0x20, 0x40, 0x44, 0x3D, 0x00 }, /* j */
{ 0x7F, 0x10, 0x28, 0x44, 0x00 }, /* k */
{ 0x00, 0x41, 0x7F, 0x40, 0x00 }, /* l */
{ 0x7C, 0x04, 0x18, 0x04, 0x78 }, /* m */
{ 0x7C, 0x08, 0x04, 0x04, 0x78 }, /* n */
{ 0x38, 0x44, 0x44, 0x44, 0x38 }, /* o */
{ 0x7C, 0x14, 0x14, 0x14, 0x08 }, /* p */
{ 0x08, 0x14, 0x14, 0x18, 0x7C }, /* q */
{ 0x7C, 0x08, 0x04, 0x04, 0x08 }, /* r */
{ 0x48, 0x54, 0x54, 0x54, 0x20 }, /* s */
{ 0x04, 0x3F, 0x44, 0x40, 0x20 }, /* t */
{ 0x3C, 0x40, 0x40, 0x20, 0x7C }, /* u */
{ 0x1C, 0x20, 0x40, 0x20, 0x1C }, /* v */
{ 0x3C, 0x40, 0x30, 0x40, 0x3C }, /* w */
{ 0x44, 0x28, 0x10, 0x28, 0x44 }, /* x */
{ 0x0C, 0x50, 0x50, 0x50, 0x3C }, /* y */
{ 0x44, 0x64, 0x54, 0x4C, 0x44 }, /* z */
{ 0x00, 0x08, 0x36, 0x41, 0x00 }, /* { */
{ 0x00, 0x00, 0x7F, 0x00, 0x00 }, /* | */
{ 0x00, 0x41, 0x36, 0x08, 0x00 }, /* } */
};
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief LCD driver initialization.
* @pre The SPI interface must be initialized and the driver started.
*
* @param[in] spip pointer to the SPI interface
*
*/
void lcd3310Init(SPIDriver *spip) {
/* Reset LCD */
palClearPad(LCD3310_RES_PORT, LCD3310_RES_PIN);
chThdSleepMilliseconds(15);
palSetPad(LCD3310_RES_PORT, LCD3310_RES_PIN);
chThdSleepMilliseconds(15);
/* Send configuration commands to LCD */
lcd3310WriteByte(spip, 0x21, LCD3310_SEND_CMD); /* LCD extended commands */
lcd3310WriteByte(spip, 0xC8, LCD3310_SEND_CMD); /* Set LCD Vop (Contrast) */
lcd3310WriteByte(spip, 0x05, LCD3310_SEND_CMD); /* Set start line S6 to 1 TLS8204 */
lcd3310WriteByte(spip, 0x40, LCD3310_SEND_CMD); /* Set start line S[5:0] to 0x00 TLS8204 */
lcd3310WriteByte(spip, 0x12, LCD3310_SEND_CMD); /* LCD bias mode 1:68. */
lcd3310WriteByte(spip, 0x20, LCD3310_SEND_CMD); /* LCD standard Commands, horizontal addressing mode. */
lcd3310WriteByte(spip, 0x08, LCD3310_SEND_CMD); /* LCD blank */
lcd3310WriteByte(spip, 0x0C, LCD3310_SEND_CMD); /* LCD in normal mode. */
lcd3310Clear(spip); /* Clear LCD */
}
/**
* @brief Write byte to LCD driver.
* @pre The LCD driver must be initialized.
*
* @param[in] spip pointer to the SPI interface
* @param[in] data data to write
* @param[in] cd select between command or data
*/
void lcd3310WriteByte(SPIDriver *spip, uint8_t data, uint8_t cd) {
spiSelect(spip);
if(cd == LCD3310_SEND_DATA) {
palSetPad(LCD3310_DC_PORT, LCD3310_DC_PIN);
}
else {
palClearPad(LCD3310_DC_PORT, LCD3310_DC_PIN);
}
spiSend(spip, 1, &data); // change to normal spi send
spiUnselect(spip);
}
/**
* @brief Clear LCD
* @pre The LCD driver must be initialized.
*
* @param[in] spip pointer to the SPI interface
*/
void lcd3310Clear(SPIDriver *spip) { // ok
uint32_t i, j;
for (i = 0; i < LCD3310_Y_RES/LCD3310_FONT_Y_SIZE; i++) {
lcd3310SetPosXY(spip, 0, i);
for (j = 0; j < LCD3310_X_RES; j++)
lcd3310WriteByte(spip, 0x00, LCD3310_SEND_DATA);
}
}
/**
* @brief Set position
* @pre The LCD driver must be initialized.
*
* @param[in] spip pointer to the SPI interface
* @param[in] x column address in LCD DDRAM, 0 to 83
* @param[in] y page address in LCD DDRAM, 0 to 5
*/
void lcd3310SetPosXY(SPIDriver *spip, uint8_t x, uint8_t y) {
if (y > LCD3310_Y_RES/LCD3310_FONT_Y_SIZE) return;
if (x > LCD3310_X_RES) return;
lcd3310WriteByte(spip, 0x80 | x, LCD3310_SEND_CMD); /* Set x position */
lcd3310WriteByte(spip, 0x40 | y, LCD3310_SEND_CMD); /* Set y position */
}
/**
* @brief Write char
* @pre The LCD driver must be initialized.
*
* @param[in] spip pointer to the SPI interface
* @param[in] ch char
*/
void lcd3310WriteChar(SPIDriver *spip, uint8_t ch) {
uint8_t i;
for ( i = 0; i < LCD3310_FONT_X_SIZE; i++ ){
lcd3310WriteByte(spip, Fonts8x5[ch - 32][i], LCD3310_SEND_DATA);
}
}
/**
* @brief Set LCD contrast.
* @pre The LCD driver must be initialized.
*
* @param[in] spip pointer to the SPI interface
* @param[in] contrast LCD contrast value
*/
void lcd3310Contrast (SPIDriver *spip, uint8_t contrast) {
lcd3310WriteByte(spip, 0x21, LCD3310_SEND_CMD); /* LCD Extended Commands */
lcd3310WriteByte(spip, 0x80 | contrast, LCD3310_SEND_CMD); /* Set LCD Vop (Contrast) */
lcd3310WriteByte(spip, 0x20, LCD3310_SEND_CMD); /* LCD Standard Commands, horizontal addressing mode */
}
/**
* @brief Write text
* @pre The LCD driver must be initialized.
*
* @param[in] spip pointer to the SPI interface
* @param[in] strp pointer to text
*/
void lcd3310WriteText(SPIDriver *spip, const uint8_t * strp) {
while ( *strp ) {
lcd3310WriteChar(spip, *strp);
strp++;
}
}
/**
* @brief Rotate text
* @pre The LCD driver must be initialized.
*
* @param[in] spip pointer to the SPI interface
* @param[in] strp pointer to text
* @param[in] offset text offset
*/
void lcd3310RotateText(SPIDriver *spip, const uint8_t * strp, uint8_t offset) {
uint8_t i;
uint8_t n;
uint8_t m;
for(n = 0; strp[n] != '\0'; n++); /* Count number of char */
if (offset >= n)
return;
for (i = 0; i < LCD3310_X_RES/LCD3310_FONT_X_SIZE; i++) {
m = i + offset;
if ( m < n)
lcd3310WriteChar(spip, strp[m]);
else
lcd3310WriteChar(spip, strp[m - n]);
}
}
/** @} */

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/*
Copyright (C) 2013 Marcin Jokel
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file lcd3310.h
* @brief Nokia 3310 LCD interface module through SPI code.
*
* @addtogroup lcd3310
* @{
*/
#ifndef _LCD3310_H_
#define _LCD3310_H_
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
#define LCD3310_X_RES 84
#define LCD3310_Y_RES 48
#define LCD3310_FONT_X_SIZE 5
#define LCD3310_FONT_Y_SIZE 8
#define LCD3310_SEND_CMD 0
#define LCD3310_SEND_DATA 1
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if !defined(LCD3310_RES_PIN)
#error "LCD3310_RES_PIN not defined!!!"
#endif
#if !defined(LCD3310_RES_PORT)
#error "LCD3310_RES_PORT not defined!!!"
#endif
#if !defined(LCD3310_DC_PIN)
#error "LCD3310_DC_PIN not defined!!!"
#endif
#if!defined(LCD3310_DC_PORT)
#error "LCD3310_DC_PORT not defined!!!"
#endif
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#ifdef __cplusplus
extern "C" {
#endif
void lcd3310Init(SPIDriver *spip);
void lcd3310WriteByte(SPIDriver *spip, uint8_t data, uint8_t cd);
void lcd3310Contrast(SPIDriver *spip, uint8_t contrast);
void lcd3310Clear(SPIDriver *spip);
void lcd3310SetPosXY(SPIDriver *spip, uint8_t x, uint8_t y);
void lcd3310WriteChar (SPIDriver *spip, uint8_t ch);
void lcd3310WriteText(SPIDriver *spip, const uint8_t * strp);
void lcd3310RotateText(SPIDriver *spip, const uint8_t * strp, uint8_t offset);
#ifdef __cplusplus
}
#endif
#endif /* _LCD3310_H_ */
/** @} */

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##############################################################################
# Build global options
# NOTE: Can be overridden externally.
#
# Compiler options here.
ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
endif
# Enable this if you want the linker to remove unused code and data
ifeq ($(USE_LINK_GC),)
USE_LINK_GC = yes
endif
# If enabled, this option allows to compile the application in THUMB mode.
ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#
# Build global options
##############################################################################
##############################################################################
# Architecture or project specific options
#
#
# Architecture or project specific options
##############################################################################
##############################################################################
# Project, sources and paths
#
# Define project name here
PROJECT = ch
# Imported source files and paths
CHIBIOS = ../../..
include $(CHIBIOS)/boards/OLIMEX_LPC-P1227/board.mk
include $(CHIBIOS)/os/hal/platforms/LPC122x/platform.mk
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC122x/port.mk
include $(CHIBIOS)/os/kernel/kernel.mk
include $(CHIBIOS)/test/test.mk
# Define linker script file here
LDSCRIPT= $(PORTLD)/LPC1227.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CSRC = $(PORTSRC) \
$(KERNSRC) \
$(TESTSRC) \
$(HALSRC) \
$(PLATFORMSRC) \
$(BOARDSRC) \
$(CHIBIOS)/os/various/evtimer.c \
$(CHIBIOS)/os/various/syscalls.c \
main.c
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CPPSRC =
# C sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACSRC =
# C++ sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACPPSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCPPSRC =
# List ASM source files here
ASMSRC = $(PORTASM)
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
$(CHIBIOS)/os/various
#
# Project, sources and paths
##############################################################################
##############################################################################
# Compiler settings
#
MCU = cortex-m0
TRGT = arm-none-eabi-
CC = $(TRGT)gcc
CPPC = $(TRGT)g++
# Enable loading with g++ only if you need C++ runtime support.
# NOTE: You can use C++ even without C++ support if you are careful. C++
# runtime support makes code size explode.
LD = $(TRGT)gcc
#LD = $(TRGT)g++
CP = $(TRGT)objcopy
AS = $(TRGT)gcc -x assembler-with-cpp
OD = $(TRGT)objdump
HEX = $(CP) -O ihex
BIN = $(CP) -O binary
# ARM-specific options here
AOPT =
# THUMB-specific options here
TOPT = -mthumb -DTHUMB
# Define C warning options here
CWARN = -Wall -Wextra -Wstrict-prototypes
# Define C++ warning options here
CPPWARN = -Wall -Wextra
#
# Compiler settings
##############################################################################
##############################################################################
# Start of default section
#
# List all default C defines here, like -D_DEBUG=1
DDEFS = -DLPC1227 -D__NEWLIB__
# List all default ASM defines here, like -D_DEBUG=1
DADEFS =
# List all default directories to look for include files here
DINCDIR =
# List the default directory to look for the libraries here
DLIBDIR =
# List all default libraries here
DLIBS =
#
# End of default section
##############################################################################
##############################################################################
# Start of user section
#
# List all user C define here, like -D_DEBUG=1
UDEFS =
# Define ASM defines here
UADEFS =
# List all user directories here
UINCDIR =
# List the user directory to look for the libraries here
ULIBDIR =
# List all user libraries here
ULIBS =
#
# End of user defines
##############################################################################
include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/chconf.h
* @brief Configuration file template.
* @details A copy of this file must be placed in each project directory, it
* contains the application specific kernel settings.
*
* @addtogroup config
* @details Kernel related settings and hooks.
* @{
*/
#ifndef _CHCONF_H_
#define _CHCONF_H_
/*===========================================================================*/
/**
* @name Kernel parameters and options
* @{
*/
/*===========================================================================*/
/**
* @brief System tick frequency.
* @details Frequency of the system timer that drives the system ticks. This
* setting also defines the system tick time unit.
*/
#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
#define CH_FREQUENCY 1000
#endif
/**
* @brief Round robin interval.
* @details This constant is the number of system ticks allowed for the
* threads before preemption occurs. Setting this value to zero
* disables the preemption for threads with equal priority and the
* round robin becomes cooperative. Note that higher priority
* threads can still preempt, the kernel is always preemptive.
*
* @note Disabling the round robin preemption makes the kernel more compact
* and generally faster.
*/
#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
#define CH_TIME_QUANTUM 20
#endif
/**
* @brief Managed RAM size.
* @details Size of the RAM area to be managed by the OS. If set to zero
* then the whole available RAM is used. The core memory is made
* available to the heap allocator and/or can be used directly through
* the simplified core memory allocator.
*
* @note In order to let the OS manage the whole RAM the linker script must
* provide the @p __heap_base__ and @p __heap_end__ symbols.
* @note Requires @p CH_USE_MEMCORE.
*/
#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
#define CH_MEMCORE_SIZE 0
#endif
/**
* @brief Idle thread automatic spawn suppression.
* @details When this option is activated the function @p chSysInit()
* does not spawn the idle thread automatically. The application has
* then the responsibility to do one of the following:
* - Spawn a custom idle thread at priority @p IDLEPRIO.
* - Change the main() thread priority to @p IDLEPRIO then enter
* an endless loop. In this scenario the @p main() thread acts as
* the idle thread.
* .
* @note Unless an idle thread is spawned the @p main() thread must not
* enter a sleep state.
*/
#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)
#define CH_NO_IDLE_THREAD FALSE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Performance options
* @{
*/
/*===========================================================================*/
/**
* @brief OS optimization.
* @details If enabled then time efficient rather than space efficient code
* is used when two possible implementations exist.
*
* @note This is not related to the compiler optimization options.
* @note The default is @p TRUE.
*/
#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
#define CH_OPTIMIZE_SPEED TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Subsystem options
* @{
*/
/*===========================================================================*/
/**
* @brief Threads registry APIs.
* @details If enabled then the registry APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
#define CH_USE_REGISTRY TRUE
#endif
/**
* @brief Threads synchronization APIs.
* @details If enabled then the @p chThdWait() function is included in
* the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
#define CH_USE_WAITEXIT TRUE
#endif
/**
* @brief Semaphores APIs.
* @details If enabled then the Semaphores APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES TRUE
#endif
/**
* @brief Semaphores queuing mode.
* @details If enabled then the threads are enqueued on semaphores by
* priority rather than in FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES_PRIORITY FALSE
#endif
/**
* @brief Atomic semaphore API.
* @details If enabled then the semaphores the @p chSemSignalWait() API
* is included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
#define CH_USE_SEMSW TRUE
#endif
/**
* @brief Mutexes APIs.
* @details If enabled then the mutexes APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
#define CH_USE_MUTEXES TRUE
#endif
/**
* @brief Conditional Variables APIs.
* @details If enabled then the conditional variables APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MUTEXES.
*/
#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS TRUE
#endif
/**
* @brief Conditional Variables APIs with timeout.
* @details If enabled then the conditional variables APIs with timeout
* specification are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_CONDVARS.
*/
#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS_TIMEOUT TRUE
#endif
/**
* @brief Events Flags APIs.
* @details If enabled then the event flags APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
#define CH_USE_EVENTS TRUE
#endif
/**
* @brief Events Flags APIs with timeout.
* @details If enabled then the events APIs with timeout specification
* are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_EVENTS.
*/
#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_EVENTS_TIMEOUT TRUE
#endif
/**
* @brief Synchronous Messages APIs.
* @details If enabled then the synchronous messages APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES TRUE
#endif
/**
* @brief Synchronous Messages queuing mode.
* @details If enabled then messages are served by priority rather than in
* FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_MESSAGES.
*/
#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES_PRIORITY FALSE
#endif
/**
* @brief Mailboxes APIs.
* @details If enabled then the asynchronous messages (mailboxes) APIs are
* included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
#define CH_USE_MAILBOXES TRUE
#endif
/**
* @brief I/O Queues APIs.
* @details If enabled then the I/O queues APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
#define CH_USE_QUEUES TRUE
#endif
/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
#define CH_USE_MEMCORE TRUE
#endif
/**
* @brief Heap Allocator APIs.
* @details If enabled then the memory heap allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or
* @p CH_USE_SEMAPHORES.
* @note Mutexes are recommended.
*/
#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
#define CH_USE_HEAP TRUE
#endif
/**
* @brief C-runtime allocator.
* @details If enabled the the heap allocator APIs just wrap the C-runtime
* @p malloc() and @p free() functions.
*
* @note The default is @p FALSE.
* @note Requires @p CH_USE_HEAP.
* @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the
* appropriate documentation.
*/
#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
#define CH_USE_MALLOC_HEAP FALSE
#endif
/**
* @brief Memory Pools Allocator APIs.
* @details If enabled then the memory pools allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
#define CH_USE_MEMPOOLS TRUE
#endif
/**
* @brief Dynamic Threads APIs.
* @details If enabled then the dynamic threads creation APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_WAITEXIT.
* @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
*/
#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
#define CH_USE_DYNAMIC TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Debug options
* @{
*/
/*===========================================================================*/
/**
* @brief Debug option, system state check.
* @details If enabled the correct call protocol for system APIs is checked
* at runtime.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
#endif
/**
* @brief Debug option, parameters checks.
* @details If enabled then the checks on the API functions input
* parameters are activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_CHECKS FALSE
#endif
/**
* @brief Debug option, consistency checks.
* @details If enabled then all the assertions in the kernel code are
* activated. This includes consistency checks inside the kernel,
* runtime anomalies and port-defined checks.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_ASSERTS FALSE
#endif
/**
* @brief Debug option, trace buffer.
* @details If enabled then the context switch circular trace buffer is
* activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_TRACE FALSE
#endif
/**
* @brief Debug option, stack checks.
* @details If enabled then a runtime stack check is performed.
*
* @note The default is @p FALSE.
* @note The stack check is performed in a architecture/port dependent way.
* It may not be implemented or some ports.
* @note The default failure mode is to halt the system with the global
* @p panic_msg variable set to @p NULL.
*/
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_STACK_CHECK FALSE
#endif
/**
* @brief Debug option, stacks initialization.
* @details If enabled then the threads working area is filled with a byte
* value when a thread is created. This can be useful for the
* runtime measurement of the used stack.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
#define CH_DBG_FILL_THREADS FALSE
#endif
/**
* @brief Debug option, threads profiling.
* @details If enabled then a field is added to the @p Thread structure that
* counts the system ticks occurred while executing the thread.
*
* @note The default is @p TRUE.
* @note This debug option is defaulted to TRUE because it is required by
* some test cases into the test suite.
*/
#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
#define CH_DBG_THREADS_PROFILING TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Kernel hooks
* @{
*/
/*===========================================================================*/
/**
* @brief Threads descriptor structure extension.
* @details User fields added to the end of the @p Thread structure.
*/
#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
#define THREAD_EXT_FIELDS \
/* Add threads custom fields here.*/
#endif
/**
* @brief Threads initialization hook.
* @details User initialization code added to the @p chThdInit() API.
*
* @note It is invoked from within @p chThdInit() and implicitly from all
* the threads creation APIs.
*/
#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_INIT_HOOK(tp) { \
/* Add threads initialization code here.*/ \
}
#endif
/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
*
* @note It is inserted into lock zone.
* @note It is also invoked when the threads simply return in order to
* terminate.
*/
#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_EXIT_HOOK(tp) { \
/* Add threads finalization code here.*/ \
}
#endif
/**
* @brief Context switch hook.
* @details This hook is invoked just before switching between threads.
*/
#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)
#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \
/* System halt code here.*/ \
}
#endif
/**
* @brief Idle Loop hook.
* @details This hook is continuously invoked by the idle thread loop.
*/
#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
#define IDLE_LOOP_HOOK() { \
/* Idle loop code here.*/ \
}
#endif
/**
* @brief System tick event hook.
* @details This hook is invoked in the system tick handler immediately
* after processing the virtual timers queue.
*/
#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_TICK_EVENT_HOOK() { \
/* System tick event code here.*/ \
}
#endif
/**
* @brief System halt hook.
* @details This hook is invoked in case to a system halting error before
* the system is halted.
*/
#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_HALT_HOOK() { \
/* System halt code here.*/ \
}
#endif
/** @} */
/*===========================================================================*/
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
#endif /* _CHCONF_H_ */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/halconf.h
* @brief HAL configuration header.
* @details HAL configuration file, this file allows to enable or disable the
* various device drivers from your application. You may also use
* this file in order to override the device drivers default settings.
*
* @addtogroup HAL_CONF
* @{
*/
#ifndef _HALCONF_H_
#define _HALCONF_H_
#include "mcuconf.h"
/**
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM FALSE
#endif
/**
* @brief Enables the PAL subsystem.
*/
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
#define HAL_USE_PAL TRUE
#endif
/**
* @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
#define HAL_USE_ADC FALSE
#endif
/**
* @brief Enables the CAN subsystem.
*/
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT TRUE
#endif
/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
#define HAL_USE_GPT TRUE
#endif
/**
* @brief Enables the I2C subsystem.
*/
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
#define HAL_USE_I2C FALSE
#endif
/**
* @brief Enables the ICU subsystem.
*/
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
#define HAL_USE_ICU FALSE
#endif
/**
* @brief Enables the MAC subsystem.
*/
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
#define HAL_USE_MAC FALSE
#endif
/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define HAL_USE_MMC_SPI FALSE
#endif
/**
* @brief Enables the PWM subsystem.
*/
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
#define HAL_USE_SDC FALSE
#endif
/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL TRUE
#endif
/**
* @brief Enables the SERIAL over USB subsystem.
*/
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL_USB FALSE
#endif
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
#define HAL_USE_SPI FALSE
#endif
/**
* @brief Enables the UART subsystem.
*/
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
#define HAL_USE_UART FALSE
#endif
/**
* @brief Enables the USB subsystem.
*/
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
#define HAL_USE_USB FALSE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
#define ADC_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define ADC_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/
/**
* @brief Sleep mode related APIs inclusion switch.
*/
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
#define CAN_USE_SLEEP_MODE TRUE
#endif
/*===========================================================================*/
/* I2C driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the mutual exclusion APIs on the I2C bus.
*/
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define I2C_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
#define MAC_USE_ZERO_COPY FALSE
#endif
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
* This option is recommended also if the SPI driver does not
* use a DMA channel and heavily loads the CPU.
*/
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
#define MMC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intervals.
*/
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
#define SDC_INIT_RETRY 100
#endif
/**
* @brief Include support for MMC cards.
* @note MMC support is not yet implemented so this option must be kept
* at @p FALSE.
*/
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
#define SDC_MMC_SUPPORT FALSE
#endif
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
*/
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
#define SDC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
/**
* @brief Default bit rate.
* @details Configuration parameter, this is the baud rate selected for the
* default configuration.
*/
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
#define SERIAL_DEFAULT_BITRATE 38400
#endif
/**
* @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application.
* @note The default is 64 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 16
#endif
/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
#define SPI_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
#endif /* _HALCONF_H_ */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
static void led1off(void *arg) {
(void)arg;
palSetPad(GPIO1, GPIO1_LED1);
}
/* Triggered when the button is pressed or released. The LED1 is set to ON.*/
static void ext2cb12(EXTDriver *extp, expchannel_t channel) {
static VirtualTimer vt4;
(void)extp;
(void)channel;
palClearPad(GPIO1, GPIO1_LED1);
chSysLockFromIsr();
if (chVTIsArmedI(&vt4))
chVTResetI(&vt4);
/* LED1 set to OFF after 200mS.*/
chVTSetI(&vt4, MS2ST(200), led1off, NULL);
chSysUnlockFromIsr();
}
static const EXTConfig extcfg = {
{
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, ext2cb12},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL}
}
};
/*
* Application entry point.
*/
int main(void) {
/*
* System initializations.
* - HAL initialization, this also initializes the configured device drivers
* and performs the board-specific initializations.
* - Kernel initialization, the main() function becomes a thread and the
* RTOS is active.
*/
halInit();
chSysInit();
/*
* Activates the EXT driver 1.
*/
extStart(&EXTD2, &extcfg);
/*
* Normal main() thread activity, in this demo it enables and disables the
* button EXT channel using 5 seconds intervals.
*/
while (TRUE) {
chThdSleepMilliseconds(5000);
extChannelDisable(&EXTD2, GPIO2_SW_USER1);
chThdSleepMilliseconds(5000);
extChannelEnable(&EXTD2, GPIO2_SW_USER1);
}
}

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* LPC1227 drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the driver
* is enabled in halconf.h.
*
* IRQ priorities:
* 3...0 Lowest...highest.
*/
/*
* HAL driver system settings.
*/
#define LPC122x_PLLCLK_SOURCE SYSPLLCLKSEL_SYSOSC
#define LPC122x_SYSPLL_MUL 3
#define LPC122x_SYSPLL_DIV 8
#define LPC122x_MAINCLK_SOURCE SYSMAINCLKSEL_PLLOUT
#define LPC122x_SYSABHCLK_DIV 1
/*
* GPT driver system settings.
*/
#define LPC122x_GPT_USE_CT16B0 TRUE
#define LPC122x_GPT_USE_CT16B1 TRUE
#define LPC122x_GPT_USE_CT32B0 TRUE
#define LPC122x_GPT_USE_CT32B1 TRUE
#define LPC122x_GPT_CT16B0_IRQ_PRIORITY 2
#define LPC122x_GPT_CT16B1_IRQ_PRIORITY 2
#define LPC122x_GPT_CT32B0_IRQ_PRIORITY 2
#define LPC122x_GPT_CT32B1_IRQ_PRIORITY 2
/*
* SERIAL driver system settings.
*/
#define LPC122x_SERIAL_USE_UART0 TRUE
#define LPC122x_SERIAL_FIFO_PRELOAD 16
#define LPC122x_SERIAL_UART0CLKDIV 1
#define LPC122x_SERIAL_UART0_IRQ_PRIORITY 3
#define LPC122x_SERIAL_TXD0_SELECTOR TXD0_IS_PIO0_2
#define LPC122x_SERIAL_RXD0_SELECTOR RXD0_IS_PIO0_1
#define LPC122x_SERIAL_USE_UART1 FALSE
#define LPC122x_SERIAL_FIFO_PRELOAD 16
#define LPC122x_SERIAL_UART1CLKDIV 1
#define LPC122x_SERIAL_UART1_IRQ_PRIORITY 3
#define LPC122x_SERIAL_RXD1_SELECTOR RXD1_IS_PIO0_8
#define LPC122x_SERIAL_TXD1_SELECTOR TXD1_IS_PIO0_9
/*
* SPI driver system settings.
*/
#define LPC122x_SPI_USE_SSP0 TRUE
#define LPC122x_SPI_SSP0CLKDIV 1
#define LPC122x_SPI_SSP0_IRQ_PRIORITY 1
#define LPC122x_SPI_SSP_ERROR_HOOK(spip) chSysHalt()
/*
* EXT driver system settings.
*/
#define LPC122x_EXT_USE_EXT0 FALSE
#define LPC122x_EXT_USE_EXT1 FALSE
#define LPC122x_EXT_USE_EXT2 TRUE
#define LPC122x_EXT_EXTI0_IRQ_PRIORITY 3
#define LPC122x_EXT_EXTI1_IRQ_PRIORITY 3
#define LPC122x_EXT_EXTI2_IRQ_PRIORITY 3
/*
* RTC driver system settings.
*/
#define LPC122x_RTCCLK SYSCFG_RTCCLK_1Hz
#define LPC122x_RTC_CLKDIV 0
#define LPC122x_RTC_USE_ALARM TRUE
#define LPC122x_RTC_IRQ_PRIORITY 3
/*
* PWM driver system settings.
*/
#define LPC122x_PWM_USE_CT16B0 FALSE
#define LPC122x_PWM_USE_CT16B1 TRUE
#define LPC122x_PWM_USE_CT32B0 FALSE
#define LPC122x_PWM_USE_CT32B1 FALSE
#define LPC122x_PWM_USE_CT16B0_CH0 FALSE
#define LPC122x_PWM_USE_CT16B0_CH1 FALSE
#define LPC122x_PWM_USE_CT16B1_CH0 TRUE
#define LPC122x_PWM_USE_CT16B1_CH1 TRUE
#define LPC122x_PWM_USE_CT32B0_CH0 FALSE
#define LPC122x_PWM_USE_CT32B0_CH1 FALSE
#define LPC122x_PWM_USE_CT32B1_CH0 FALSE
#define LPC122x_PWM_USE_CT32B1_CH1 FALSE
#define LPC122x_PWM_CT16B0_IRQ_PRIORITY 3
#define LPC122x_PWM_CT16B1_IRQ_PRIORITY 3
#define LPC122x_PWM_CT32B0_IRQ_PRIORITY 3
#define LPC122x_PWM_CT32B1_IRQ_PRIORITY 3
#define LPC122x_PWM_CT16B0_CH0_SELECTOR PWM_CT16B0_CH0_IS_PIO0_28
#define LPC122x_PWM_CT16B0_CH1_SELECTOR PWM_CT16B0_CH1_IS_PIO0_29
#define LPC122x_PWM_CT16B1_CH0_SELECTOR PWM_CT16B1_CH0_IS_PIO1_5
#define LPC122x_PWM_CT16B1_CH1_SELECTOR PWM_CT16B1_CH1_IS_PIO1_6
#define LPC122x_PWM_CT32B0_CH0_SELECTOR PWM_CT32B0_CH0_IS_PIO2_4
#define LPC122x_PWM_CT32B0_CH1_SELECTOR PWM_CT32B0_CH1_IS_PIO0_2
#define LPC122x_PWM_CT32B1_CH0_SELECTOR PWM_CT32B1_CH0_IS_PIO0_6
#define LPC122x_PWM_CT32B1_CH1_SELECTOR PWM_CT32B1_CH1_IS_PIO0_7
/*
* I2C driver system settings.
*/
#define LPC122x_I2C_IRQ_PRIORITY 3

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##############################################################################
# Build global options
# NOTE: Can be overridden externally.
#
# Compiler options here.
ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
endif
# Enable this if you want the linker to remove unused code and data
ifeq ($(USE_LINK_GC),)
USE_LINK_GC = yes
endif
# If enabled, this option allows to compile the application in THUMB mode.
ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#
# Build global options
##############################################################################
##############################################################################
# Architecture or project specific options
#
#
# Architecture or project specific options
##############################################################################
##############################################################################
# Project, sources and paths
#
# Define project name here
PROJECT = ch
# Imported source files and paths
CHIBIOS = ../../..
include $(CHIBIOS)/boards/OLIMEX_LPC-P1227/board.mk
include $(CHIBIOS)/os/hal/platforms/LPC122x/platform.mk
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC122x/port.mk
include $(CHIBIOS)/os/kernel/kernel.mk
include $(CHIBIOS)/test/test.mk
# Define linker script file here
LDSCRIPT= $(PORTLD)/LPC1227.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CSRC = $(PORTSRC) \
$(KERNSRC) \
$(TESTSRC) \
$(HALSRC) \
$(PLATFORMSRC) \
$(BOARDSRC) \
$(CHIBIOS)/os/various/evtimer.c \
$(CHIBIOS)/os/various/syscalls.c \
main.c
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CPPSRC =
# C sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACSRC =
# C++ sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACPPSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCPPSRC =
# List ASM source files here
ASMSRC = $(PORTASM)
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
$(CHIBIOS)/os/various
#
# Project, sources and paths
##############################################################################
##############################################################################
# Compiler settings
#
MCU = cortex-m0
TRGT = arm-none-eabi-
CC = $(TRGT)gcc
CPPC = $(TRGT)g++
# Enable loading with g++ only if you need C++ runtime support.
# NOTE: You can use C++ even without C++ support if you are careful. C++
# runtime support makes code size explode.
LD = $(TRGT)gcc
#LD = $(TRGT)g++
CP = $(TRGT)objcopy
AS = $(TRGT)gcc -x assembler-with-cpp
OD = $(TRGT)objdump
HEX = $(CP) -O ihex
BIN = $(CP) -O binary
# ARM-specific options here
AOPT =
# THUMB-specific options here
TOPT = -mthumb -DTHUMB
# Define C warning options here
CWARN = -Wall -Wextra -Wstrict-prototypes
# Define C++ warning options here
CPPWARN = -Wall -Wextra
#
# Compiler settings
##############################################################################
##############################################################################
# Start of default section
#
# List all default C defines here, like -D_DEBUG=1
DDEFS = -DLPC1227 -D__NEWLIB__
# List all default ASM defines here, like -D_DEBUG=1
DADEFS =
# List all default directories to look for include files here
DINCDIR =
# List the default directory to look for the libraries here
DLIBDIR =
# List all default libraries here
DLIBS =
#
# End of default section
##############################################################################
##############################################################################
# Start of user section
#
# List all user C define here, like -D_DEBUG=1
UDEFS =
# Define ASM defines here
UADEFS =
# List all user directories here
UINCDIR =
# List the user directory to look for the libraries here
ULIBDIR =
# List all user libraries here
ULIBS =
#
# End of user defines
##############################################################################
include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/chconf.h
* @brief Configuration file template.
* @details A copy of this file must be placed in each project directory, it
* contains the application specific kernel settings.
*
* @addtogroup config
* @details Kernel related settings and hooks.
* @{
*/
#ifndef _CHCONF_H_
#define _CHCONF_H_
/*===========================================================================*/
/**
* @name Kernel parameters and options
* @{
*/
/*===========================================================================*/
/**
* @brief System tick frequency.
* @details Frequency of the system timer that drives the system ticks. This
* setting also defines the system tick time unit.
*/
#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
#define CH_FREQUENCY 1000
#endif
/**
* @brief Round robin interval.
* @details This constant is the number of system ticks allowed for the
* threads before preemption occurs. Setting this value to zero
* disables the preemption for threads with equal priority and the
* round robin becomes cooperative. Note that higher priority
* threads can still preempt, the kernel is always preemptive.
*
* @note Disabling the round robin preemption makes the kernel more compact
* and generally faster.
*/
#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
#define CH_TIME_QUANTUM 20
#endif
/**
* @brief Managed RAM size.
* @details Size of the RAM area to be managed by the OS. If set to zero
* then the whole available RAM is used. The core memory is made
* available to the heap allocator and/or can be used directly through
* the simplified core memory allocator.
*
* @note In order to let the OS manage the whole RAM the linker script must
* provide the @p __heap_base__ and @p __heap_end__ symbols.
* @note Requires @p CH_USE_MEMCORE.
*/
#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
#define CH_MEMCORE_SIZE 0
#endif
/**
* @brief Idle thread automatic spawn suppression.
* @details When this option is activated the function @p chSysInit()
* does not spawn the idle thread automatically. The application has
* then the responsibility to do one of the following:
* - Spawn a custom idle thread at priority @p IDLEPRIO.
* - Change the main() thread priority to @p IDLEPRIO then enter
* an endless loop. In this scenario the @p main() thread acts as
* the idle thread.
* .
* @note Unless an idle thread is spawned the @p main() thread must not
* enter a sleep state.
*/
#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)
#define CH_NO_IDLE_THREAD FALSE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Performance options
* @{
*/
/*===========================================================================*/
/**
* @brief OS optimization.
* @details If enabled then time efficient rather than space efficient code
* is used when two possible implementations exist.
*
* @note This is not related to the compiler optimization options.
* @note The default is @p TRUE.
*/
#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
#define CH_OPTIMIZE_SPEED TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Subsystem options
* @{
*/
/*===========================================================================*/
/**
* @brief Threads registry APIs.
* @details If enabled then the registry APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
#define CH_USE_REGISTRY TRUE
#endif
/**
* @brief Threads synchronization APIs.
* @details If enabled then the @p chThdWait() function is included in
* the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
#define CH_USE_WAITEXIT TRUE
#endif
/**
* @brief Semaphores APIs.
* @details If enabled then the Semaphores APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES TRUE
#endif
/**
* @brief Semaphores queuing mode.
* @details If enabled then the threads are enqueued on semaphores by
* priority rather than in FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES_PRIORITY FALSE
#endif
/**
* @brief Atomic semaphore API.
* @details If enabled then the semaphores the @p chSemSignalWait() API
* is included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
#define CH_USE_SEMSW TRUE
#endif
/**
* @brief Mutexes APIs.
* @details If enabled then the mutexes APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
#define CH_USE_MUTEXES TRUE
#endif
/**
* @brief Conditional Variables APIs.
* @details If enabled then the conditional variables APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MUTEXES.
*/
#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS TRUE
#endif
/**
* @brief Conditional Variables APIs with timeout.
* @details If enabled then the conditional variables APIs with timeout
* specification are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_CONDVARS.
*/
#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS_TIMEOUT TRUE
#endif
/**
* @brief Events Flags APIs.
* @details If enabled then the event flags APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
#define CH_USE_EVENTS TRUE
#endif
/**
* @brief Events Flags APIs with timeout.
* @details If enabled then the events APIs with timeout specification
* are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_EVENTS.
*/
#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_EVENTS_TIMEOUT TRUE
#endif
/**
* @brief Synchronous Messages APIs.
* @details If enabled then the synchronous messages APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES TRUE
#endif
/**
* @brief Synchronous Messages queuing mode.
* @details If enabled then messages are served by priority rather than in
* FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_MESSAGES.
*/
#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES_PRIORITY FALSE
#endif
/**
* @brief Mailboxes APIs.
* @details If enabled then the asynchronous messages (mailboxes) APIs are
* included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
#define CH_USE_MAILBOXES TRUE
#endif
/**
* @brief I/O Queues APIs.
* @details If enabled then the I/O queues APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
#define CH_USE_QUEUES TRUE
#endif
/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
#define CH_USE_MEMCORE TRUE
#endif
/**
* @brief Heap Allocator APIs.
* @details If enabled then the memory heap allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or
* @p CH_USE_SEMAPHORES.
* @note Mutexes are recommended.
*/
#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
#define CH_USE_HEAP TRUE
#endif
/**
* @brief C-runtime allocator.
* @details If enabled the the heap allocator APIs just wrap the C-runtime
* @p malloc() and @p free() functions.
*
* @note The default is @p FALSE.
* @note Requires @p CH_USE_HEAP.
* @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the
* appropriate documentation.
*/
#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
#define CH_USE_MALLOC_HEAP FALSE
#endif
/**
* @brief Memory Pools Allocator APIs.
* @details If enabled then the memory pools allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
#define CH_USE_MEMPOOLS TRUE
#endif
/**
* @brief Dynamic Threads APIs.
* @details If enabled then the dynamic threads creation APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_WAITEXIT.
* @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
*/
#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
#define CH_USE_DYNAMIC TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Debug options
* @{
*/
/*===========================================================================*/
/**
* @brief Debug option, system state check.
* @details If enabled the correct call protocol for system APIs is checked
* at runtime.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
#endif
/**
* @brief Debug option, parameters checks.
* @details If enabled then the checks on the API functions input
* parameters are activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_CHECKS FALSE
#endif
/**
* @brief Debug option, consistency checks.
* @details If enabled then all the assertions in the kernel code are
* activated. This includes consistency checks inside the kernel,
* runtime anomalies and port-defined checks.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_ASSERTS FALSE
#endif
/**
* @brief Debug option, trace buffer.
* @details If enabled then the context switch circular trace buffer is
* activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_TRACE FALSE
#endif
/**
* @brief Debug option, stack checks.
* @details If enabled then a runtime stack check is performed.
*
* @note The default is @p FALSE.
* @note The stack check is performed in a architecture/port dependent way.
* It may not be implemented or some ports.
* @note The default failure mode is to halt the system with the global
* @p panic_msg variable set to @p NULL.
*/
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_STACK_CHECK FALSE
#endif
/**
* @brief Debug option, stacks initialization.
* @details If enabled then the threads working area is filled with a byte
* value when a thread is created. This can be useful for the
* runtime measurement of the used stack.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
#define CH_DBG_FILL_THREADS FALSE
#endif
/**
* @brief Debug option, threads profiling.
* @details If enabled then a field is added to the @p Thread structure that
* counts the system ticks occurred while executing the thread.
*
* @note The default is @p TRUE.
* @note This debug option is defaulted to TRUE because it is required by
* some test cases into the test suite.
*/
#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
#define CH_DBG_THREADS_PROFILING TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Kernel hooks
* @{
*/
/*===========================================================================*/
/**
* @brief Threads descriptor structure extension.
* @details User fields added to the end of the @p Thread structure.
*/
#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
#define THREAD_EXT_FIELDS \
/* Add threads custom fields here.*/
#endif
/**
* @brief Threads initialization hook.
* @details User initialization code added to the @p chThdInit() API.
*
* @note It is invoked from within @p chThdInit() and implicitly from all
* the threads creation APIs.
*/
#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_INIT_HOOK(tp) { \
/* Add threads initialization code here.*/ \
}
#endif
/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
*
* @note It is inserted into lock zone.
* @note It is also invoked when the threads simply return in order to
* terminate.
*/
#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_EXIT_HOOK(tp) { \
/* Add threads finalization code here.*/ \
}
#endif
/**
* @brief Context switch hook.
* @details This hook is invoked just before switching between threads.
*/
#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)
#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \
/* System halt code here.*/ \
}
#endif
/**
* @brief Idle Loop hook.
* @details This hook is continuously invoked by the idle thread loop.
*/
#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
#define IDLE_LOOP_HOOK() { \
/* Idle loop code here.*/ \
}
#endif
/**
* @brief System tick event hook.
* @details This hook is invoked in the system tick handler immediately
* after processing the virtual timers queue.
*/
#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_TICK_EVENT_HOOK() { \
/* System tick event code here.*/ \
}
#endif
/**
* @brief System halt hook.
* @details This hook is invoked in case to a system halting error before
* the system is halted.
*/
#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_HALT_HOOK() { \
/* System halt code here.*/ \
}
#endif
/** @} */
/*===========================================================================*/
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
#endif /* _CHCONF_H_ */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/halconf.h
* @brief HAL configuration header.
* @details HAL configuration file, this file allows to enable or disable the
* various device drivers from your application. You may also use
* this file in order to override the device drivers default settings.
*
* @addtogroup HAL_CONF
* @{
*/
#ifndef _HALCONF_H_
#define _HALCONF_H_
#include "mcuconf.h"
/**
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM FALSE
#endif
/**
* @brief Enables the PAL subsystem.
*/
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
#define HAL_USE_PAL TRUE
#endif
/**
* @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
#define HAL_USE_ADC FALSE
#endif
/**
* @brief Enables the CAN subsystem.
*/
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
#define HAL_USE_GPT FALSE
#endif
/**
* @brief Enables the I2C subsystem.
*/
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
#define HAL_USE_I2C FALSE
#endif
/**
* @brief Enables the ICU subsystem.
*/
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
#define HAL_USE_ICU FALSE
#endif
/**
* @brief Enables the MAC subsystem.
*/
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
#define HAL_USE_MAC FALSE
#endif
/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define HAL_USE_MMC_SPI FALSE
#endif
/**
* @brief Enables the PWM subsystem.
*/
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
#define HAL_USE_PWM TRUE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
#define HAL_USE_SDC FALSE
#endif
/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL TRUE
#endif
/**
* @brief Enables the SERIAL over USB subsystem.
*/
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL_USB FALSE
#endif
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
#define HAL_USE_SPI FALSE
#endif
/**
* @brief Enables the UART subsystem.
*/
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
#define HAL_USE_UART FALSE
#endif
/**
* @brief Enables the USB subsystem.
*/
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
#define HAL_USE_USB FALSE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
#define ADC_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define ADC_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/
/**
* @brief Sleep mode related APIs inclusion switch.
*/
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
#define CAN_USE_SLEEP_MODE TRUE
#endif
/*===========================================================================*/
/* I2C driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the mutual exclusion APIs on the I2C bus.
*/
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define I2C_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
#define MAC_USE_ZERO_COPY FALSE
#endif
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
* This option is recommended also if the SPI driver does not
* use a DMA channel and heavily loads the CPU.
*/
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
#define MMC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intervals.
*/
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
#define SDC_INIT_RETRY 100
#endif
/**
* @brief Include support for MMC cards.
* @note MMC support is not yet implemented so this option must be kept
* at @p FALSE.
*/
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
#define SDC_MMC_SUPPORT FALSE
#endif
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
*/
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
#define SDC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
/**
* @brief Default bit rate.
* @details Configuration parameter, this is the baud rate selected for the
* default configuration.
*/
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
#define SERIAL_DEFAULT_BITRATE 38400
#endif
/**
* @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application.
* @note The default is 64 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 16
#endif
/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
#define SPI_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
#endif /* _HALCONF_H_ */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "ch.h"
#include "hal.h"
static void pwm2pcb(PWMDriver *pwmp) {
(void)pwmp;
palSetPad(GPIO1, GPIO1_LED2);
}
static void pwm2c0cb(PWMDriver *pwmp) {
(void)pwmp;
palClearPad(GPIO1, GPIO1_LED2);
}
static PWMConfig pwmcfg = {
10000, /* 100kHz PWM clock frequency. */
1000, /* PWM 10 Hz */
pwm2pcb,
{
{PWM_OUTPUT_ACTIVE_LOW, pwm2c0cb},
{PWM_OUTPUT_ACTIVE_LOW, NULL}
}
};
/*
* Application entry point.
*/
int main(void) {
/*
* System initializations.
* - HAL initialization, this also initializes the configured device drivers
* and performs the board-specific initializations.
* - Kernel initialization, the main() function becomes a thread and the
* RTOS is active.
*/
halInit();
chSysInit();
/*
* Initializes the PWM driver 2.
*/
pwmStart(&PWMD2, &pwmcfg);
chThdSleepMilliseconds(2000);
/*
* Starts the PWM channel 1 using 75% duty cycle.
*/
pwmEnableChannel(&PWMD2, 0, 250);
chThdSleepMilliseconds(5000);
/*
* Changes the PWM channel 1 to 50% duty cycle.
*/
pwmEnableChannel(&PWMD2, 0, 500);
chThdSleepMilliseconds(5000);
/*
* Changes the PWM channel 0 to 75% duty cycle.
*/
pwmEnableChannel(&PWMD2, 0, 250);
chThdSleepMilliseconds(5000);
/*
* Changes PWM period to half second the duty cycle becomes 50%
* implicitly.
*/
pwmChangePeriod(&PWMD2, 500);
chThdSleepMilliseconds(5000);
/*
* Normal main() thread activity, in this demo it does nothing.
*/
while (TRUE) {
chThdSleepMilliseconds(500);
}
return 0;
}

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* LPC1227 drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the driver
* is enabled in halconf.h.
*
* IRQ priorities:
* 3...0 Lowest...highest.
*/
/*
* HAL driver system settings.
*/
#define LPC122x_PLLCLK_SOURCE SYSPLLCLKSEL_SYSOSC
#define LPC122x_SYSPLL_MUL 3
#define LPC122x_SYSPLL_DIV 8
#define LPC122x_MAINCLK_SOURCE SYSMAINCLKSEL_PLLOUT
#define LPC122x_SYSABHCLK_DIV 1
/*
* GPT driver system settings.
*/
#define LPC122x_GPT_USE_CT16B0 TRUE
#define LPC122x_GPT_USE_CT16B1 TRUE
#define LPC122x_GPT_USE_CT32B0 TRUE
#define LPC122x_GPT_USE_CT32B1 TRUE
#define LPC122x_GPT_CT16B0_IRQ_PRIORITY 2
#define LPC122x_GPT_CT16B1_IRQ_PRIORITY 2
#define LPC122x_GPT_CT32B0_IRQ_PRIORITY 2
#define LPC122x_GPT_CT32B1_IRQ_PRIORITY 2
/*
* SERIAL driver system settings.
*/
#define LPC122x_SERIAL_USE_UART0 TRUE
#define LPC122x_SERIAL_FIFO_PRELOAD 16
#define LPC122x_SERIAL_UART0CLKDIV 1
#define LPC122x_SERIAL_UART0_IRQ_PRIORITY 3
#define LPC122x_SERIAL_TXD0_SELECTOR TXD0_IS_PIO0_2
#define LPC122x_SERIAL_RXD0_SELECTOR RXD0_IS_PIO0_1
#define LPC122x_SERIAL_USE_UART1 FALSE
#define LPC122x_SERIAL_FIFO_PRELOAD 16
#define LPC122x_SERIAL_UART1CLKDIV 1
#define LPC122x_SERIAL_UART1_IRQ_PRIORITY 3
#define LPC122x_SERIAL_RXD1_SELECTOR RXD1_IS_PIO0_8
#define LPC122x_SERIAL_TXD1_SELECTOR TXD1_IS_PIO0_9
/*
* SPI driver system settings.
*/
#define LPC122x_SPI_USE_SSP0 TRUE
#define LPC122x_SPI_SSP0CLKDIV 1
#define LPC122x_SPI_SSP0_IRQ_PRIORITY 1
#define LPC122x_SPI_SSP_ERROR_HOOK(spip) chSysHalt()
/*
* EXT driver system settings.
*/
#define LPC122x_EXT_USE_EXT0 FALSE
#define LPC122x_EXT_USE_EXT1 FALSE
#define LPC122x_EXT_USE_EXT2 TRUE
#define LPC122x_EXT_EXTI0_IRQ_PRIORITY 3
#define LPC122x_EXT_EXTI1_IRQ_PRIORITY 3
#define LPC122x_EXT_EXTI2_IRQ_PRIORITY 3
/*
* RTC driver system settings.
*/
#define LPC122x_RTCCLK SYSCFG_RTCCLK_1Hz
#define LPC122x_RTC_CLKDIV 0
#define LPC122x_RTC_USE_ALARM TRUE
#define LPC122x_RTC_IRQ_PRIORITY 3
/*
* PWM driver system settings.
*/
#define LPC122x_PWM_USE_CT16B0 FALSE
#define LPC122x_PWM_USE_CT16B1 TRUE
#define LPC122x_PWM_USE_CT32B0 FALSE
#define LPC122x_PWM_USE_CT32B1 FALSE
#define LPC122x_PWM_USE_CT16B0_CH0 FALSE
#define LPC122x_PWM_USE_CT16B0_CH1 FALSE
#define LPC122x_PWM_USE_CT16B1_CH0 TRUE
#define LPC122x_PWM_USE_CT16B1_CH1 TRUE
#define LPC122x_PWM_USE_CT32B0_CH0 FALSE
#define LPC122x_PWM_USE_CT32B0_CH1 FALSE
#define LPC122x_PWM_USE_CT32B1_CH0 FALSE
#define LPC122x_PWM_USE_CT32B1_CH1 FALSE
#define LPC122x_PWM_CT16B0_IRQ_PRIORITY 3
#define LPC122x_PWM_CT16B1_IRQ_PRIORITY 3
#define LPC122x_PWM_CT32B0_IRQ_PRIORITY 3
#define LPC122x_PWM_CT32B1_IRQ_PRIORITY 3
#define LPC122x_PWM_CT16B0_CH0_SELECTOR PWM_CT16B0_CH0_IS_PIO0_28
#define LPC122x_PWM_CT16B0_CH1_SELECTOR PWM_CT16B0_CH1_IS_PIO0_29
#define LPC122x_PWM_CT16B1_CH0_SELECTOR PWM_CT16B1_CH0_IS_PIO2_2
#define LPC122x_PWM_CT16B1_CH1_SELECTOR PWM_CT16B1_CH1_IS_PIO1_6
#define LPC122x_PWM_CT32B0_CH0_SELECTOR PWM_CT32B0_CH0_IS_PIO2_4
#define LPC122x_PWM_CT32B0_CH1_SELECTOR PWM_CT32B0_CH1_IS_PIO0_2
#define LPC122x_PWM_CT32B1_CH0_SELECTOR PWM_CT32B1_CH0_IS_PIO0_6
#define LPC122x_PWM_CT32B1_CH1_SELECTOR PWM_CT32B1_CH1_IS_PIO0_7
/*
* I2C driver system settings.
*/
#define LPC122x_I2C_IRQ_PRIORITY 3

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##############################################################################
# Build global options
# NOTE: Can be overridden externally.
#
# Compiler options here.
ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
endif
# Enable this if you want the linker to remove unused code and data
ifeq ($(USE_LINK_GC),)
USE_LINK_GC = yes
endif
# If enabled, this option allows to compile the application in THUMB mode.
ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
#
# Build global options
##############################################################################
##############################################################################
# Architecture or project specific options
#
#
# Architecture or project specific options
##############################################################################
##############################################################################
# Project, sources and paths
#
# Define project name here
PROJECT = ch
# Imported source files and paths
CHIBIOS = ../../..
include $(CHIBIOS)/boards/OLIMEX_LPC-P1227/board.mk
include $(CHIBIOS)/os/hal/platforms/LPC122x/platform.mk
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC122x/port.mk
include $(CHIBIOS)/os/kernel/kernel.mk
include $(CHIBIOS)/test/test.mk
# Define linker script file here
LDSCRIPT= $(PORTLD)/LPC1227.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CSRC = $(PORTSRC) \
$(KERNSRC) \
$(TESTSRC) \
$(HALSRC) \
$(PLATFORMSRC) \
$(BOARDSRC) \
$(CHIBIOS)/os/various/evtimer.c \
$(CHIBIOS)/os/various/syscalls.c \
$(CHIBIOS)/os/various/shell.c \
$(CHIBIOS)/os/various/chprintf.c \
$(CHIBIOS)/os/various/chrtclib.c \
main.c
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CPPSRC =
# C sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACSRC =
# C++ sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
ACPPSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCSRC =
# C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size.
TCPPSRC =
# List ASM source files here
ASMSRC = $(PORTASM)
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
$(CHIBIOS)/os/various
#
# Project, sources and paths
##############################################################################
##############################################################################
# Compiler settings
#
MCU = cortex-m0
TRGT = arm-none-eabi-
CC = $(TRGT)gcc
CPPC = $(TRGT)g++
# Enable loading with g++ only if you need C++ runtime support.
# NOTE: You can use C++ even without C++ support if you are careful. C++
# runtime support makes code size explode.
LD = $(TRGT)gcc
#LD = $(TRGT)g++
CP = $(TRGT)objcopy
AS = $(TRGT)gcc -x assembler-with-cpp
OD = $(TRGT)objdump
HEX = $(CP) -O ihex
BIN = $(CP) -O binary
# ARM-specific options here
AOPT =
# THUMB-specific options here
TOPT = -mthumb -DTHUMB
# Define C warning options here
CWARN = -Wall -Wextra -Wstrict-prototypes
# Define C++ warning options here
CPPWARN = -Wall -Wextra
#
# Compiler settings
##############################################################################
##############################################################################
# Start of default section
#
# List all default C defines here, like -D_DEBUG=1
DDEFS = -DLPC122X -D__NEWLIB__
# List all default ASM defines here, like -D_DEBUG=1
DADEFS =
# List all default directories to look for include files here
DINCDIR =
# List the default directory to look for the libraries here
DLIBDIR =
# List all default libraries here
DLIBS =
#
# End of default section
##############################################################################
##############################################################################
# Start of user section
#
# List all user C define here, like -D_DEBUG=1
UDEFS =
# Define ASM defines here
UADEFS =
# List all user directories here
UINCDIR =
# List the user directory to look for the libraries here
ULIBDIR =
# List all user libraries here
ULIBS =
#
# End of user defines
##############################################################################
include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk

535
testhal/LPC122x/RTC/chconf.h Normal file
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/chconf.h
* @brief Configuration file template.
* @details A copy of this file must be placed in each project directory, it
* contains the application specific kernel settings.
*
* @addtogroup config
* @details Kernel related settings and hooks.
* @{
*/
#ifndef _CHCONF_H_
#define _CHCONF_H_
/*===========================================================================*/
/**
* @name Kernel parameters and options
* @{
*/
/*===========================================================================*/
/**
* @brief System tick frequency.
* @details Frequency of the system timer that drives the system ticks. This
* setting also defines the system tick time unit.
*/
#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
#define CH_FREQUENCY 1000
#endif
/**
* @brief Round robin interval.
* @details This constant is the number of system ticks allowed for the
* threads before preemption occurs. Setting this value to zero
* disables the preemption for threads with equal priority and the
* round robin becomes cooperative. Note that higher priority
* threads can still preempt, the kernel is always preemptive.
*
* @note Disabling the round robin preemption makes the kernel more compact
* and generally faster.
*/
#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
#define CH_TIME_QUANTUM 20
#endif
/**
* @brief Managed RAM size.
* @details Size of the RAM area to be managed by the OS. If set to zero
* then the whole available RAM is used. The core memory is made
* available to the heap allocator and/or can be used directly through
* the simplified core memory allocator.
*
* @note In order to let the OS manage the whole RAM the linker script must
* provide the @p __heap_base__ and @p __heap_end__ symbols.
* @note Requires @p CH_USE_MEMCORE.
*/
#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
#define CH_MEMCORE_SIZE 0
#endif
/**
* @brief Idle thread automatic spawn suppression.
* @details When this option is activated the function @p chSysInit()
* does not spawn the idle thread automatically. The application has
* then the responsibility to do one of the following:
* - Spawn a custom idle thread at priority @p IDLEPRIO.
* - Change the main() thread priority to @p IDLEPRIO then enter
* an endless loop. In this scenario the @p main() thread acts as
* the idle thread.
* .
* @note Unless an idle thread is spawned the @p main() thread must not
* enter a sleep state.
*/
#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)
#define CH_NO_IDLE_THREAD FALSE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Performance options
* @{
*/
/*===========================================================================*/
/**
* @brief OS optimization.
* @details If enabled then time efficient rather than space efficient code
* is used when two possible implementations exist.
*
* @note This is not related to the compiler optimization options.
* @note The default is @p TRUE.
*/
#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
#define CH_OPTIMIZE_SPEED TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Subsystem options
* @{
*/
/*===========================================================================*/
/**
* @brief Threads registry APIs.
* @details If enabled then the registry APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
#define CH_USE_REGISTRY TRUE
#endif
/**
* @brief Threads synchronization APIs.
* @details If enabled then the @p chThdWait() function is included in
* the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
#define CH_USE_WAITEXIT TRUE
#endif
/**
* @brief Semaphores APIs.
* @details If enabled then the Semaphores APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES TRUE
#endif
/**
* @brief Semaphores queuing mode.
* @details If enabled then the threads are enqueued on semaphores by
* priority rather than in FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES_PRIORITY FALSE
#endif
/**
* @brief Atomic semaphore API.
* @details If enabled then the semaphores the @p chSemSignalWait() API
* is included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
#define CH_USE_SEMSW TRUE
#endif
/**
* @brief Mutexes APIs.
* @details If enabled then the mutexes APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
#define CH_USE_MUTEXES TRUE
#endif
/**
* @brief Conditional Variables APIs.
* @details If enabled then the conditional variables APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MUTEXES.
*/
#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS TRUE
#endif
/**
* @brief Conditional Variables APIs with timeout.
* @details If enabled then the conditional variables APIs with timeout
* specification are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_CONDVARS.
*/
#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS_TIMEOUT TRUE
#endif
/**
* @brief Events Flags APIs.
* @details If enabled then the event flags APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
#define CH_USE_EVENTS TRUE
#endif
/**
* @brief Events Flags APIs with timeout.
* @details If enabled then the events APIs with timeout specification
* are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_EVENTS.
*/
#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_EVENTS_TIMEOUT TRUE
#endif
/**
* @brief Synchronous Messages APIs.
* @details If enabled then the synchronous messages APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES TRUE
#endif
/**
* @brief Synchronous Messages queuing mode.
* @details If enabled then messages are served by priority rather than in
* FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_MESSAGES.
*/
#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES_PRIORITY FALSE
#endif
/**
* @brief Mailboxes APIs.
* @details If enabled then the asynchronous messages (mailboxes) APIs are
* included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
#define CH_USE_MAILBOXES TRUE
#endif
/**
* @brief I/O Queues APIs.
* @details If enabled then the I/O queues APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
#define CH_USE_QUEUES TRUE
#endif
/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
#define CH_USE_MEMCORE TRUE
#endif
/**
* @brief Heap Allocator APIs.
* @details If enabled then the memory heap allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or
* @p CH_USE_SEMAPHORES.
* @note Mutexes are recommended.
*/
#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
#define CH_USE_HEAP TRUE
#endif
/**
* @brief C-runtime allocator.
* @details If enabled the the heap allocator APIs just wrap the C-runtime
* @p malloc() and @p free() functions.
*
* @note The default is @p FALSE.
* @note Requires @p CH_USE_HEAP.
* @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the
* appropriate documentation.
*/
#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
#define CH_USE_MALLOC_HEAP FALSE
#endif
/**
* @brief Memory Pools Allocator APIs.
* @details If enabled then the memory pools allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
#define CH_USE_MEMPOOLS TRUE
#endif
/**
* @brief Dynamic Threads APIs.
* @details If enabled then the dynamic threads creation APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_WAITEXIT.
* @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
*/
#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
#define CH_USE_DYNAMIC TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Debug options
* @{
*/
/*===========================================================================*/
/**
* @brief Debug option, system state check.
* @details If enabled the correct call protocol for system APIs is checked
* at runtime.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
#endif
/**
* @brief Debug option, parameters checks.
* @details If enabled then the checks on the API functions input
* parameters are activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_CHECKS FALSE
#endif
/**
* @brief Debug option, consistency checks.
* @details If enabled then all the assertions in the kernel code are
* activated. This includes consistency checks inside the kernel,
* runtime anomalies and port-defined checks.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_ASSERTS FALSE
#endif
/**
* @brief Debug option, trace buffer.
* @details If enabled then the context switch circular trace buffer is
* activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_TRACE FALSE
#endif
/**
* @brief Debug option, stack checks.
* @details If enabled then a runtime stack check is performed.
*
* @note The default is @p FALSE.
* @note The stack check is performed in a architecture/port dependent way.
* It may not be implemented or some ports.
* @note The default failure mode is to halt the system with the global
* @p panic_msg variable set to @p NULL.
*/
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_STACK_CHECK FALSE
#endif
/**
* @brief Debug option, stacks initialization.
* @details If enabled then the threads working area is filled with a byte
* value when a thread is created. This can be useful for the
* runtime measurement of the used stack.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
#define CH_DBG_FILL_THREADS FALSE
#endif
/**
* @brief Debug option, threads profiling.
* @details If enabled then a field is added to the @p Thread structure that
* counts the system ticks occurred while executing the thread.
*
* @note The default is @p TRUE.
* @note This debug option is defaulted to TRUE because it is required by
* some test cases into the test suite.
*/
#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
#define CH_DBG_THREADS_PROFILING TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Kernel hooks
* @{
*/
/*===========================================================================*/
/**
* @brief Threads descriptor structure extension.
* @details User fields added to the end of the @p Thread structure.
*/
#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
#define THREAD_EXT_FIELDS \
/* Add threads custom fields here.*/
#endif
/**
* @brief Threads initialization hook.
* @details User initialization code added to the @p chThdInit() API.
*
* @note It is invoked from within @p chThdInit() and implicitly from all
* the threads creation APIs.
*/
#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_INIT_HOOK(tp) { \
/* Add threads initialization code here.*/ \
}
#endif
/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
*
* @note It is inserted into lock zone.
* @note It is also invoked when the threads simply return in order to
* terminate.
*/
#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_EXIT_HOOK(tp) { \
/* Add threads finalization code here.*/ \
}
#endif
/**
* @brief Context switch hook.
* @details This hook is invoked just before switching between threads.
*/
#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)
#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \
/* System halt code here.*/ \
}
#endif
/**
* @brief Idle Loop hook.
* @details This hook is continuously invoked by the idle thread loop.
*/
#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
#define IDLE_LOOP_HOOK() { \
/* Idle loop code here.*/ \
}
#endif
/**
* @brief System tick event hook.
* @details This hook is invoked in the system tick handler immediately
* after processing the virtual timers queue.
*/
#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_TICK_EVENT_HOOK() { \
/* System tick event code here.*/ \
}
#endif
/**
* @brief System halt hook.
* @details This hook is invoked in case to a system halting error before
* the system is halted.
*/
#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_HALT_HOOK() { \
/* System halt code here.*/ \
}
#endif
/** @} */
/*===========================================================================*/
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
#endif /* _CHCONF_H_ */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/halconf.h
* @brief HAL configuration header.
* @details HAL configuration file, this file allows to enable or disable the
* various device drivers from your application. You may also use
* this file in order to override the device drivers default settings.
*
* @addtogroup HAL_CONF
* @{
*/
#ifndef _HALCONF_H_
#define _HALCONF_H_
#include "mcuconf.h"
/**
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM FALSE
#endif
/**
* @brief Enables the PAL subsystem.
*/
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
#define HAL_USE_PAL TRUE
#endif
/**
* @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
#define HAL_USE_ADC FALSE
#endif
/**
* @brief Enables the CAN subsystem.
*/
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
#define HAL_USE_GPT TRUE
#endif
/**
* @brief Enables the I2C subsystem.
*/
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
#define HAL_USE_I2C FALSE
#endif
/**
* @brief Enables the ICU subsystem.
*/
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
#define HAL_USE_ICU FALSE
#endif
/**
* @brief Enables the MAC subsystem.
*/
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
#define HAL_USE_MAC FALSE
#endif
/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define HAL_USE_MMC_SPI FALSE
#endif
/**
* @brief Enables the PWM subsystem.
*/
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC TRUE
#endif
/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
#define HAL_USE_SDC FALSE
#endif
/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL TRUE
#endif
/**
* @brief Enables the SERIAL over USB subsystem.
*/
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL_USB FALSE
#endif
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
#define HAL_USE_SPI FALSE
#endif
/**
* @brief Enables the UART subsystem.
*/
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
#define HAL_USE_UART FALSE
#endif
/**
* @brief Enables the USB subsystem.
*/
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
#define HAL_USE_USB FALSE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
#define ADC_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define ADC_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/
/**
* @brief Sleep mode related APIs inclusion switch.
*/
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
#define CAN_USE_SLEEP_MODE TRUE
#endif
/*===========================================================================*/
/* I2C driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the mutual exclusion APIs on the I2C bus.
*/
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define I2C_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
#define MAC_USE_ZERO_COPY FALSE
#endif
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
* This option is recommended also if the SPI driver does not
* use a DMA channel and heavily loads the CPU.
*/
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
#define MMC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intervals.
*/
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
#define SDC_INIT_RETRY 100
#endif
/**
* @brief Include support for MMC cards.
* @note MMC support is not yet implemented so this option must be kept
* at @p FALSE.
*/
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
#define SDC_MMC_SUPPORT FALSE
#endif
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
*/
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
#define SDC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
/**
* @brief Default bit rate.
* @details Configuration parameter, this is the baud rate selected for the
* default configuration.
*/
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
#define SERIAL_DEFAULT_BITRATE 38400
#endif
/**
* @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application.
* @note The default is 64 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 16
#endif
/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
#define SPI_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
#endif /* _HALCONF_H_ */
/** @} */

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testhal/LPC122x/RTC/main.c Normal file
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/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
This structure is used to hold the values representing a calendar time.
It contains the following members, with the meanings as shown.
int tm_sec seconds after minute [0-61] (61 allows for 2 leap-seconds)
int tm_min minutes after hour [0-59]
int tm_hour hours after midnight [0-23]
int tm_mday day of the month [1-31]
int tm_mon month of year [0-11]
int tm_year current year-1900
int tm_wday days since Sunday [0-6]
int tm_yday days since January 1st [0-365]
int tm_isdst daylight savings indicator (1 = yes, 0 = no, -1 = unknown)
*/
#include <string.h>
#include <stdlib.h>
#include <time.h>
#include "ch.h"
#include "hal.h"
#include "shell.h"
#include "chprintf.h"
#include "chrtclib.h"
static RTCAlarm alarmspec;
static time_t unix_time;
/* libc stub */
int _getpid(void) {return 1;}
/* libc stub */
void _exit(int i) {(void)i;}
/* libc stub */
#include <errno.h>
#undef errno
extern int errno;
int _kill(int pid, int sig) {
(void)pid;
(void)sig;
errno = EINVAL;
return -1;
}
/* sleep indicator thread */
static WORKING_AREA(blinkWA, 128);
static msg_t blink_thd(void *arg){
(void)arg;
while (TRUE) {
chThdSleepMilliseconds(100);
palTogglePad(GPIO1, GPIO1_LED1);
}
return 0;
}
static void wakeup_cb(RTCDriver *rtcp, rtcevent_t event) {
(void)rtcp;
if (event == RTC_EVENT_ALARM) {
palTogglePad(GPIO1, GPIO1_LED2);
}
}
/* Wake-up from Deep-sleep mode with rtc alarm (must be set first) */
static void func_sleep(void) {
chSysLock();
/* Deep sleep-mode configuration */
LPC_PMU->PCON = 0; /* DPDEN bit set to 0 */
LPC_SYSCON->PDSLEEPCFG = 0x0000FFBF; /* BOD off, wdt osc on */
LPC_SYSCON->PDAWAKECFG &= ~(1 << 6); /* WDT osc powered after woke */
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; /* Deep sleep mode */
/* WDT osc config and run */
LPC_SYSCON->PDRUNCFG |= (1 << 6); /* WDT oscillator power-down */
LPC_SYSCON->WDTOSCCTRL = (0x01 << 5 ) | 0; /* wdt_osc_clk = Fclkana/(2 * (1 + DIVSEL)) */
LPC_SYSCON->PDRUNCFG &= ~(1 << 6); /* WDT oscillator power-up */
__NOP();
/* Set WDT osc as Main Clock*/
LPC_SYSCON->MAINCLKSEL = SYSMAINCLKSEL_WDGOSC;
LPC_SYSCON->MAINCLKUEN = 1; /* Really required? */
LPC_SYSCON->MAINCLKUEN = 0;
LPC_SYSCON->MAINCLKUEN = 1;
while ((LPC_SYSCON->MAINCLKUEN & 1) == 0) /* Wait switch completion. */
;
/* Set RTC start logic */
LPC_SYSCON->STARTAPRP1 = (1UL << 18); /* Rising edge */
LPC_SYSCON->STARTERP1 = (1UL << 18); /* Enable Start Logic for RTC interrupt */
__WFI();
NVIC_SystemReset();
}
/* Wake-up from Deep power-down with wake-up pin or rtc alarm (must be set first) */
static void func_pwrdown(void) {
chSysLock();
LPC_PMU->PCON |= (1UL << 1); /* DPDEN bit set to 1. */
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; /* Deep sleep mode. */
LPC_SYSCON->PDRUNCFG &= ~((1UL << 1) | 1UL); /* IRC osc powered. */
__WFI();
}
static void cmd_pwrdown(BaseSequentialStream *chp, int argc, char *argv[]){
(void)argv;
if (argc > 0) {
chprintf(chp, "Usage: pwrdown\r\n");
return;
}
chprintf(chp, "Going to power down.\r\n");
chThdSleepMilliseconds(200);
func_pwrdown();
}
static void cmd_sleep(BaseSequentialStream *chp, int argc, char *argv[]){
(void)argv;
if (argc > 0) {
chprintf(chp, "Usage: sleep\r\n");
return;
}
chprintf(chp, "Going to sleep.\r\n");
chThdSleepMilliseconds(200);
/* going to anabiosis */
func_sleep();
}
/*
*
*/
static void cmd_alarm(BaseSequentialStream *chp, int argc, char *argv[]){
(void)argv;
if (argc < 1) {
goto ERROR;
}
if ((argc == 1) && (strcmp(argv[0], "get") == 0)){
rtcGetAlarm(&RTCD1, 0, &alarmspec);
chprintf(chp, "%D%s",alarmspec.tv_sec," - alarm in seconds\r\n");
return;
}
if ((argc == 2) && (strcmp(argv[0], "set") == 0)){
alarmspec.tv_sec = (uint32_t)atol(argv[1]);
rtcSetAlarm(&RTCD1, 0, &alarmspec);
rtcSetCallback(&RTCD1, wakeup_cb);
return;
}
else{
goto ERROR;
}
ERROR:
chprintf(chp, "Usage: alarm get\r\n");
chprintf(chp, " alarm set N\r\n");
chprintf(chp, "where N is alarm time in seconds\r\n");
}
/*
*
*/
static void cmd_date(BaseSequentialStream *chp, int argc, char *argv[]){
(void)argv;
struct tm timp;
if (argc == 0) {
goto ERROR;
}
if ((argc == 1) && (strcmp(argv[0], "get") == 0)){
unix_time = rtcGetTimeUnixSec(&RTCD1);
if (unix_time == -1){
chprintf(chp, "incorrect time in RTC cell\r\n");
}
else{
chprintf(chp, "%D%s",unix_time," - unix time\r\n");
rtcGetTimeTm(&RTCD1, &timp);
chprintf(chp, "%s%s",asctime(&timp)," - formatted time string\r\n");
}
return;
}
if ((argc == 2) && (strcmp(argv[0], "set") == 0)){
unix_time = atol(argv[1]);
if (unix_time > 0){
rtcSetTimeUnixSec(&RTCD1, unix_time);
return;
}
else{
goto ERROR;
}
}
else{
goto ERROR;
}
ERROR:
chprintf(chp, "Usage: date get\r\n");
chprintf(chp, " date set N\r\n");
chprintf(chp, "where N is time in seconds sins Unix epoch\r\n");
chprintf(chp, "you can get current N value from unix console by the command\r\n");
chprintf(chp, "%s", "date +\%s\r\n");
return;
}
static const ShellCommand commands[] = {
{"alarm", cmd_alarm},
{"date", cmd_date},
{"sleep", cmd_sleep},
{"pwrdown", cmd_pwrdown},
{NULL, NULL}
};
static const ShellConfig shell_cfg1 = {
(BaseSequentialStream *)&SD1,
commands
};
BaseSequentialStream * chp1 = (BaseSequentialStream *)&SD1;
/**
* Main function.
*/
int main(void){
halInit();
chSysInit();
chThdCreateStatic(blinkWA, sizeof(blinkWA), NORMALPRIO, blink_thd, NULL);
sdStart(&SD1, NULL); /* Default is 38400-8-N-1.*/
if (LPC_PMU->PCON & (1UL << 11)) {
chprintf(chp1, "Woke from Deep power-down\r\n");
LPC_PMU->PCON |= (1 << 11);
}
if (LPC_PMU->PCON & (1UL << 8)) {
chprintf(chp1, "Woke from Deep-sleep mode\r\n");
LPC_PMU->PCON |= (1 << 8);
}
/* Shell initialization.*/
shellInit();
static WORKING_AREA(waShell, 1024);
shellCreateStatic(&shell_cfg1, waShell, sizeof(waShell), NORMALPRIO);
/* wait until user do not want to test wakeup */
while (TRUE){
chThdSleepMilliseconds(200);
}
return 0;
}

127
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* LPC1227 drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the driver
* is enabled in halconf.h.
*
* IRQ priorities:
* 3...0 Lowest...highest.
*/
/*
* HAL driver system settings.
*/
#define LPC122x_PLLCLK_SOURCE SYSPLLCLKSEL_SYSOSC
#define LPC122x_SYSPLL_MUL 3
#define LPC122x_SYSPLL_DIV 8
#define LPC122x_MAINCLK_SOURCE SYSMAINCLKSEL_PLLOUT
#define LPC122x_SYSABHCLK_DIV 1
/*
* GPT driver system settings.
*/
#define LPC122x_GPT_USE_CT16B0 TRUE
#define LPC122x_GPT_USE_CT16B1 TRUE
#define LPC122x_GPT_USE_CT32B0 TRUE
#define LPC122x_GPT_USE_CT32B1 TRUE
#define LPC122x_GPT_CT16B0_IRQ_PRIORITY 1
#define LPC122x_GPT_CT16B1_IRQ_PRIORITY 3
#define LPC122x_GPT_CT32B0_IRQ_PRIORITY 2
#define LPC122x_GPT_CT32B1_IRQ_PRIORITY 2
/*
* SERIAL driver system settings.
*/
#define LPC122x_SERIAL_USE_UART0 TRUE
#define LPC122x_SERIAL_FIFO_PRELOAD 16
#define LPC122x_SERIAL_UART0CLKDIV 1
#define LPC122x_SERIAL_UART0_IRQ_PRIORITY 3
#define LPC122x_SERIAL_TXD0_SELECTOR TXD0_IS_PIO0_2
#define LPC122x_SERIAL_RXD0_SELECTOR RXD0_IS_PIO0_1
#define LPC122x_SERIAL_USE_UART1 FALSE
#define LPC122x_SERIAL_FIFO_PRELOAD 16
#define LPC122x_SERIAL_UART1CLKDIV 1
#define LPC122x_SERIAL_UART1_IRQ_PRIORITY 3
#define LPC122x_SERIAL_RXD1_SELECTOR RXD1_IS_PIO0_8
#define LPC122x_SERIAL_TXD1_SELECTOR TXD1_IS_PIO0_9
/*
* SPI driver system settings.
*/
#define LPC122x_SPI_USE_SSP0 TRUE
#define LPC122x_SPI_SSP0CLKDIV 1
#define LPC122x_SPI_SSP0_IRQ_PRIORITY 1
#define LPC122x_SPI_SSP_ERROR_HOOK(spip) chSysHalt()
/*
* EXT driver system settings.
*/
#define LPC122x_EXT_USE_EXT0 FALSE
#define LPC122x_EXT_USE_EXT1 FALSE
#define LPC122x_EXT_USE_EXT2 TRUE
#define LPC122x_EXT_EXTI0_IRQ_PRIORITY 3
#define LPC122x_EXT_EXTI1_IRQ_PRIORITY 3
#define LPC122x_EXT_EXTI2_IRQ_PRIORITY 3
/*
* RTC driver system settings.
*/
#define LPC122x_RTCCLK SYSCFG_RTCCLK_1Hz
#define LPC122x_RTC_CLKDIV 0
#define LPC122x_RTC_USE_ALARM TRUE
#define LPC122x_RTC_IRQ_PRIORITY 3
/*
* PWM driver system settings.
*/
#define LPC122x_PWM_USE_CT16B0 FALSE
#define LPC122x_PWM_USE_CT16B1 TRUE
#define LPC122x_PWM_USE_CT32B0 FALSE
#define LPC122x_PWM_USE_CT32B1 FALSE
#define LPC122x_PWM_USE_CT16B0_CH0 FALSE
#define LPC122x_PWM_USE_CT16B0_CH1 FALSE
#define LPC122x_PWM_USE_CT16B1_CH0 TRUE
#define LPC122x_PWM_USE_CT16B1_CH1 TRUE
#define LPC122x_PWM_USE_CT32B0_CH0 FALSE
#define LPC122x_PWM_USE_CT32B0_CH1 FALSE
#define LPC122x_PWM_USE_CT32B1_CH0 FALSE
#define LPC122x_PWM_USE_CT32B1_CH1 FALSE
#define LPC122x_PWM_CT16B0_IRQ_PRIORITY 3
#define LPC122x_PWM_CT16B1_IRQ_PRIORITY 3
#define LPC122x_PWM_CT32B0_IRQ_PRIORITY 3
#define LPC122x_PWM_CT32B1_IRQ_PRIORITY 3
#define LPC122x_PWM_CT16B0_CH0_SELECTOR PWM_CT16B0_CH0_IS_PIO0_28
#define LPC122x_PWM_CT16B0_CH1_SELECTOR PWM_CT16B0_CH1_IS_PIO0_29
#define LPC122x_PWM_CT16B1_CH0_SELECTOR PWM_CT16B1_CH0_IS_PIO1_5
#define LPC122x_PWM_CT16B1_CH1_SELECTOR PWM_CT16B1_CH1_IS_PIO1_6
#define LPC122x_PWM_CT32B0_CH0_SELECTOR PWM_CT32B0_CH0_IS_PIO2_4
#define LPC122x_PWM_CT32B0_CH1_SELECTOR PWM_CT32B0_CH1_IS_PIO0_2
#define LPC122x_PWM_CT32B1_CH0_SELECTOR PWM_CT32B1_CH0_IS_PIO0_6
#define LPC122x_PWM_CT32B1_CH1_SELECTOR PWM_CT32B1_CH1_IS_PIO0_7
/*
* I2C driver system settings.
*/
#define LPC122x_I2C_IRQ_PRIORITY 3