diff --git a/os/common/ext/RP/RP2040/rp2040.h b/os/common/ext/RP/RP2040/rp2040.h index 25506427a..e3b9c664b 100644 --- a/os/common/ext/RP/RP2040/rp2040.h +++ b/os/common/ext/RP/RP2040/rp2040.h @@ -85,60 +85,99 @@ typedef enum { * @{ */ typedef struct { - __IO uint32_t RESET; - __IO uint32_t WDSEL; - __I uint32_t RESET_DONE; + struct { + __I uint32_t STATUS; + __IO uint32_t CTRL; + } GPIO[30]; + __IO uint32_t INTR[4]; + struct { + __IO uint32_t INTE[4]; + __IO uint32_t INTF[4]; + __I uint32_t INTS[4]; + } PROC[2]; + __IO uint32_t DW_INTE[4]; + __IO uint32_t DW_INTF[4]; + __I uint32_t DW_INTS[4]; +} IOUSER_TypeDef; + +typedef struct { + struct { + __I uint32_t STATUS; + __IO uint32_t CTRL; + } GPIO[6]; + __IO uint32_t INTR[1]; + struct { + __IO uint32_t INTE[1]; + __IO uint32_t INTF[1]; + __I uint32_t INTS[1]; + } PROC[2]; + __IO uint32_t DW_INTE[1]; + __IO uint32_t DW_INTF[1]; + __I uint32_t DW_INTS[1]; +} IOQSPI_TypeDef; + +typedef struct { + __IO uint32_t VOLTAGE_SELECT; + __IO uint32_t GPIO[30]; + __IO uint32_t SWCLK; + __IO uint32_t SWD; +} PADS_TypeDef; + +typedef struct { + __IO uint32_t RESET; + __IO uint32_t WDSEL; + __I uint32_t RESET_DONE; } RESETS_TypeDef; typedef struct { - __IO uint32_t TIMEHW; - __IO uint32_t TIMELW; - __I uint32_t TIMEHR; - __I uint32_t TIMELR; - __IO uint32_t ALARM0; - __IO uint32_t ALARM1; - __IO uint32_t ALARM2; - __IO uint32_t ALARM3; - __IO uint32_t ARMED; - __I uint32_t TIMERAWH; - __I uint32_t TIMERAWL; - __IO uint32_t DBGPAUSE; - __IO uint32_t PAUSE; - __IO uint32_t INTR; - __IO uint32_t INTE; - __IO uint32_t INTF; - __I uint32_t INTS; + __IO uint32_t TIMEHW; + __IO uint32_t TIMELW; + __I uint32_t TIMEHR; + __I uint32_t TIMELR; + __IO uint32_t ALARM0; + __IO uint32_t ALARM1; + __IO uint32_t ALARM2; + __IO uint32_t ALARM3; + __IO uint32_t ARMED; + __I uint32_t TIMERAWH; + __I uint32_t TIMERAWL; + __IO uint32_t DBGPAUSE; + __IO uint32_t PAUSE; + __IO uint32_t INTR; + __IO uint32_t INTE; + __IO uint32_t INTF; + __I uint32_t INTS; } TIMER_TypeDef; typedef struct { - __IO uint32_t UARTDR; - __IO uint32_t UARTRSR; - __I uint32_t resvd8; - __I uint32_t resvdC; - __I uint32_t resvd10; - __I uint32_t resvd14; - __I uint32_t UARTFR; - __I uint32_t resvd1C; - __IO uint32_t UARTILPR; - __IO uint32_t UARTIBRD; - __IO uint32_t UARTFBRD; - __IO uint32_t UARTLCR_H; - __IO uint32_t UARTCR; - __IO uint32_t UARTIFLS; - __IO uint32_t UARTIMSC; - __I uint32_t UARTRIS; - __I uint32_t UARTMIS; - __IO uint32_t UARTICR; - __IO uint32_t UARTDMACR; - __I uint32_t resvd4C[997]; - __I uint32_t UARTPERIPHID0; - __I uint32_t UARTPERIPHID1; - __I uint32_t UARTPERIPHID2; - __I uint32_t UARTPERIPHID3; - __I uint32_t UARTPCELLID0; - __I uint32_t UARTPCELLID1; - __I uint32_t UARTPCELLID2; - __I uint32_t UARTPCELLID3; + __IO uint32_t UARTDR; + __IO uint32_t UARTRSR; + __I uint32_t resvd8; + __I uint32_t resvdC; + __I uint32_t resvd10; + __I uint32_t resvd14; + __I uint32_t UARTFR; + __I uint32_t resvd1C; + __IO uint32_t UARTILPR; + __IO uint32_t UARTIBRD; + __IO uint32_t UARTFBRD; + __IO uint32_t UARTLCR_H; + __IO uint32_t UARTCR; + __IO uint32_t UARTIFLS; + __IO uint32_t UARTIMSC; + __I uint32_t UARTRIS; + __I uint32_t UARTMIS; + __IO uint32_t UARTICR; + __IO uint32_t UARTDMACR; + __I uint32_t resvd4C[997]; + __I uint32_t UARTPERIPHID0; + __I uint32_t UARTPERIPHID1; + __I uint32_t UARTPERIPHID2; + __I uint32_t UARTPERIPHID3; + __I uint32_t UARTPCELLID0; + __I uint32_t UARTPCELLID1; + __I uint32_t UARTPCELLID2; + __I uint32_t UARTPCELLID3; } UART_TypeDef; /** @} */ @@ -148,7 +187,11 @@ typedef struct { */ #define APBPERIPH_BASE 0x40000000U #define AHBPERIPH_BASE 0x50000000U -#define __IOPORT_BASE 0xA0000000U +#define __IOPORT_BASE 0xD0000000U +#define __IOUSER0_BASE (APBPERIPH_BASE + 0x00014000U) +#define __IOQSPI_BASE (APBPERIPH_BASE + 0x00018000U) +#define __PADSUSER0_BASE (APBPERIPH_BASE + 0x0001C000U) +#define __PADSQSPI_BASE (APBPERIPH_BASE + 0x00020000U) #define __RESETS_BASE (APBPERIPH_BASE + 0x0000C000U) #define __TIMER_BASE (APBPERIPH_BASE + 0x00054000U) #define __UART0_BASE (APBPERIPH_BASE + 0x00034000U) @@ -159,6 +202,10 @@ typedef struct { * @name Peripherals * @{ */ +#define IO_BANK0 ((IOUSER_TypeDef *)__IOUSER0_BASE) +#define IO_QSPI ((IOUSER_TypeDef *)__IOQSPI_BASE) +#define PADS_BANK0 ((PADS_TypeDef *)__PADSUSER0_BASE) +#define PADS_QSPI ((PADS_TypeDef *)__PADSQSPI_BASE) #define RESETS ((RESETS_TypeDef *)__RESETS_BASE) #define TIMER ((TIMER_TypeDef *)__TIMER_BASE) #define UART0 ((UART_TypeDef *)__UART0_BASE) diff --git a/os/hal/ports/RP/LLD/GPIOv1/driver.mk b/os/hal/ports/RP/LLD/GPIOv1/driver.mk new file mode 100644 index 000000000..d76fa5b9a --- /dev/null +++ b/os/hal/ports/RP/LLD/GPIOv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_PAL TRUE,$(HALCONF)),) +PLATFORMSRC += $(CHIBIOS)/os/hal/ports/RP/LLD/GPIOv1/hal_pal_lld.c +endif +else +PLATFORMSRC += $(CHIBIOS)/os/hal/ports/RP/LLD/GPIOv1/hal_pal_lld.c +endif + +PLATFORMINC += $(CHIBIOS)/os/hal/ports/RP/LLD/GPIOv1 diff --git a/os/hal/ports/RP/LLD/GPIOv1/hal_pal_lld.c b/os/hal/ports/RP/LLD/GPIOv1/hal_pal_lld.c new file mode 100644 index 000000000..afb76bfdc --- /dev/null +++ b/os/hal/ports/RP/LLD/GPIOv1/hal_pal_lld.c @@ -0,0 +1,64 @@ +/* + ChibiOS - Copyright (C) 2006..2021 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file GPIOv1/hal_pal_lld.c + * @brief RP PAL low level driver code. + * + * @addtogroup PAL + * @{ + */ + +#include "hal.h" + +#if HAL_USE_PAL || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief PAL driver initialization. + * + * @notapi + */ +void __pal_lld_init(void) { + +} + +#endif /* HAL_USE_PAL */ + +/** @} */ diff --git a/os/hal/ports/RP/LLD/GPIOv1/hal_pal_lld.h b/os/hal/ports/RP/LLD/GPIOv1/hal_pal_lld.h new file mode 100644 index 000000000..e541db078 --- /dev/null +++ b/os/hal/ports/RP/LLD/GPIOv1/hal_pal_lld.h @@ -0,0 +1,410 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file GPIOv1/hal_pal_lld.h + * @brief RP PAL low level driver header. + * + * @addtogroup PAL + * @{ + */ + +#ifndef HAL_PAL_LLD_H +#define HAL_PAL_LLD_H + +#if HAL_USE_PAL || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Unsupported modes and specific modes */ +/*===========================================================================*/ + +/* Specifies palInit() without parameter, required until all platforms will + be updated to the new style.*/ +#define PAL_NEW_INIT + +#undef PAL_MODE_RESET +#undef PAL_MODE_UNCONNECTED +#undef PAL_MODE_INPUT +#undef PAL_MODE_INPUT_PULLUP +#undef PAL_MODE_INPUT_PULLDOWN +#undef PAL_MODE_INPUT_ANALOG +#undef PAL_MODE_OUTPUT_PUSHPULL +#undef PAL_MODE_OUTPUT_OPENDRAIN + +/** + * @name RP-specific I/O mode flags + * @{ + */ +#define PAL_RP_MODE_INOVER_NOTINV (0U << 16) +#define PAL_RP_MODE_INOVER_INV (1U << 16) +#define PAL_RP_MODE_INOVER_DRVLOW (2U << 16) +#define PAL_RP_MODE_INOVER_DRVHIGH (3U << 16) + +#define PAL_RP_MODE_OEOVER_DRVPERI (0U << 12) +#define PAL_RP_MODE_OEOVER_DRVINVPERI (1U << 12) +#define PAL_RP_MODE_OEOVER_DISABLE (2U << 12) +#define PAL_RP_MODE_OEOVER_ENABLE (3U << 12) + +#define PAL_RP_MODE_OUTOVER_DRVPERI (0U << 8) +#define PAL_RP_MODE_OUTOVER_DRVINVPERI (1U << 8) +#define PAL_RP_MODE_OUTOVER_DRVLOW (2U << 8) +#define PAL_RP_MODE_OUTOVER_DRVHIGH (3U << 8) + +#define PAL_RP_MODE_FUNCSEL(n) ((n) << 0) + +#define PAL_RP_MODE_OD (1U << (24 + 7)) + +#define PAL_RP_MODE_IE (1U << (24 + 6)) + +#define PAL_RP_MODE_DRIVE2 (0U << (24 + 4)) +#define PAL_RP_MODE_DRIVE4 (1U << (24 + 4)) +#define PAL_RP_MODE_DRIVE8 (2U << (24 + 4)) +#define PAL_RP_MODE_DRIVE12 (3U << (24 + 4)) + +#define PAL_RP_MODE_PUE (1U << (24 + 3)) + +#define PAL_RP_MODE_PDE (1U << (24 + 2)) + +#define PAL_RP_MODE_SCHMITT (1U << (24 + 1)) + +#define PAL_RP_MODE_SLEWFAST (1U << (24 + 0)) + +/** + * @brief Alternate function. + * + * @param[in] n alternate function selector + */ +#define PAL_MODE_ALTERNATE(n) (PAL_RP_MODE_IE | \ + PAL_RP_MODE_OUTOVER_DRVPERI | \ + PAL_RP_MODE_FUNCSEL(n)) +/** @} */ + +/** + * @name Standard I/O mode flags + * @{ + */ +/** + * @brief Implemented as input. + */ +#define PAL_MODE_RESET PAL_STM32_MODE_INPUT + +/** + * @brief Implemented as input with pull-up. + */ +#define PAL_MODE_UNCONNECTED PAL_MODE_INPUT_PULLUP + +/** + * @brief Regular input high-Z pad. + */ +#define PAL_MODE_INPUT PAL_STM32_MODE_INPUT + +/** + * @brief Input pad with weak pull up resistor. + */ +#define PAL_MODE_INPUT_PULLUP (PAL_STM32_MODE_INPUT | \ + PAL_STM32_PUPDR_PULLUP) + +/** + * @brief Input pad with weak pull down resistor. + */ +#define PAL_MODE_INPUT_PULLDOWN (PAL_STM32_MODE_INPUT | \ + PAL_STM32_PUPDR_PULLDOWN) + +/** + * @brief Analog input mode. + */ +#define PAL_MODE_INPUT_ANALOG PAL_STM32_MODE_ANALOG + +/** + * @brief Push-pull output pad. + */ +#define PAL_MODE_OUTPUT_PUSHPULL (PAL_STM32_MODE_OUTPUT | \ + PAL_STM32_OTYPE_PUSHPULL) + +/** + * @brief Open-drain output pad. + */ +#define PAL_MODE_OUTPUT_OPENDRAIN (PAL_STM32_MODE_OUTPUT | \ + PAL_STM32_OTYPE_OPENDRAIN) +/** @} */ + +/*===========================================================================*/ +/* I/O Ports Types and constants. */ +/*===========================================================================*/ + +/** + * @name Port related definitions + * @{ + */ +/** + * @brief Width, in bits, of an I/O port. + */ +#define PAL_IOPORTS_WIDTH 32 + +/** + * @brief Whole port mask. + * @details This macro specifies all the valid bits into a port. + */ +#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFF) +/** @} */ + +/** + * @name Line handling macros + * @{ + */ +/** + * @brief Forms a line identifier. + * @details A port/pad pair are encoded into an @p ioline_t type. The encoding + * of this type is platform-dependent. + * @note In this driver the pad number is encoded in the lower 4 bits of + * the GPIO address which are guaranteed to be zero. + */ +#define PAL_LINE(port, pad) ((pad), (port)) + +/** + * @brief Decodes a port identifier from a line identifier. + */ +#define PAL_PORT(line) 0U + +/** + * @brief Decodes a pad identifier from a line identifier. + */ +#define PAL_PAD(line) (line) + +/** + * @brief Value identifying an invalid line. + */ +#define PAL_NOLINE 0U +/** @} */ + +/** + * @brief Type of digital I/O port sized unsigned integer. + */ +typedef uint32_t ioportmask_t; + +/** + * @brief Type of digital I/O modes. + */ +typedef uint32_t iomode_t; + +/** + * @brief Type of an I/O line. + */ +typedef uint32_t ioline_t; + +/** + * @brief Type of an event mode. + */ +typedef uint32_t ioeventmode_t; + +/** + * @brief Type of a port Identifier. + * @details This type can be a scalar or some kind of pointer, do not make + * any assumption about it, use the provided macros when populating + * variables of this type. + */ +typedef uint32_t ioportid_t; + +/** + * @brief Type of an pad identifier. + */ +typedef uint32_t iopadid_t; + +/*===========================================================================*/ +/* I/O Ports Identifiers. */ +/* The low level driver wraps the definitions already present in the STM32 */ +/* firmware library. */ +/*===========================================================================*/ + +/** + * @brief User port identifier. + */ +#define IOPORT1 0U + +/*===========================================================================*/ +/* Implementation, some of the following macros could be implemented as */ +/* functions, if so please put them in pal_lld.c. */ +/*===========================================================================*/ + +/** + * @brief GPIO ports subsystem initialization. + * + * @notapi + */ +#define pal_lld_init() __pal_lld_init() + +/** + * @brief Reads an I/O port. + * @note Not implemented on this device. + * + * @param[in] port port identifier + * @return The port bits. + * + * @notapi + */ +#define pal_lld_readport(port) 0U + +/** + * @brief Reads the output latch. + * @note Not implemented on this device. + * + * @param[in] port port identifier + * @return The latched logical states. + * + * @notapi + */ +#define pal_lld_readlatch(port) 0U + +/** + * @brief Writes on a I/O port. + * @note Not implemented on this device. + * + * @param[in] port port identifier + * @param[in] bits bits to be written on the specified port + * + * @notapi + */ +#define pal_lld_writeport(port, bits) + +/** + * @brief Sets a bits mask on a I/O port. + * @note Not implemented on this device. + * + * @param[in] port port identifier + * @param[in] bits bits to be ORed on the specified port + * + * @notapi + */ +#define pal_lld_setport(port, bits) + +/** + * @brief Clears a bits mask on a I/O port. + * @note Not implemented on this device. + * + * @param[in] port port identifier + * @param[in] bits bits to be cleared on the specified port + * + * @notapi + */ +#define pal_lld_clearport(port, bits) + +/** + * @brief Writes a group of bits. + * @note Not implemented on this device. + * + * @param[in] port port identifier + * @param[in] mask group mask + * @param[in] offset the group bit offset within the port + * @param[in] bits bits to be written. Values exceeding the group + * width are masked. + * + * @notapi + */ +#define pal_lld_writegroup(port, mask, offset, bits) (void)(bits) + +/** + * @brief Pads group mode setup. + * @note Not implemented on this device. + * + * @param[in] port port identifier + * @param[in] mask group mask + * @param[in] offset group bit offset within the port + * @param[in] mode group mode + * + * @notapi + */ +#define pal_lld_setgroupmode(port, mask, offset, mode) (void)(mode) + +/** + * @brief Writes a logical state on an output pad. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * @param[in] bit logical value, the value must be @p PAL_LOW or + * @p PAL_HIGH + * + * @notapi + */ +#define pal_lld_writepad(port, pad, bit) + +/** + * @brief Pad event enable. + * @note Programming an unknown or unsupported mode is silently ignored. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * @param[in] mode pad event mode + * + * @notapi + */ +#define pal_lld_enablepadevent(port, pad, mode) + +/** + * @brief Pad event disable. + * @details This function disables previously programmed event callbacks. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * + * @notapi + */ +#define pal_lld_disablepadevent(port, pad) + +/** + * @brief Returns a PAL event structure associated to a pad. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * + * @notapi + */ +#define pal_lld_get_pad_event(port, pad) + +/** + * @brief Returns a PAL event structure associated to a line. + * + * @param[in] line line identifier + * + * @notapi + */ +#define pal_lld_get_line_event(line) + +/** + * @brief Pad event enable check. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * @return Pad event status. + * @retval false if the pad event is disabled. + * @retval true if the pad event is enabled. + * + * @notapi + */ +#define pal_lld_ispadeventenabled(port, pad) false + +#ifdef __cplusplus +extern "C" { +#endif + void __pal_lld_init(void); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_PAL */ + +#endif /* HAL_PAL_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/RP/RP2040/platform.mk b/os/hal/ports/RP/RP2040/platform.mk index 3f4d9a060..041210123 100644 --- a/os/hal/ports/RP/RP2040/platform.mk +++ b/os/hal/ports/RP/RP2040/platform.mk @@ -25,6 +25,7 @@ else endif # Drivers compatible with the platform. +include $(CHIBIOS)/os/hal/ports/RP/LLD/GPIOv1/driver.mk include $(CHIBIOS)/os/hal/ports/RP/LLD/TIMERv1/driver.mk include $(CHIBIOS)/os/hal/ports/RP/LLD/UARTv1/driver.mk