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MP1 HAL stub files, it compiles. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14807 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2021-09-20 07:49:46 +00:00
parent 13387302f8
commit 568f75e357
11 changed files with 1272 additions and 19 deletions
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8
demos/STM32/RT-STM32MP157A-DK1/Makefile
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@ -99,10 +99,10 @@ include $(CHIBIOS)/os/license/license.mk
# Startup files.
include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32mp1xx.mk
# HAL-OSAL files (optional).
#include $(CHIBIOS)/os/hal/hal.mk
#include $(CHIBIOS)/os/hal/ports/STM32/STM32G4xx/platform.mk
#include $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_G474RE/board.mk
#include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/hal/ports/STM32/STM32MP1xx/platform.mk
include $(CHIBIOS)/os/hal/boards/ST_STM32MP157A_DK1/board.mk
include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk
# RTOS files (optional).
include $(CHIBIOS)/os/rt/rt.mk
include $(CHIBIOS)/os/common/ports/ARMv7-M/compilers/GCC/mk/port.mk

551
demos/STM32/RT-STM32MP157A-DK1/cfg/halconf.h Normal file
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@ -0,0 +1,551 @@
/*
ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file templates/halconf.h
* @brief HAL configuration header.
* @details HAL configuration file, this file allows to enable or disable the
* various device drivers from your application. You may also use
* this file in order to override the device drivers default settings.
*
* @addtogroup HAL_CONF
* @{
*/
#ifndef HALCONF_H
#define HALCONF_H
#define _CHIBIOS_HAL_CONF_
#define _CHIBIOS_HAL_CONF_VER_7_1_
#include "mcuconf.h"
/**
* @brief Enables the PAL subsystem.
*/
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
#define HAL_USE_PAL FALSE
#endif
/**
* @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
#define HAL_USE_ADC FALSE
#endif
/**
* @brief Enables the CAN subsystem.
*/
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
#define HAL_USE_CAN FALSE
#endif
/**
* @brief Enables the cryptographic subsystem.
*/
#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
#define HAL_USE_CRY FALSE
#endif
/**
* @brief Enables the DAC subsystem.
*/
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
#define HAL_USE_DAC FALSE
#endif
/**
* @brief Enables the EFlash subsystem.
*/
#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__)
#define HAL_USE_EFL FALSE
#endif
/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
#define HAL_USE_GPT FALSE
#endif
/**
* @brief Enables the I2C subsystem.
*/
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
#define HAL_USE_I2C FALSE
#endif
/**
* @brief Enables the I2S subsystem.
*/
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
#define HAL_USE_I2S FALSE
#endif
/**
* @brief Enables the ICU subsystem.
*/
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
#define HAL_USE_ICU FALSE
#endif
/**
* @brief Enables the MAC subsystem.
*/
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
#define HAL_USE_MAC FALSE
#endif
/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define HAL_USE_MMC_SPI FALSE
#endif
/**
* @brief Enables the PWM subsystem.
*/
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
#define HAL_USE_SDC FALSE
#endif
/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL FALSE
#endif
/**
* @brief Enables the SERIAL over USB subsystem.
*/
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL_USB FALSE
#endif
/**
* @brief Enables the SIO subsystem.
*/
#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
#define HAL_USE_SIO FALSE
#endif
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
#define HAL_USE_SPI FALSE
#endif
/**
* @brief Enables the TRNG subsystem.
*/
#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
#define HAL_USE_TRNG FALSE
#endif
/**
* @brief Enables the UART subsystem.
*/
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
#define HAL_USE_UART FALSE
#endif
/**
* @brief Enables the USB subsystem.
*/
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
#define HAL_USE_USB FALSE
#endif
/**
* @brief Enables the WDG subsystem.
*/
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
#define HAL_USE_WDG FALSE
#endif
/**
* @brief Enables the WSPI subsystem.
*/
#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
#define HAL_USE_WSPI FALSE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
#define PAL_USE_CALLBACKS FALSE
#endif
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
#define PAL_USE_WAIT FALSE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
#define ADC_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define ADC_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/
/**
* @brief Sleep mode related APIs inclusion switch.
*/
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
#define CAN_USE_SLEEP_MODE TRUE
#endif
/**
* @brief Enforces the driver to use direct callbacks rather than OSAL events.
*/
#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
#define CAN_ENFORCE_USE_CALLBACKS FALSE
#endif
/*===========================================================================*/
/* CRY driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the SW fall-back of the cryptographic driver.
* @details When enabled, this option, activates a fall-back software
* implementation for algorithms not supported by the underlying
* hardware.
* @note Fall-back implementations may not be present for all algorithms.
*/
#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
#define HAL_CRY_USE_FALLBACK FALSE
#endif
/**
* @brief Makes the driver forcibly use the fall-back implementations.
*/
#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
#define HAL_CRY_ENFORCE_FALLBACK FALSE
#endif
/*===========================================================================*/
/* DAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
#define DAC_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define DAC_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* I2C driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the mutual exclusion APIs on the I2C bus.
*/
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define I2C_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the zero-copy API.
*/
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
#define MAC_USE_ZERO_COPY FALSE
#endif
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
* This option is recommended also if the SPI driver does not
* use a DMA channel and heavily loads the CPU.
*/
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
#define MMC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intervals.
*/
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
#define SDC_INIT_RETRY 100
#endif
/**
* @brief Include support for MMC cards.
* @note MMC support is not yet implemented so this option must be kept
* at @p FALSE.
*/
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
#define SDC_MMC_SUPPORT FALSE
#endif
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
*/
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
#define SDC_NICE_WAITING TRUE
#endif
/**
* @brief OCR initialization constant for V20 cards.
*/
#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
#define SDC_INIT_OCR_V20 0x50FF8000U
#endif
/**
* @brief OCR initialization constant for non-V20 cards.
*/
#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
#define SDC_INIT_OCR 0x80100000U
#endif
/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
/**
* @brief Default bit rate.
* @details Configuration parameter, this is the baud rate selected for the
* default configuration.
*/
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
#define SERIAL_DEFAULT_BITRATE 38400
#endif
/**
* @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application.
* @note The default is 16 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 16
#endif
/*===========================================================================*/
/* SIO driver related settings. */
/*===========================================================================*/
/**
* @brief Default bit rate.
* @details Configuration parameter, this is the baud rate selected for the
* default configuration.
*/
#if !defined(SIO_DEFAULT_BITRATE) || defined(__DOXYGEN__)
#define SIO_DEFAULT_BITRATE 38400
#endif
/**
* @brief Support for thread synchronization API.
*/
#if !defined(SIO_USE_SYNCHRONIZATION) || defined(__DOXYGEN__)
#define SIO_USE_SYNCHRONIZATION TRUE
#endif
/*===========================================================================*/
/* SERIAL_USB driver related setting. */
/*===========================================================================*/
/**
* @brief Serial over USB buffers size.
* @details Configuration parameter, the buffer size must be a multiple of
* the USB data endpoint maximum packet size.
* @note The default is 256 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_USB_BUFFERS_SIZE 256
#endif
/**
* @brief Serial over USB number of buffers.
* @note The default is 2 buffers.
*/
#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
#define SERIAL_USB_BUFFERS_NUMBER 2
#endif
/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
#define SPI_USE_WAIT TRUE
#endif
/**
* @brief Enables circular transfers APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
#define SPI_USE_CIRCULAR FALSE
#endif
/**
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/**
* @brief Handling method for SPI CS line.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
#define UART_USE_WAIT FALSE
#endif
/**
* @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define UART_USE_MUTUAL_EXCLUSION FALSE
#endif
/*===========================================================================*/
/* USB driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
#define USB_USE_WAIT FALSE
#endif
/*===========================================================================*/
/* WSPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
#define WSPI_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define WSPI_USE_MUTUAL_EXCLUSION TRUE
#endif
#endif /* HALCONF_H */
/** @} */

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/*
ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* STM32L4xx drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the whole
* driver is enabled in halconf.h.
*
* IRQ priorities:
* 15...0 Lowest...Highest.
*
* DMA priorities:
* 0...3 Lowest...Highest.
*/
#ifndef MCUCONF_H
#define MCUCONF_H
#define STM32MP1xx_MCUCONF
#define STM32MP151A_MCUCONF
#define STM32MP151C_MCUCONF
#define STM32MP151D_MCUCONF
#define STM32MP151F_MCUCONF
#define STM32MP153A_MCUCONF
#define STM32MP153C_MCUCONF
#define STM32MP153D_MCUCONF
#define STM32MP153F_MCUCONF
#define STM32MP157A_MCUCONF
#define STM32MP157C_MCUCONF
#define STM32MP157D_MCUCONF
#define STM32MP157F_MCUCONF
/*
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
/*
* Peripherals clock sources.
*/
/*
* IRQ system settings.
*/
#define STM32_IRQ_TIM1_UP_PRIORITY 7
#define STM32_IRQ_TIM1_CC_PRIORITY 7
#define STM32_IRQ_TIM2_PRIORITY 7
#define STM32_IRQ_TIM3_PRIORITY 7
#define STM32_IRQ_TIM4_PRIORITY 7
#define STM32_IRQ_TIM5_PRIORITY 7
#define STM32_IRQ_TIM6_PRIORITY 7
#define STM32_IRQ_TIM7_PRIORITY 7
#define STM32_IRQ_TIM8_UP_PRIORITY 7
#define STM32_IRQ_TIM8_CC_PRIORITY 7
#define STM32_IRQ_TIM12_PRIORITY 7
#define STM32_IRQ_TIM13_PRIORITY 7
#define STM32_IRQ_TIM14_PRIORITY 7
#define STM32_IRQ_TIM15_PRIORITY 7
#define STM32_IRQ_TIM16_PRIORITY 7
#define STM32_IRQ_TIM17_PRIORITY 7
/*
* ADC driver system settings.
*/
/*
* DAC driver system settings.
*/
/*
* GPT driver system settings.
*/
/*
* I2C driver system settings.
*/
/*
* ICU driver system settings.
*/
/*
* PWM driver system settings.
*/
/*
* RTC driver system settings.
*/
/*
* SDC driver system settings.
*/
/*
* SERIAL driver system settings.
*/
/*
* SIO driver system settings.
*/
/*
* SPI driver system settings.
*/
/*
* ST driver system settings.
*/
#define STM32_ST_IRQ_PRIORITY 8
#define STM32_ST_USE_TIMER 2
/*
* UART driver system settings.
*/
/*
* WDG driver system settings.
*/
#define STM32_WDG_USE_IWDG FALSE
#endif /* MCUCONF_H */

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/*
ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* This file has been automatically generated using ChibiStudio board
* generator plugin. Do not edit manually.
*/
#include "hal.h"
#include "stm32_gpio.h"
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
/**
* @brief Type of STM32 GPIO port setup.
*/
typedef struct {
uint32_t moder;
uint32_t otyper;
uint32_t ospeedr;
uint32_t pupdr;
uint32_t odr;
uint32_t afrl;
uint32_t afrh;
uint32_t ascr;
uint32_t lockr;
} gpio_setup_t;
/**
* @brief Type of STM32 GPIO initialization data.
*/
/**
* @brief STM32 GPIO static initialization data.
*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
static void stm32_gpio_init(void) {
/* Enabling GPIO-related clocks, the mask comes from the
registry header file.*/
rccResetAHB4(STM32_GPIO_EN_MASK);
rccEnableAHB4(STM32_GPIO_EN_MASK, true);
}
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Early initialization code.
* @details GPIO ports and system clocks are initialized before everything
* else.
*/
void __early_init(void) {
stm32_gpio_init();
stm32_clock_init();
}
#if HAL_USE_SDC || defined(__DOXYGEN__)
/**
* @brief SDC card detection.
*/
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
/* CHTODO: Fill the implementation.*/
return true;
}
/**
* @brief SDC card write protection detection.
*/
bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
/* CHTODO: Fill the implementation.*/
return false;
}
#endif /* HAL_USE_SDC */
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* CHTODO: Fill the implementation.*/
return true;
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* CHTODO: Fill the implementation.*/
return false;
}
#endif
/**
* @brief Board-specific initialization code.
* @note You can add your board-specific code here.
*/
void boardInit(void) {
}

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/*
ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* This file has been automatically generated using ChibiStudio board
* generator plugin. Do not edit manually.
*/
#ifndef BOARD_H
#define BOARD_H
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/*
* Setup for STMicroelectronics STM32L476-Discovery board.
*/
/*
* Board identifier.
*/
#define BOARD_ST_STM32L476_DISCOVERY
#define BOARD_NAME "STMicroelectronics STM32MP157A-DK1"
/*
* Board oscillators-related settings.
* NOTE: HSE not fitted.
*/
#if !defined(STM32_LSECLK)
#define STM32_LSECLK 32768U
#endif
#if !defined(STM32_HSECLK)
#define STM32_HSECLK 24000000U
#endif
/*
* MCU type as defined in the ST header.
*/
#define STM32MP157Axx
/*
* IO pins assignments.
*/
/*
* IO lines assignments.
*/
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*
* I/O ports initial setup, this configuration is established soon after reset
* in the initialization code.
* Please refer to the STM32 Reference Manual for details.
*/
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
#define PIN_ODR_LOW(n) (0U << (n))
#define PIN_ODR_HIGH(n) (1U << (n))
#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
#define PIN_ASCR_DISABLED(n) (0U << (n))
#define PIN_ASCR_ENABLED(n) (1U << (n))
#define PIN_LOCKR_DISABLED(n) (0U << (n))
#define PIN_LOCKR_ENABLED(n) (1U << (n))
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* BOARD_H */

9
os/hal/boards/ST_STM32MP157A_DK1/board.mk Normal file
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@ -0,0 +1,9 @@
# List of all the board related files.
BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_STM32MP157A_DK1/board.c
# Required include directories
BOARDINC = $(CHIBIOS)/os/hal/boards/ST_STM32MP157A_DK1
# Shared variables
ALLCSRC += $(BOARDSRC)
ALLINC += $(BOARDINC)

133
os/hal/ports/STM32/STM32MP1xx/hal_lld.c Normal file
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@ -0,0 +1,133 @@
/*
ChibiOS - Copyright (C) 2006..2021 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file STM32MP1xx/hal_lld.c
* @brief STM32MP1xx HAL subsystem low level driver source.
*
* @addtogroup HAL
* @{
*/
#include "hal.h"
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/**
* @brief CMSIS system core clock variable.
* @note It is declared in system_stm32g4xx.h.
*/
uint32_t SystemCoreClock = 0; //STM32_HCLK;
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Low level HAL driver initialization.
*
* @notapi
*/
void hal_lld_init(void) {
/* DMA subsystems initialization.*/
#if defined(STM32_DMA_REQUIRED)
dmaInit();
#endif
/* NVIC initialization.*/
nvicInit();
/* IRQ subsystem initialization.*/
irqInit();
}
#if defined(HAL_LLD_USE_CLOCK_MANAGEMENT) || defined(__DOXYGEN__)
/**
* @brief STM32L4xx clocks and PLL initialization.
* @note All the involved constants come from the file @p board.h.
* @note This function should be invoked just after the system reset.
*
* @special
*/
void stm32_clock_init(void) {
#if !STM32_NO_INIT
#endif /* STM32_NO_INIT */
}
#else /* !defined(HAL_LLD_USE_CLOCK_MANAGEMENT) */
void stm32_clock_init(void) {
#if !STM32_NO_INIT
#endif /* STM32_NO_INIT */
}
#endif /* !defined(HAL_LLD_USE_CLOCK_MANAGEMENT) */
#if defined(HAL_LLD_USE_CLOCK_MANAGEMENT) || defined(__DOXYGEN__)
/**
* @brief Switches to a different clock configuration
*
* @param[in] ccp pointer to clock a @p halclkcfg_t structure
* @return The clock switch result.
* @retval false if the clock switch succeeded
* @retval true if the clock switch failed
*
* @notapi
*/
bool hal_lld_clock_switch_mode(const halclkcfg_t *ccp) {
(void)cpp;
return false;
}
/**
* @brief Returns the frequency of a clock point in Hz.
*
* @param[in] clkpt clock point to be returned
* @return The clock point frequency in Hz or zero if the
* frequency is unknown.
*
* @notapi
*/
halfreq_t hal_lld_get_clock_point(halclkpt_t clkpt) {
osalDbgAssert(clkpt < CLK_ARRAY_SIZE, "invalid clock point");
return clock_points[clkpt];
}
#endif /* defined(HAL_LLD_USE_CLOCK_MANAGEMENT) */
/** @} */

2
os/hal/ports/STM32/STM32MP1xx/hal_lld.h
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@ -37,6 +37,8 @@
#include "stm32_registry.h"
#define STM32_HCLK 0
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/

1
os/hal/ports/STM32/STM32MP1xx/platform.mk
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@ -26,6 +26,7 @@ endif
# Drivers compatible with the platform.
include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/SYSTICKv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/xWDGv1/driver.mk

163
os/hal/ports/STM32/STM32MP1xx/stm32_rcc.h Normal file
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@ -0,0 +1,163 @@
/*
ChibiOS - Copyright (C) 2006..2021 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file STM32MP1xx/stm32_rcc.h
* @brief RCC helper driver header.
* @note This file requires definitions from the ST header file
* @p stm32mp1xx.h.
*
* @addtogroup STM32MP1xx_RCC
* @{
*/
#ifndef STM32_RCC_H
#define STM32_RCC_H
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/**
* @name Generic RCC operations
* @{
*/
/**
* @brief Enables the clock of one or more peripheral on the APB1 bus.
*
* @param[in] mask APB1 peripherals mask
* @param[in] lp low power enable flag
*
* @api
*/
__STATIC_FORCEINLINE void rccEnableAPB1(uint32_t mask, bool lp) {
RCC->MC_APB1ENSETR = mask;
if (lp) {
RCC->MC_APB1LPENSETR = mask;
}
else {
RCC->MC_APB1LPENCLRR = mask;
}
(void) RCC->MC_APB1ENSETR;
}
/**
* @brief Disables the clock of one or more peripheral on the APB1 bus).
*
* @param[in] mask APB1 peripherals mask
*
* @api
*/
__STATIC_FORCEINLINE void rccDisableAPB1(uint32_t mask) {
RCC->MC_APB1ENCLRR = mask;
RCC->MC_APB1LPENCLRR = mask;
(void) RCC->MC_APB1LPENCLRR;
}
/**
* @brief Resets one or more peripheral on the APB1 bus.
*
* @param[in] mask APB1 peripherals mask
*
* @api
*/
__STATIC_FORCEINLINE void rccResetAPB1(uint32_t mask) {
RCC->APB1RSTSETR = mask;
RCC->APB1RSTCLRR = mask;
(void) RCC->APB1RSTCLRR;
}
/**
* @brief Enables the clock of one or more peripheral on the AHB4 bus.
*
* @param[in] mask AHB4 peripherals mask
* @param[in] lp low power enable flag
*
* @api
*/
__STATIC_FORCEINLINE void rccEnableAHB4(uint32_t mask, bool lp) {
RCC->MC_AHB4ENSETR = mask;
if (lp) {
RCC->MC_AHB4LPENSETR = mask;
}
else {
RCC->MC_AHB4LPENCLRR = mask;
}
(void) RCC->MC_AHB4ENSETR;
}
/**
* @brief Disables the clock of one or more peripheral on the AHB4 bus).
*
* @param[in] mask AHB4 peripherals mask
*
* @api
*/
__STATIC_FORCEINLINE void rccDisableAHB4(uint32_t mask) {
RCC->MC_AHB4ENCLRR = mask;
RCC->MC_AHB4LPENCLRR = mask;
(void) RCC->MC_AHB4LPENCLRR;
}
/**
* @brief Resets one or more peripheral on the AHB4 bus.
*
* @param[in] mask AHB4 peripherals mask
*
* @api
*/
__STATIC_FORCEINLINE void rccResetAHB4(uint32_t mask) {
RCC->AHB4RSTSETR = mask;
RCC->AHB4RSTCLRR = mask;
(void) RCC->AHB4RSTCLRR;
}
/** @} */
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif /* STM32_RCC_H */
/** @} */

26
os/hal/ports/STM32/STM32MP1xx/stm32_registry.h
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@ -96,17 +96,17 @@
#define STM32_HAS_GPIOJ TRUE
#define STM32_HAS_GPIOK TRUE
#define STM32_HAS_GPIOZ TRUE
#define STM32_GPIO_EN_MASK (RCC_AHB4ENR_GPIOAEN | \
RCC_AHB4ENR_GPIOBEN | \
RCC_AHB4ENR_GPIOCEN | \
RCC_AHB4ENR_GPIODEN | \
RCC_AHB4ENR_GPIOEEN | \
RCC_AHB4ENR_GPIOFEN | \
RCC_AHB4ENR_GPIOGEN | \
RCC_AHB4ENR_GPIOHEN | \
RCC_AHB4ENR_GPIOIEN | \
RCC_AHB4ENR_GPIOJEN | \
RCC_AHB4ENR_GPIOKEN)
#define STM32_GPIO_EN_MASK (RCC_MC_AHB4ENSETR_GPIOAEN | \
RCC_MC_AHB4ENSETR_GPIOBEN | \
RCC_MC_AHB4ENSETR_GPIOCEN | \
RCC_MC_AHB4ENSETR_GPIODEN | \
RCC_MC_AHB4ENSETR_GPIOEEN | \
RCC_MC_AHB4ENSETR_GPIOFEN | \
RCC_MC_AHB4ENSETR_GPIOGEN | \
RCC_MC_AHB4ENSETR_GPIOHEN | \
RCC_MC_AHB4ENSETR_GPIOIEN | \
RCC_MC_AHB4ENSETR_GPIOJEN | \
RCC_MC_AHB4ENSETR_GPIOKEN)
/* I2C attributes.*/
@ -175,10 +175,6 @@
#define STM32_TIM17_IS_32BITS FALSE
#define STM32_TIM17_CHANNELS 1
#define STM32_HAS_TIM20 TRUE
#define STM32_TIM20_IS_32BITS FALSE
#define STM32_TIM20_CHANNELS 6
#define STM32_HAS_TIM9 FALSE
#define STM32_HAS_TIM10 FALSE
#define STM32_HAS_TIM11 FALSE