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Fixed MPU regions switching. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14883 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2021-10-08 12:25:37 +00:00
parent df3b1c734a
commit 56bae94e37
2 changed files with 55 additions and 49 deletions
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54
os/common/ports/ARMv7-M-ALT/chcore.h
View File

@ -116,7 +116,7 @@
* @TODO
*/
#if !defined(PORT_USE_SYSCALL) || defined(__DOXYGEN__)
#define PORT_USE_SYSCALL TRUE
#define PORT_USE_SYSCALL FALSE
#endif
/**
@ -468,12 +468,6 @@ struct port_intctx {
uint32_t s30;
uint32_t s31;
#endif /* CORTEX_USE_FPU == TRUE */
#if (PORT_SWITCHED_REGIONS_NUMBER > 0) || defined(__DOXYGEN__)
struct {
uint32_t rbar;
uint32_t rasr;
} regions[PORT_SWITCHED_REGIONS_NUMBER];
#endif
};
/**
@ -485,6 +479,12 @@ struct port_intctx {
struct port_context {
struct port_extctx *sp;
struct port_intctx regs;
#if (PORT_SWITCHED_REGIONS_NUMBER > 0) || defined(__DOXYGEN__)
struct {
uint32_t rbar;
uint32_t rasr;
} regions[PORT_SWITCHED_REGIONS_NUMBER];
#endif
#if (PORT_USE_SYSCALL == TRUE) || defined(__DOXYGEN__)
struct {
uint32_t s_psp;
@ -548,35 +548,35 @@ struct port_context {
#elif (PORT_SWITCHED_REGIONS_NUMBER == 1) || defined(__DOXYGEN__)
#define __PORT_SETUP_CONTEXT_MPU(tp) \
(tp)->ctx.sp->regions[0].rbar = 0U; \
(tp)->ctx.sp->regions[0].rasr = 0U
(tp)->ctx.regions[0].rbar = 0U; \
(tp)->ctx.regions[0].rasr = 0U
#elif (PORT_SWITCHED_REGIONS_NUMBER == 2) || defined(__DOXYGEN__)
#define __PORT_SETUP_CONTEXT_MPU(tp) \
(tp)->ctx.sp->regions[0].rbar = 0U; \
(tp)->ctx.sp->regions[0].rasr = 0U; \
(tp)->ctx.sp->regions[1].rbar = 0U; \
(tp)->ctx.sp->regions[1].rasr = 0U
(tp)->ctx.regions[0].rbar = 0U; \
(tp)->ctx.regions[0].rasr = 0U; \
(tp)->ctx.regions[1].rbar = 0U; \
(tp)->ctx.regions[1].rasr = 0U
#elif (PORT_SWITCHED_REGIONS_NUMBER == 3) || defined(__DOXYGEN__)
#define __PORT_SETUP_CONTEXT_MPU(tp) \
(tp)->ctx.sp->regions[0].rbar = 0U; \
(tp)->ctx.sp->regions[0].rasr = 0U; \
(tp)->ctx.sp->regions[1].rbar = 0U; \
(tp)->ctx.sp->regions[1].rasr = 0U; \
(tp)->ctx.sp->regions[2].rbar = 0U; \
(tp)->ctx.sp->regions[2].rasr = 0U
(tp)->ctx.regions[0].rbar = 0U; \
(tp)->ctx.regions[0].rasr = 0U; \
(tp)->ctx.regions[1].rbar = 0U; \
(tp)->ctx.regions[1].rasr = 0U; \
(tp)->ctx.regions[2].rbar = 0U; \
(tp)->ctx.regions[2].rasr = 0U
#elif (PORT_SWITCHED_REGIONS_NUMBER == 4) || defined(__DOXYGEN__)
#define __PORT_SETUP_CONTEXT_MPU(tp) \
(tp)->ctx.sp->regions[0].rbar = 0U; \
(tp)->ctx.sp->regions[0].rasr = 0U; \
(tp)->ctx.sp->regions[1].rbar = 0U; \
(tp)->ctx.sp->regions[1].rasr = 0U; \
(tp)->ctx.sp->regions[2].rbar = 0U; \
(tp)->ctx.sp->regions[2].rasr = 0U; \
(tp)->ctx.sp->regions[3].rbar = 0U; \
(tp)->ctx.sp->regions[3].rasr = 0U
(tp)->ctx.regions[0].rbar = 0U; \
(tp)->ctx.regions[0].rasr = 0U; \
(tp)->ctx.regions[1].rbar = 0U; \
(tp)->ctx.regions[1].rasr = 0U; \
(tp)->ctx.regions[2].rbar = 0U; \
(tp)->ctx.regions[2].rasr = 0U; \
(tp)->ctx.regions[3].rbar = 0U; \
(tp)->ctx.regions[3].rasr = 0U
#else
/* Note, checked above.*/

50
os/common/ports/ARMv7-M-ALT/compilers/GCC/chcoreasm.S
View File

@ -170,39 +170,45 @@
.macro PORT_LOAD_MPU_CONTEXT
#if PORT_SWITCHED_REGIONS_NUMBER == 1
ldr r2, =MPU_RNR
mov r3, #0
ldmia r0!, {r4-r5}
stm r2, {r3, r4-r5} /* RNR, RBAR0, RASR0 */
mov r1, #0
ldmia r0!, {r3, r12}
stm r2, {r1, r3, r12} /* RNR, RBAR0, RASR0 */
#endif
#if PORT_SWITCHED_REGIONS_NUMBER == 2
ldr r2, =MPU_RNR
mov r3, #0
ldmia r0!, {r4-r7}
stm r2, {r3, r4-r5} /* RNR, RBAR0, RASR0 */
add r3, #1
stm r2, {r3, r6-r7} /* RNR, RBAR1, RASR1 */
mov r1, #0
ldmia r0!, {r3, r12}
stm r2, {r1, r3, r12} /* RNR, RBAR0, RASR0 */
mov r1, #1
ldmia r0!, {r3, r12}
stm r2, {r1, r3, r12} /* RNR, RBAR1, RASR1 */
#endif
#if PORT_SWITCHED_REGIONS_NUMBER == 3
ldr r2, =MPU_RNR
mov r3, #0
ldmia r0!, {r4-r9}
stm r2, {r3, r4-r5} /* RNR, RBAR0, RASR0 */
add r3, #1
stm r2, {r3, r6-r7} /* RNR, RBAR1, RASR1 */
add r3, #1
stm r2, {r3, r8-r9} /* RNR, RBAR2, RASR2 */
ldmia r0!, {r3, r12}
stm r2, {r1, r3, r12} /* RNR, RBAR0, RASR0 */
mov r1, #1
ldmia r0!, {r3, r12}
stm r2, {r1, r3, r12} /* RNR, RBAR1, RASR1 */
mov r1, #2
ldmia r0!, {r3, r12}
stm r2, {r1, r3, r12} /* RNR, RBAR2, RASR2 */
#endif
#if PORT_SWITCHED_REGIONS_NUMBER == 4
ldr r2, =MPU_RNR
mov r3, #0
ldmia r0!, {r4-r11}
stm r2, {r3, r4-r5} /* RNR, RBAR0, RASR0 */
add r3, #1
stm r2, {r3, r6-r7} /* RNR, RBAR1, RASR1 */
add r3, #1
stm r2, {r3, r8-r9} /* RNR, RBAR2, RASR2 */
add r3, #1
stm r2, {r3, r10-r11} /* RNR, RBAR3, RASR3 */
ldmia r0!, {r3, r12}
stm r2, {r1, r3, r12} /* RNR, RBAR0, RASR0 */
mov r1, #1
ldmia r0!, {r3, r12}
stm r2, {r1, r3, r12} /* RNR, RBAR1, RASR1 */
mov r1, #2
ldmia r0!, {r3, r12}
stm r2, {r1, r3, r12} /* RNR, RBAR2, RASR2 */
mov r1, #3
ldmia r0!, {r3, r12}
stm r2, {r1, r3, r12} /* RNR, RBAR3, RASR3 */
#endif
.endm