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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6081 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2013-08-05 14:08:52 +00:00
parent 1d3b6b4198
commit 56c848ffd6
8 changed files with 551 additions and 346 deletions
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119
os/halnew/include/hal.h
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@ -30,6 +30,7 @@
#define _HAL_H_
#include "osal.h"
#include "st.h"
#include "board.h"
#include "halconf.h"
@ -38,14 +39,13 @@
/* Abstract interfaces.*/
#include "hal_streams.h"
#include "hal_channels.h"
#include "hal_queues.h"
/* Shared headers.*/
//#include "io_block.h"
//#include "mmcsd.h"
/* Shared headers.*/
#include "hal_queues.h"
/* Normal drivers.*/
//#include "tm.h"
#include "pal.h"
#include "adc.h"
#include "can.h"
@ -86,113 +86,6 @@
/* Driver macros. */
/*===========================================================================*/
#if HAL_IMPLEMENTS_COUNTERS || defined(__DOXYGEN__)
/**
* @name Time conversion utilities for the realtime counter
* @{
*/
/**
* @brief Seconds to realtime ticks.
* @details Converts from seconds to realtime ticks number.
* @note The result is rounded upward to the next tick boundary.
*
* @param[in] sec number of seconds
* @return The number of ticks.
*
* @api
*/
#define S2RTT(sec) (halGetCounterFrequency() * (sec))
/**
* @brief Milliseconds to realtime ticks.
* @details Converts from milliseconds to realtime ticks number.
* @note The result is rounded upward to the next tick boundary.
*
* @param[in] msec number of milliseconds
* @return The number of ticks.
*
* @api
*/
#define MS2RTT(msec) (((halGetCounterFrequency() + 999UL) / 1000UL) * (msec))
/**
* @brief Microseconds to realtime ticks.
* @details Converts from microseconds to realtime ticks number.
* @note The result is rounded upward to the next tick boundary.
*
* @param[in] usec number of microseconds
* @return The number of ticks.
*
* @api
*/
#define US2RTT(usec) (((halGetCounterFrequency() + 999999UL) / 1000000UL) * \
(usec))
/**
* @brief Realtime ticks to seconds to.
* @details Converts from realtime ticks number to seconds.
*
* @param[in] ticks number of ticks
* @return The number of seconds.
*
* @api
*/
#define RTT2S(ticks) ((ticks) / halGetCounterFrequency())
/**
* @brief Realtime ticks to milliseconds.
* @details Converts from realtime ticks number to milliseconds.
*
* @param[in] ticks number of ticks
* @return The number of milliseconds.
*
* @api
*/
#define RTT2MS(ticks) ((ticks) / (halGetCounterFrequency() / 1000UL))
/**
* @brief Realtime ticks to microseconds.
* @details Converts from realtime ticks number to microseconds.
*
* @param[in] ticks number of ticks
* @return The number of microseconds.
*
* @api
*/
#define RTT2US(ticks) ((ticks) / (halGetCounterFrequency() / 1000000UL))
/** @} */
/**
* @name Macro Functions
* @{
*/
/**
* @brief Returns the current value of the system free running counter.
* @note This is an optional service that could not be implemented in
* all HAL implementations.
* @note This function can be called from any context.
*
* @return The value of the system free running counter of
* type halrtcnt_t.
*
* @special
*/
#define halGetCounterValue() hal_lld_get_counter_value()
/**
* @brief Realtime counter frequency.
* @note This is an optional service that could not be implemented in
* all HAL implementations.
* @note This function can be called from any context.
*
* @return The realtime counter frequency of type halclock_t.
*
* @special
*/
#define halGetCounterFrequency() hal_lld_get_counter_frequency()
/** @} */
#endif /* HAL_IMPLEMENTS_COUNTERS */
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
@ -201,10 +94,6 @@
extern "C" {
#endif
void halInit(void);
#if HAL_IMPLEMENTS_COUNTERS
bool_t halIsCounterWithin(halrtcnt_t start, halrtcnt_t end);
void halPolledDelay(halrtcnt_t ticks);
#endif /* HAL_IMPLEMENTS_COUNTERS */
#ifdef __cplusplus
}
#endif

72
os/halnew/include/st.h Normal file
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@ -0,0 +1,72 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file st.h
* @brief ST Driver macros and structures.
*
* @addtogroup ST
* @{
*/
#ifndef _ST_H_
#define _ST_H_
#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
#include "st_lld.h"
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#ifdef __cplusplus
extern "C" {
#endif
void stInit(void);
#ifdef __cplusplus
}
#endif
#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */
#endif /* _ST_H_ */
/** @} */

126
os/halnew/platforms/STM32/st_lld.c Normal file
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@ -0,0 +1,126 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file STM32/st_lld.c
* @brief ST Driver subsystem low level driver code.
*
* @addtogroup ST
* @{
*/
#include "hal.h"
#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__)
/**
* @brief System Timer vector.
* @details This interrupt is used for system tick in periodic mode.
*
* @isr
*/
OSAL_IRQ_HANDLER(SysTickVector) {
OSAL_IRQ_PROLOGUE();
osalSysLockFromISR();
osalOsTimerHandlerI();
osalSysUnlockFromISR();
OSAL_IRQ_EPILOGUE();
}
#endif
#if (OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING) || defined(__DOXYGEN__)
/**
* @brief TIM2 interrupt handler.
* @details This interrupt is used for system tick in free running mode.
*
* @isr
*/
OSAL_IRQ_HANDLER(STM32_TIM2_HANDLER) {
OSAL_IRQ_PROLOGUE();
STM32_TIM2->SR = 0;
osalSysLockFromISR();
osalTimerHandlerI();
osalSysUnlockFromISR();
OSAL_IRQ_EPILOGUE();
}
#endif
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Low level ST driver initialization.
*
* @notapi
*/
void st_lld_init(void) {
#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
/* Free running counter mode.*/
rccEnableTIM2(FALSE);
nvicEnableVector(STM32_TIM2_NUMBER, ST_TIMER_PRIORITY_MASK);
STM32_TIM2->PSC = STM32_TIMCLK2 / OSAL_SYSTICK_FREQUENCY - 1;
#endif
#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
/* Periodic systick mode, the Cortex-Mx internal systick timer is used
in this mode.*/
SysTick->LOAD = STM32_HCLK / OSAL_SYSTICK_FREQUENCY - 1;
SysTick->VAL = 0;
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
SysTick_CTRL_ENABLE_Msk |
SysTick_CTRL_TICKINT_Msk;
nvicSetSystemHandlerPriority(HANDLER_SYSTICK, ST_TIMER_PRIORITY_MASK);
#endif
}
#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */
/** @} */

95
os/halnew/platforms/STM32/st_lld.h Normal file
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@ -0,0 +1,95 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file STM32/st_lld.h
* @brief ST Driver subsystem low level driver header.
*
* @addtogroup ST
* @{
*/
#ifndef _ST_LLD_H_
#define _ST_LLD_H_
#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @name Configuration options
* @{
*/
/**
* @brief SysTick timer priority mask.
*/
#if !defined(ST_TIMER_PRIORITY_MASK) || defined(__DOXYGEN__)
#define ST_TIMER_PRIORITY_MASK 0x80
#endif
/** @} */
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if !(OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) && \
!(OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING)
#error "invalid OSAL_ST_MODE setting in osal.h"
#endif
#if (OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING) && !STM32_HAS_TIM2
#error "TIM2 not present in the selected device"
#endif
#if (OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING) && !STM32_TIM2_IS_32BITS
#error "TIM2 is not a 32 bits timer"
#endif
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#ifdef __cplusplus
extern "C" {
#endif
void st_lld_init(void);
#ifdef __cplusplus
}
#endif
/*===========================================================================*/
/* Driver inline functions. */
/*===========================================================================*/
#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */
#endif /* _ST_LLD_H_ */
/** @} */

283
os/halnew/platforms/STM32F30x/stm32_registry.h
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@ -34,174 +34,199 @@
* @{
*/
/* ADC attributes.*/
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1))
#define STM32_ADC1_DMA_CHN 0x00000000
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1))
#define STM32_ADC1_DMA_CHN 0x00000000
#define STM32_HAS_ADC2 TRUE
#define STM32_ADC2_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 1) | \
STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_ADC2_DMA_CHN 0x00000000
#define STM32_HAS_ADC2 TRUE
#define STM32_ADC2_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 1) | \
STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_ADC2_DMA_CHN 0x00000000
#define STM32_HAS_ADC3 TRUE
#define STM32_ADC3_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 5))
#define STM32_ADC3_DMA_CHN 0x00000000
#define STM32_HAS_ADC3 TRUE
#define STM32_ADC3_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 5))
#define STM32_ADC3_DMA_CHN 0x00000000
#define STM32_HAS_ADC4 TRUE
#define STM32_ADC4_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 2) | \
STM32_DMA_STREAM_ID_MSK(2, 4))
#define STM32_ADC4_DMA_CHN 0x00000000
#define STM32_HAS_ADC4 TRUE
#define STM32_ADC4_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 2) | \
STM32_DMA_STREAM_ID_MSK(2, 4))
#define STM32_ADC4_DMA_CHN 0x00000000
#define STM32_HAS_SDADC1 FALSE
#define STM32_SDADC1_DMA_MSK 0
#define STM32_SDADC1_DMA_CHN 0x00000000
#define STM32_HAS_SDADC2 FALSE
#define STM32_SDADC2_DMA_MSK 0
#define STM32_SDADC2_DMA_CHN 0x00000000
#define STM32_HAS_SDADC3 FALSE
#define STM32_SDADC3_DMA_MSK 0
#define STM32_SDADC3_DMA_CHN 0x00000000
#define STM32_HAS_SDADC1 FALSE
#define STM32_HAS_SDADC2 FALSE
#define STM32_HAS_SDADC3 FALSE
/* CAN attributes.*/
#define STM32_HAS_CAN1 TRUE
#define STM32_HAS_CAN2 FALSE
#define STM32_CAN_MAX_FILTERS 14
#define STM32_HAS_CAN1 TRUE
#define STM32_HAS_CAN2 FALSE
#define STM32_CAN_MAX_FILTERS 14
/* DAC attributes.*/
#define STM32_HAS_DAC TRUE
#define STM32_HAS_DAC1 TRUE
#define STM32_HAS_DAC2 TRUE
/* DMA attributes.*/
#define STM32_ADVANCED_DMA FALSE
#define STM32_HAS_DMA1 TRUE
#define STM32_HAS_DMA2 TRUE
#define STM32_ADVANCED_DMA FALSE
#define STM32_HAS_DMA1 TRUE
#define STM32_HAS_DMA2 TRUE
/* ETH attributes.*/
#define STM32_HAS_ETH FALSE
#define STM32_HAS_ETH FALSE
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 34
#define STM32_EXTI_NUM_CHANNELS 34
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
#define STM32_HAS_GPIOB TRUE
#define STM32_HAS_GPIOC TRUE
#define STM32_HAS_GPIOD TRUE
#define STM32_HAS_GPIOE TRUE
#define STM32_HAS_GPIOF TRUE
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
#define STM32_HAS_GPIOA TRUE
#define STM32_HAS_GPIOB TRUE
#define STM32_HAS_GPIOC TRUE
#define STM32_HAS_GPIOD TRUE
#define STM32_HAS_GPIOE TRUE
#define STM32_HAS_GPIOF TRUE
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
/* I2C attributes.*/
#define STM32_HAS_I2C1 TRUE
#define STM32_I2C1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 7))
#define STM32_I2C1_RX_DMA_CHN 0x00000000
#define STM32_I2C1_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 6))
#define STM32_I2C1_TX_DMA_CHN 0x00000000
#define STM32_HAS_I2C1 TRUE
#define STM32_I2C1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 7))
#define STM32_I2C1_RX_DMA_CHN 0x00000000
#define STM32_I2C1_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 6))
#define STM32_I2C1_TX_DMA_CHN 0x00000000
#define STM32_HAS_I2C2 TRUE
#define STM32_I2C2_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 5))
#define STM32_I2C2_RX_DMA_CHN 0x00000000
#define STM32_I2C2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 4))
#define STM32_I2C2_TX_DMA_CHN 0x00000000
#define STM32_HAS_I2C2 TRUE
#define STM32_I2C2_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 5))
#define STM32_I2C2_RX_DMA_CHN 0x00000000
#define STM32_I2C2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 4))
#define STM32_I2C2_TX_DMA_CHN 0x00000000
#define STM32_HAS_I2C3 FALSE
#define STM32_I2C3_RX_DMA_MSK 0
#define STM32_I2C3_RX_DMA_CHN 0x00000000
#define STM32_I2C3_TX_DMA_MSK 0
#define STM32_I2C3_TX_DMA_CHN 0x00000000
#define STM32_HAS_I2C3 FALSE
#define STM32_I2C3_RX_DMA_MSK 0
#define STM32_I2C3_RX_DMA_CHN 0x00000000
#define STM32_I2C3_TX_DMA_MSK 0
#define STM32_I2C3_TX_DMA_CHN 0x00000000
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_IS_CALENDAR TRUE
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_IS_CALENDAR TRUE
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
#define STM32_HAS_SDIO FALSE
/* SPI attributes.*/
#define STM32_HAS_SPI1 TRUE
#define STM32_SPI1_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2)
#define STM32_SPI1_RX_DMA_CHN 0x00000000
#define STM32_SPI1_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3)
#define STM32_SPI1_TX_DMA_CHN 0x00000000
#define STM32_HAS_SPI1 TRUE
#define STM32_SPI1_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2)
#define STM32_SPI1_RX_DMA_CHN 0x00000000
#define STM32_SPI1_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3)
#define STM32_SPI1_TX_DMA_CHN 0x00000000
#define STM32_HAS_SPI2 TRUE
#define STM32_SPI2_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4)
#define STM32_SPI2_RX_DMA_CHN 0x00000000
#define STM32_SPI2_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5)
#define STM32_SPI2_TX_DMA_CHN 0x00000000
#define STM32_HAS_SPI2 TRUE
#define STM32_SPI2_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4)
#define STM32_SPI2_RX_DMA_CHN 0x00000000
#define STM32_SPI2_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5)
#define STM32_SPI2_TX_DMA_CHN 0x00000000
#define STM32_HAS_SPI3 TRUE
#define STM32_SPI3_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 1)
#define STM32_SPI3_RX_DMA_CHN 0x00000000
#define STM32_SPI3_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 2)
#define STM32_SPI3_TX_DMA_CHN 0x00000000
#define STM32_HAS_SPI3 TRUE
#define STM32_SPI3_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 1)
#define STM32_SPI3_RX_DMA_CHN 0x00000000
#define STM32_SPI3_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 2)
#define STM32_SPI3_TX_DMA_CHN 0x00000000
/* TIM attributes.*/
#define STM32_HAS_TIM1 TRUE
#define STM32_HAS_TIM2 TRUE
#define STM32_HAS_TIM3 TRUE
#define STM32_HAS_TIM4 TRUE
#define STM32_HAS_TIM5 FALSE
#define STM32_HAS_TIM6 TRUE
#define STM32_HAS_TIM7 TRUE
#define STM32_HAS_TIM8 TRUE
#define STM32_HAS_TIM9 FALSE
#define STM32_HAS_TIM10 FALSE
#define STM32_HAS_TIM11 FALSE
#define STM32_HAS_TIM12 FALSE
#define STM32_HAS_TIM13 FALSE
#define STM32_HAS_TIM14 FALSE
#define STM32_HAS_TIM15 TRUE
#define STM32_HAS_TIM16 TRUE
#define STM32_HAS_TIM17 TRUE
#define STM32_HAS_TIM18 FALSE
#define STM32_HAS_TIM19 FALSE
#define STM32_TIM_MAX_CHANNELS 6
#define STM32_HAS_TIM1 TRUE
#define STM32_TIM1_IS_32BITS FALSE
#define STM32_TIM1_CHANNELS 6
#define STM32_HAS_TIM2 TRUE
#define STM32_TIM2_IS_32BITS TRUE
#define STM32_TIM2_CHANNELS 4
#define STM32_HAS_TIM3 TRUE
#define STM32_TIM3_IS_32BITS FALSE
#define STM32_TIM3_CHANNELS 4
#define STM32_HAS_TIM4 TRUE
#define STM32_TIM4_IS_32BITS FALSE
#define STM32_TIM4_CHANNELS 4
#define STM32_HAS_TIM6 TRUE
#define STM32_TIM6_IS_32BITS FALSE
#define STM32_TIM6_CHANNELS 0
#define STM32_HAS_TIM7 TRUE
#define STM32_TIM7_IS_32BITS FALSE
#define STM32_TIM7_CHANNELS 0
#define STM32_HAS_TIM8 TRUE
#define STM32_TIM8_IS_32BITS FALSE
#define STM32_TIM8_CHANNELS 6
#define STM32_HAS_TIM15 TRUE
#define STM32_TIM15_IS_32BITS FALSE
#define STM32_TIM15_CHANNELS 2
#define STM32_HAS_TIM16 TRUE
#define STM32_TIM16_IS_32BITS FALSE
#define STM32_TIM16_CHANNELS 2
#define STM32_HAS_TIM17 TRUE
#define STM32_TIM17_IS_32BITS FALSE
#define STM32_TIM17_CHANNELS 2
#define STM32_HAS_TIM5 FALSE
#define STM32_HAS_TIM9 FALSE
#define STM32_HAS_TIM10 FALSE
#define STM32_HAS_TIM11 FALSE
#define STM32_HAS_TIM12 FALSE
#define STM32_HAS_TIM13 FALSE
#define STM32_HAS_TIM14 FALSE
#define STM32_HAS_TIM18 FALSE
#define STM32_HAS_TIM19 FALSE
/* USART attributes.*/
#define STM32_HAS_USART1 TRUE
#define STM32_USART1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 5))
#define STM32_USART1_RX_DMA_CHN 0x00000000
#define STM32_USART1_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 4))
#define STM32_USART1_TX_DMA_CHN 0x00000000
#define STM32_HAS_USART1 TRUE
#define STM32_USART1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 5))
#define STM32_USART1_RX_DMA_CHN 0x00000000
#define STM32_USART1_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 4))
#define STM32_USART1_TX_DMA_CHN 0x00000000
#define STM32_HAS_USART2 TRUE
#define STM32_USART2_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 6))
#define STM32_USART2_RX_DMA_CHN 0x00000000
#define STM32_USART2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 7))
#define STM32_USART2_TX_DMA_CHN 0x00000000
#define STM32_HAS_USART2 TRUE
#define STM32_USART2_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 6))
#define STM32_USART2_RX_DMA_CHN 0x00000000
#define STM32_USART2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 7))
#define STM32_USART2_TX_DMA_CHN 0x00000000
#define STM32_HAS_USART3 TRUE
#define STM32_USART3_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 3))
#define STM32_USART3_RX_DMA_CHN 0x00000000
#define STM32_USART3_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2))
#define STM32_USART3_TX_DMA_CHN 0x00000000
#define STM32_HAS_USART3 TRUE
#define STM32_USART3_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 3))
#define STM32_USART3_RX_DMA_CHN 0x00000000
#define STM32_USART3_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2))
#define STM32_USART3_TX_DMA_CHN 0x00000000
#define STM32_HAS_UART4 FALSE
#define STM32_UART4_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_UART4_RX_DMA_CHN 0x00000000
#define STM32_UART4_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 5))
#define STM32_UART4_TX_DMA_CHN 0x00000000
#define STM32_HAS_UART4 TRUE
#define STM32_UART4_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_UART4_RX_DMA_CHN 0x00000000
#define STM32_UART4_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 5))
#define STM32_UART4_TX_DMA_CHN 0x00000000
#define STM32_HAS_UART5 FALSE
#define STM32_UART5_RX_DMA_MSK 0
#define STM32_UART5_RX_DMA_CHN 0x00000000
#define STM32_UART5_TX_DMA_MSK 0
#define STM32_UART5_TX_DMA_CHN 0x00000000
#define STM32_HAS_UART5 TRUE
#define STM32_UART5_RX_DMA_MSK 0
#define STM32_UART5_RX_DMA_CHN 0x00000000
#define STM32_UART5_TX_DMA_MSK 0
#define STM32_UART5_TX_DMA_CHN 0x00000000
#define STM32_HAS_USART6 FALSE
#define STM32_USART6_RX_DMA_MSK 0
#define STM32_USART6_RX_DMA_CHN 0x00000000
#define STM32_USART6_TX_DMA_MSK 0
#define STM32_USART6_TX_DMA_CHN 0x00000000
#define STM32_HAS_USART6 FALSE
#define STM32_USART6_RX_DMA_MSK 0
#define STM32_USART6_RX_DMA_CHN 0x00000000
#define STM32_USART6_TX_DMA_MSK 0
#define STM32_USART6_TX_DMA_CHN 0x00000000
/* USB attributes.*/
#define STM32_HAS_USB TRUE
#define STM32_HAS_OTG1 FALSE
#define STM32_HAS_OTG2 FALSE
#define STM32_HAS_USB TRUE
#define STM32_HAS_OTG1 FALSE
#define STM32_HAS_OTG2 FALSE
/** @} */
#endif /* _STM32_REGISTRY_H_ */

79
os/halnew/src/hal.c
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@ -59,6 +59,10 @@
*/
void halInit(void) {
/* Initializes the OS Abstraction Layer.*/
osalInit();
/* Platform low level initializations.*/
hal_lld_init();
#if HAL_USE_TM || defined(__DOXYGEN__)
@ -115,79 +119,14 @@ void halInit(void) {
#if HAL_USE_RTC || defined(__DOXYGEN__)
rtcInit();
#endif
/* Board specific initialization.*/
boardInit();
}
#if HAL_IMPLEMENTS_COUNTERS || defined(__DOXYGEN__)
/**
* @brief Realtime window test.
* @details This function verifies if the current realtime counter value
* lies within the specified range or not. The test takes care
* of the realtime counter wrapping to zero on overflow.
* @note When start==end then the function returns always true because the
* whole time range is specified.
* @note This is an optional service that could not be implemented in
* all HAL implementations.
* @note This function can be called from any context.
*
* @par Example 1
* Example of a guarded loop using the realtime counter. The loop implements
* a timeout after one second.
* @code
* halrtcnt_t start = halGetCounterValue();
* halrtcnt_t timeout = start + S2RTT(1);
* while (my_condition) {
* if (!halIsCounterWithin(start, timeout)
* return TIMEOUT;
* // Do something.
* }
* // Continue.
* @endcode
*
* @par Example 2
* Example of a loop that lasts exactly 50 microseconds.
* @code
* halrtcnt_t start = halGetCounterValue();
* halrtcnt_t timeout = start + US2RTT(50);
* while (halIsCounterWithin(start, timeout)) {
* // Do something.
* }
* // Continue.
* @endcode
*
* @param[in] start the start of the time window (inclusive)
* @param[in] end the end of the time window (non inclusive)
* @retval TRUE current time within the specified time window.
* @retval FALSE current time not within the specified time window.
*
* @special
*/
bool_t halIsCounterWithin(halrtcnt_t start, halrtcnt_t end) {
halrtcnt_t now = halGetCounterValue();
return end > start ? (now >= start) && (now < end) :
(now >= start) || (now < end);
#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) || defined(__DOXYGEN__)
/* System tick service if the underlying OS requires it.*/
stInit();
#endif
}
/**
* @brief Polled delay.
* @note The real delays is always few cycles in excess of the specified
* value.
* @note This is an optional service that could not be implemented in
* all HAL implementations.
* @note This function can be called from any context.
*
* @param[in] ticks number of ticks
*
* @special
*/
void halPolledDelay(halrtcnt_t ticks) {
halrtcnt_t start = halGetCounterValue();
halrtcnt_t timeout = start + (ticks);
while (halIsCounterWithin(start, timeout))
;
}
#endif /* HAL_IMPLEMENTS_COUNTERS */
/** @} */

71
os/halnew/src/st.c Normal file
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@ -0,0 +1,71 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file st.c
* @brief ST Driver code.
*
* @addtogroup ST
* @{
*/
#include "hal.h"
#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief ST Driver initialization.
* @note This function is implicitly invoked by @p halInit(), there is
* no need to explicitly initialize the driver.
*
* @init
*/
void stInit(void) {
st_lld_init();
}
#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */
/** @} */

52
os/ports/GCC/ARMCMx/STM32F3xx/chtimer.h
View File

@ -45,46 +45,34 @@
/*===========================================================================*/
typedef struct {
volatile uint16_t CR1;
uint16_t _resvd0;
volatile uint16_t CR2;
uint16_t _resvd1;
volatile uint16_t SMCR;
uint16_t _resvd2;
volatile uint16_t DIER;
uint16_t _resvd3;
volatile uint16_t SR;
uint16_t _resvd4;
volatile uint16_t EGR;
uint16_t _resvd5;
volatile uint16_t CCMR1;
uint16_t _resvd6;
volatile uint16_t CCMR2;
uint16_t _resvd7;
volatile uint16_t CCER;
uint16_t _resvd8;
volatile uint32_t CR1;
volatile uint32_t CR2;
volatile uint32_t SMCR;
volatile uint32_t DIER;
volatile uint32_t SR;
volatile uint32_t EGR;
volatile uint32_t CCMR1;
volatile uint32_t CCMR2;
volatile uint32_t CCER;
volatile uint32_t CNT;
volatile uint16_t PSC;
uint16_t _resvd9;
volatile uint32_t PSC;
volatile uint32_t ARR;
volatile uint16_t RCR;
uint16_t _resvd10;
volatile uint32_t RCR;
volatile uint32_t CCR[4];
volatile uint16_t BDTR;
uint16_t _resvd11;
volatile uint16_t DCR;
uint16_t _resvd12;
volatile uint16_t DMAR;
uint16_t _resvd13;
volatile uint16_t OR;
uint16_t _resvd14;
} stm32f0_tim_t;
volatile uint32_t BDTR;
volatile uint32_t DCR;
volatile uint32_t DMAR;
volatile uint32_t OR;
volatile uint32_t CCMR3;
volatile uint32_t CCR5;
volatile uint32_t CCR6;
} local_stm32_tim_t;
/*===========================================================================*/
/* Module macros. */
/*===========================================================================*/
#define STM32F3_TIM2 ((stm32f0_tim_t *)0x40000000)
#define STM32F3_TIM2 ((local_stm32_tim_t *)0x40000000)
/*===========================================================================*/
/* External declarations. */