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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13179 27425a3e-05d8-49a3-a47f-9c15f0e5edd8

This commit is contained in:
Giovanni Di Sirio 2019-11-10 15:55:35 +00:00
parent 0db3fb1782
commit 56f83f861c
5 changed files with 291 additions and 341 deletions
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2
os/hal/boards/ST_NUCLEO64_G071RB/board.c
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@ -1,5 +1,5 @@
/* /*
ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License"); Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License. you may not use this file except in compliance with the License.

2
os/hal/boards/ST_NUCLEO64_G071RB/board.h
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@ -1,5 +1,5 @@
/* /*
ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License"); Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License. you may not use this file except in compliance with the License.

6
os/hal/boards/ST_NUCLEO64_G071RB/cfg/board.chcfg
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@ -17,7 +17,7 @@
<ports> <ports>
<GPIOA> <GPIOA>
<pin0 <pin0
ID="ARD_A0_IN0" ID=""
Type="PushPull" Type="PushPull"
Level="High" Level="High"
Speed="Maximum" Speed="Maximum"
@ -25,7 +25,7 @@
Mode="Input" Mode="Input"
Alternate="0" /> Alternate="0" />
<pin1 <pin1
ID="ARD_A1_IN1" ID=""
Type="PushPull" Type="PushPull"
Level="High" Level="High"
Speed="Maximum" Speed="Maximum"
@ -49,7 +49,7 @@
Mode="Alternate" Mode="Alternate"
Alternate="1"/> Alternate="1"/>
<pin4 <pin4
ID="ARD_A2_IN4" ID=""
Type="PushPull" Type="PushPull"
Level="High" Level="High"
Speed="Maximum" Speed="Maximum"

10
os/hal/boards/ST_NUCLEO64_L452RE_P/board.c
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@ -235,7 +235,7 @@ void __early_init(void) {
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp; (void)sdcp;
/* TODO: Fill the implementation.*/ /* CHTODO: Fill the implementation.*/
return true; return true;
} }
@ -245,7 +245,7 @@ bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
bool sdc_lld_is_write_protected(SDCDriver *sdcp) { bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp; (void)sdcp;
/* TODO: Fill the implementation.*/ /* CHTODO: Fill the implementation.*/
return false; return false;
} }
#endif /* HAL_USE_SDC */ #endif /* HAL_USE_SDC */
@ -257,7 +257,7 @@ bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp; (void)mmcp;
/* TODO: Fill the implementation.*/ /* CHTODO: Fill the implementation.*/
return true; return true;
} }
@ -267,14 +267,14 @@ bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
bool mmc_lld_is_write_protected(MMCDriver *mmcp) { bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp; (void)mmcp;
/* TODO: Fill the implementation.*/ /* CHTODO: Fill the implementation.*/
return false; return false;
} }
#endif #endif
/** /**
* @brief Board-specific initialization code. * @brief Board-specific initialization code.
* @todo Add your board-specific code, if any. * @note You can add your board-specific code here.
*/ */
void boardInit(void) { void boardInit(void) {

612
os/hal/boards/ST_NUCLEO64_L452RE_P/board.h
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@ -65,112 +65,62 @@
/* /*
* IO pins assignments. * IO pins assignments.
*/ */
#define GPIOA_PIN0 0U
#define GPIOA_ARD_A0 0U #define GPIOA_ARD_A0 0U
#define GPIOA_ADC1_IN5 0U #define GPIOA_ADC1_IN5 0U
#define GPIOA_PIN1 1U
#define GPIOA_ARD_A1 1U #define GPIOA_ARD_A1 1U
#define GPIOA_ADC1_IN6 1U #define GPIOA_ADC1_IN6 1U
#define GPIOA_PIN2 2U
#define GPIOA_STLINK_TX 2U #define GPIOA_STLINK_TX 2U
#define GPIOA_LPUART1_TX 2U
#define GPIOA_PIN3 3U
#define GPIOA_STLINK_RX 3U #define GPIOA_STLINK_RX 3U
#define GPIOA_LPUART1_RX 3U
#define GPIOA_PIN4 4U
#define GPIOA_SMPS_EN 4U #define GPIOA_SMPS_EN 4U
#define GPIOA_PIN5 5U
#define GPIOA_SMPS_V1 5U #define GPIOA_SMPS_V1 5U
#define GPIOA_PIN6 6U
#define GPIOA_SMPS_PG 6U #define GPIOA_SMPS_PG 6U
#define GPIOA_PIN7 7U
#define GPIOA_SMPS_SW 7U #define GPIOA_SMPS_SW 7U
#define GPIOA_PIN8 8U
#define GPIOA_ARD_D9 8U #define GPIOA_ARD_D9 8U
#define GPIOA_TIM1_CH1 8U
#define GPIOA_PIN9 9U
#define GPIOA_ARD_D1_TX 9U #define GPIOA_ARD_D1_TX 9U
#define GPIOA_UART1_TX 9U
#define GPIOA_PIN10 10U
#define GPIOA_ARD_D0_RX 10U #define GPIOA_ARD_D0_RX 10U
#define GPIOA_UART1_RX 10U
#define GPIOA_PIN11 11U
#define GPIOA_ARD_D10 11U #define GPIOA_ARD_D10 11U
#define GPIOA_TIM1_CH4 11U
#define GPIOA_PIN12 12U
#define GPIOA_ARD_D2 12U #define GPIOA_ARD_D2 12U
#define GPIOA_PIN13 13U
#define GPIOA_SWDIO 13U #define GPIOA_SWDIO 13U
#define GPIOA_PIN14 14U
#define GPIOA_SWCLK 14U #define GPIOA_SWCLK 14U
#define GPIOA_PIN15 15U
#define GPIOA_ARD_D5 15U #define GPIOA_ARD_D5 15U
#define GPIOA_TIM2_CH1 15U
#define GPIOB_PIN0 0U #define GPIOB_PIN0 0U
#define GPIOB_PIN1 1U #define GPIOB_PIN1 1U
#define GPIOB_PIN2 2U #define GPIOB_PIN2 2U
#define GPIOB_PIN3 3U
#define GPIOB_ARD_D3 3U #define GPIOB_ARD_D3 3U
#define GPIOB_TIM2_CH2 3U
#define GPIOB_PIN4 4U #define GPIOB_PIN4 4U
#define GPIOB_PIN5 5U
#define GPIOB_ARD_D4 5U #define GPIOB_ARD_D4 5U
#define GPIOB_PIN6 6U
#define GPIOB_ARD_D8 6U #define GPIOB_ARD_D8 6U
#define GPIOB_PIN7 7U
#define GPIOB_ARD_D14 7U #define GPIOB_ARD_D14 7U
#define GPIOB_I2C1_SDA 7U
#define GPIOB_PIN8 8U
#define GPIOB_ARD_D15 8U #define GPIOB_ARD_D15 8U
#define GPIOB_I2C1_SCL 8U
#define GPIOB_PIN9 9U #define GPIOB_PIN9 9U
#define GPIOB_PIN10 10U
#define GPIOB_ARD_D6 10U #define GPIOB_ARD_D6 10U
#define GPIOB_TIM2_CH3 10U
#define GPIOB_PIN11 11U #define GPIOB_PIN11 11U
#define GPIOB_PIN12 12U #define GPIOB_PIN12 12U
#define GPIOB_PIN13 13U
#define GPIOB_ARD_D13 13U #define GPIOB_ARD_D13 13U
#define GPIOB_SPI2_SCK 13U
#define GPIOB_LED_GREEN 13U #define GPIOB_LED_GREEN 13U
#define GPIOB_PIN14 14U
#define GPIOB_ARD_D12 14U #define GPIOB_ARD_D12 14U
#define GPIOB_SPI2_MISO 14U
#define GPIOB_PIN15 15U
#define GPIOB_ARD_D11 15U #define GPIOB_ARD_D11 15U
#define GPIOB_SPI2_MOSI 15U
#define GPIOB_TIM15_CH2 15U
#define GPIOC_PIN0 0U
#define GPIOC_ARD_A5 0U #define GPIOC_ARD_A5 0U
#define GPIOC_ADC1_IN1 0U #define GPIOC_ADC1_IN1 0U
#define GPIOC_I2C3_SCL 0U
#define GPIOC_PIN1 1U
#define GPIOC_ARD_A4 1U #define GPIOC_ARD_A4 1U
#define GPIOC_ADC1_IN2 1U #define GPIOC_ADC1_IN2 1U
#define GPIOC_I2C3_SDA 1U
#define GPIOC_PIN2 2U
#define GPIOC_ARD_A3 2U #define GPIOC_ARD_A3 2U
#define GPIOC_ADC1_IN3 2U #define GPIOC_ADC1_IN3 2U
#define GPIOC_PIN3 3U
#define GPIOC_ARD_A2 3U #define GPIOC_ARD_A2 3U
#define GPIOC_ADC1_IN4 3U #define GPIOC_ADC1_IN4 3U
#define GPIOC_PIN4 4U #define GPIOC_PIN4 4U
#define GPIOC_PIN5 5U #define GPIOC_PIN5 5U
#define GPIOC_PIN6 6U #define GPIOC_PIN6 6U
#define GPIOC_PIN7 7U
#define GPIOC_ARD_D7 7U #define GPIOC_ARD_D7 7U
#define GPIOC_PIN8 8U #define GPIOC_PIN8 8U
#define GPIOC_PIN9 9U #define GPIOC_PIN9 9U
#define GPIOC_PIN10 10U #define GPIOC_PIN10 10U
#define GPIOC_PIN11 11U #define GPIOC_PIN11 11U
#define GPIOC_PIN12 12U #define GPIOC_PIN12 12U
#define GPIOC_PIN13 13U
#define GPIOC_BUTTON 13U #define GPIOC_BUTTON 13U
#define GPIOC_PIN14 14U
#define GPIOC_OSC32_IN 14U #define GPIOC_OSC32_IN 14U
#define GPIOC_PIN15 15U
#define GPIOC_OSC32_OUT 15U #define GPIOC_OSC32_OUT 15U
#define GPIOD_PIN0 0U #define GPIOD_PIN0 0U
@ -241,9 +191,7 @@
#define GPIOG_PIN14 14U #define GPIOG_PIN14 14U
#define GPIOG_PIN15 15U #define GPIOG_PIN15 15U
#define GPIOH_PIN0 0U
#define GPIOH_OSC_IN 0U #define GPIOH_OSC_IN 0U
#define GPIOH_PIN1 1U
#define GPIOH_OSC_OUT 1U #define GPIOH_OSC_OUT 1U
#define GPIOH_PIN2 2U #define GPIOH_PIN2 2U
#define GPIOH_PIN3 3U #define GPIOH_PIN3 3U
@ -278,6 +226,8 @@
#define LINE_ARD_D0_RX PAL_LINE(GPIOA, 10U) #define LINE_ARD_D0_RX PAL_LINE(GPIOA, 10U)
#define LINE_ARD_D10 PAL_LINE(GPIOA, 11U) #define LINE_ARD_D10 PAL_LINE(GPIOA, 11U)
#define LINE_ARD_D2 PAL_LINE(GPIOA, 12U) #define LINE_ARD_D2 PAL_LINE(GPIOA, 12U)
#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
#define LINE_ARD_D5 PAL_LINE(GPIOA, 15U) #define LINE_ARD_D5 PAL_LINE(GPIOA, 15U)
#define LINE_ARD_D3 PAL_LINE(GPIOB, 3U) #define LINE_ARD_D3 PAL_LINE(GPIOB, 3U)
#define LINE_ARD_D4 PAL_LINE(GPIOB, 5U) #define LINE_ARD_D4 PAL_LINE(GPIOB, 5U)
@ -349,151 +299,151 @@
/* /*
* GPIOA setup: * GPIOA setup:
* *
* PA0 - PIN0 (analog). * PA0 - ARD_A0 ADC1_IN5 (analog).
* PA1 - PIN1 (analog). * PA1 - ARD_A1 ADC1_IN6 (analog).
* PA2 - PIN2 STLINK_TX (alternate 8). * PA2 - STLINK_TX (alternate 8).
* PA3 - PIN3 STLINK_RX (alternate 8). * PA3 - STLINK_RX (alternate 8).
* PA4 - PIN4 (analog). * PA4 - SMPS_EN (analog).
* PA5 - PIN5 (analog). * PA5 - SMPS_V1 (analog).
* PA6 - PIN6 (analog). * PA6 - SMPS_PG (analog).
* PA7 - PIN7 (analog). * PA7 - SMPS_SW (analog).
* PA8 - PIN8 (analog). * PA8 - ARD_D9 (analog).
* PA9 - PIN9 (analog). * PA9 - ARD_D1_TX (analog).
* PA10 - PIN10 (analog). * PA10 - ARD_D0_RX (analog).
* PA11 - PIN11 (analog). * PA11 - ARD_D10 (analog).
* PA12 - PIN12 (analog). * PA12 - ARD_D2 (analog).
* PA13 - SWDIO (alternate 0). * PA13 - SWDIO (alternate 0).
* PA14 - SWCLK (alternate 0). * PA14 - SWCLK (alternate 0).
* PA15 - PIN15 (analog). * PA15 - ARD_D5 (analog).
*/ */
#define VAL_GPIOA_MODER (PIN_MODE_ANALOG(GPIOA_PIN0) | \ #define VAL_GPIOA_MODER (PIN_MODE_ANALOG(GPIOA_ARD_A0) | \
PIN_MODE_ANALOG(GPIOA_PIN1) | \ PIN_MODE_ANALOG(GPIOA_ARD_A1) | \
PIN_MODE_ALTERNATE(GPIOA_PIN2) | \ PIN_MODE_ALTERNATE(GPIOA_STLINK_TX) | \
PIN_MODE_ALTERNATE(GPIOA_PIN3) | \ PIN_MODE_ALTERNATE(GPIOA_STLINK_RX) | \
PIN_MODE_ANALOG(GPIOA_PIN4) | \ PIN_MODE_ANALOG(GPIOA_SMPS_EN) | \
PIN_MODE_ANALOG(GPIOA_PIN5) | \ PIN_MODE_ANALOG(GPIOA_SMPS_V1) | \
PIN_MODE_ANALOG(GPIOA_PIN6) | \ PIN_MODE_ANALOG(GPIOA_SMPS_PG) | \
PIN_MODE_ANALOG(GPIOA_PIN7) | \ PIN_MODE_ANALOG(GPIOA_SMPS_SW) | \
PIN_MODE_ANALOG(GPIOA_PIN8) | \ PIN_MODE_ANALOG(GPIOA_ARD_D9) | \
PIN_MODE_ANALOG(GPIOA_PIN9) | \ PIN_MODE_ANALOG(GPIOA_ARD_D1_TX) | \
PIN_MODE_ANALOG(GPIOA_PIN10) | \ PIN_MODE_ANALOG(GPIOA_ARD_D0_RX) | \
PIN_MODE_ANALOG(GPIOA_PIN11) | \ PIN_MODE_ANALOG(GPIOA_ARD_D10) | \
PIN_MODE_ANALOG(GPIOA_PIN12) | \ PIN_MODE_ANALOG(GPIOA_ARD_D2) | \
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
PIN_MODE_ANALOG(GPIOA_PIN15)) PIN_MODE_ANALOG(GPIOA_ARD_D5))
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \ #define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_ARD_A0) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOA_ARD_A1) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOA_STLINK_TX) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ PIN_OTYPE_PUSHPULL(GPIOA_STLINK_RX) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOA_SMPS_EN) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOA_SMPS_V1) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOA_SMPS_PG) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOA_SMPS_SW) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOA_ARD_D9) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \ PIN_OTYPE_PUSHPULL(GPIOA_ARD_D1_TX) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \ PIN_OTYPE_PUSHPULL(GPIOA_ARD_D0_RX) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN11) | \ PIN_OTYPE_PUSHPULL(GPIOA_ARD_D10) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN12) | \ PIN_OTYPE_PUSHPULL(GPIOA_ARD_D2) | \
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) PIN_OTYPE_PUSHPULL(GPIOA_ARD_D5))
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_PIN0) | \ #define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_ARD_A0) | \
PIN_OSPEED_HIGH(GPIOA_PIN1) | \ PIN_OSPEED_HIGH(GPIOA_ARD_A1) | \
PIN_OSPEED_MEDIUM(GPIOA_PIN2) | \ PIN_OSPEED_MEDIUM(GPIOA_STLINK_TX) | \
PIN_OSPEED_MEDIUM(GPIOA_PIN3) | \ PIN_OSPEED_MEDIUM(GPIOA_STLINK_RX) | \
PIN_OSPEED_HIGH(GPIOA_PIN4) | \ PIN_OSPEED_HIGH(GPIOA_SMPS_EN) | \
PIN_OSPEED_HIGH(GPIOA_PIN5) | \ PIN_OSPEED_HIGH(GPIOA_SMPS_V1) | \
PIN_OSPEED_HIGH(GPIOA_PIN6) | \ PIN_OSPEED_HIGH(GPIOA_SMPS_PG) | \
PIN_OSPEED_HIGH(GPIOA_PIN7) | \ PIN_OSPEED_HIGH(GPIOA_SMPS_SW) | \
PIN_OSPEED_HIGH(GPIOA_PIN8) | \ PIN_OSPEED_HIGH(GPIOA_ARD_D9) | \
PIN_OSPEED_HIGH(GPIOA_PIN9) | \ PIN_OSPEED_HIGH(GPIOA_ARD_D1_TX) | \
PIN_OSPEED_HIGH(GPIOA_PIN10) | \ PIN_OSPEED_HIGH(GPIOA_ARD_D0_RX) | \
PIN_OSPEED_HIGH(GPIOA_PIN11) | \ PIN_OSPEED_HIGH(GPIOA_ARD_D10) | \
PIN_OSPEED_HIGH(GPIOA_PIN12) | \ PIN_OSPEED_HIGH(GPIOA_ARD_D2) | \
PIN_OSPEED_HIGH(GPIOA_SWDIO) | \ PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
PIN_OSPEED_HIGH(GPIOA_SWCLK) | \ PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
PIN_OSPEED_HIGH(GPIOA_PIN15)) PIN_OSPEED_HIGH(GPIOA_ARD_D5))
#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_PIN0) | \ #define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_ARD_A0) | \
PIN_PUPDR_FLOATING(GPIOA_PIN1) | \ PIN_PUPDR_FLOATING(GPIOA_ARD_A1) | \
PIN_PUPDR_FLOATING(GPIOA_PIN2) | \ PIN_PUPDR_FLOATING(GPIOA_STLINK_TX) | \
PIN_PUPDR_FLOATING(GPIOA_PIN3) | \ PIN_PUPDR_FLOATING(GPIOA_STLINK_RX) | \
PIN_PUPDR_FLOATING(GPIOA_PIN4) | \ PIN_PUPDR_FLOATING(GPIOA_SMPS_EN) | \
PIN_PUPDR_FLOATING(GPIOA_PIN5) | \ PIN_PUPDR_FLOATING(GPIOA_SMPS_V1) | \
PIN_PUPDR_FLOATING(GPIOA_PIN6) | \ PIN_PUPDR_FLOATING(GPIOA_SMPS_PG) | \
PIN_PUPDR_FLOATING(GPIOA_PIN7) | \ PIN_PUPDR_FLOATING(GPIOA_SMPS_SW) | \
PIN_PUPDR_FLOATING(GPIOA_PIN8) | \ PIN_PUPDR_FLOATING(GPIOA_ARD_D9) | \
PIN_PUPDR_FLOATING(GPIOA_PIN9) | \ PIN_PUPDR_FLOATING(GPIOA_ARD_D1_TX) | \
PIN_PUPDR_FLOATING(GPIOA_PIN10) | \ PIN_PUPDR_FLOATING(GPIOA_ARD_D0_RX) | \
PIN_PUPDR_FLOATING(GPIOA_PIN11) | \ PIN_PUPDR_FLOATING(GPIOA_ARD_D10) | \
PIN_PUPDR_FLOATING(GPIOA_PIN12) | \ PIN_PUPDR_FLOATING(GPIOA_ARD_D2) | \
PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \ PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \ PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
PIN_PUPDR_FLOATING(GPIOA_PIN15)) PIN_PUPDR_FLOATING(GPIOA_ARD_D5))
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \ #define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_ARD_A0) | \
PIN_ODR_HIGH(GPIOA_PIN1) | \ PIN_ODR_HIGH(GPIOA_ARD_A1) | \
PIN_ODR_HIGH(GPIOA_PIN2) | \ PIN_ODR_HIGH(GPIOA_STLINK_TX) | \
PIN_ODR_HIGH(GPIOA_PIN3) | \ PIN_ODR_HIGH(GPIOA_STLINK_RX) | \
PIN_ODR_HIGH(GPIOA_PIN4) | \ PIN_ODR_HIGH(GPIOA_SMPS_EN) | \
PIN_ODR_HIGH(GPIOA_PIN5) | \ PIN_ODR_HIGH(GPIOA_SMPS_V1) | \
PIN_ODR_HIGH(GPIOA_PIN6) | \ PIN_ODR_HIGH(GPIOA_SMPS_PG) | \
PIN_ODR_HIGH(GPIOA_PIN7) | \ PIN_ODR_HIGH(GPIOA_SMPS_SW) | \
PIN_ODR_HIGH(GPIOA_PIN8) | \ PIN_ODR_HIGH(GPIOA_ARD_D9) | \
PIN_ODR_HIGH(GPIOA_PIN9) | \ PIN_ODR_HIGH(GPIOA_ARD_D1_TX) | \
PIN_ODR_HIGH(GPIOA_PIN10) | \ PIN_ODR_HIGH(GPIOA_ARD_D0_RX) | \
PIN_ODR_HIGH(GPIOA_PIN11) | \ PIN_ODR_HIGH(GPIOA_ARD_D10) | \
PIN_ODR_HIGH(GPIOA_PIN12) | \ PIN_ODR_HIGH(GPIOA_ARD_D2) | \
PIN_ODR_HIGH(GPIOA_SWDIO) | \ PIN_ODR_HIGH(GPIOA_SWDIO) | \
PIN_ODR_HIGH(GPIOA_SWCLK) | \ PIN_ODR_HIGH(GPIOA_SWCLK) | \
PIN_ODR_HIGH(GPIOA_PIN15)) PIN_ODR_HIGH(GPIOA_ARD_D5))
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0U) | \ #define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ARD_A0, 0U) | \
PIN_AFIO_AF(GPIOA_PIN1, 0U) | \ PIN_AFIO_AF(GPIOA_ARD_A1, 0U) | \
PIN_AFIO_AF(GPIOA_PIN2, 8U) | \ PIN_AFIO_AF(GPIOA_STLINK_TX, 8U) | \
PIN_AFIO_AF(GPIOA_PIN3, 8U) | \ PIN_AFIO_AF(GPIOA_STLINK_RX, 8U) | \
PIN_AFIO_AF(GPIOA_PIN4, 0U) | \ PIN_AFIO_AF(GPIOA_SMPS_EN, 0U) | \
PIN_AFIO_AF(GPIOA_PIN5, 0U) | \ PIN_AFIO_AF(GPIOA_SMPS_V1, 0U) | \
PIN_AFIO_AF(GPIOA_PIN6, 0U) | \ PIN_AFIO_AF(GPIOA_SMPS_PG, 0U) | \
PIN_AFIO_AF(GPIOA_PIN7, 0U)) PIN_AFIO_AF(GPIOA_SMPS_SW, 0U))
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \ #define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_ARD_D9, 0U) | \
PIN_AFIO_AF(GPIOA_PIN9, 0U) | \ PIN_AFIO_AF(GPIOA_ARD_D1_TX, 0U) | \
PIN_AFIO_AF(GPIOA_PIN10, 0U) | \ PIN_AFIO_AF(GPIOA_ARD_D0_RX, 0U) | \
PIN_AFIO_AF(GPIOA_PIN11, 0U) | \ PIN_AFIO_AF(GPIOA_ARD_D10, 0U) | \
PIN_AFIO_AF(GPIOA_PIN12, 0U) | \ PIN_AFIO_AF(GPIOA_ARD_D2, 0U) | \
PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \ PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \
PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \ PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \
PIN_AFIO_AF(GPIOA_PIN15, 0U)) PIN_AFIO_AF(GPIOA_ARD_D5, 0U))
#define VAL_GPIOA_ASCR (PIN_ASCR_DISABLED(GPIOA_PIN0) | \ #define VAL_GPIOA_ASCR (PIN_ASCR_DISABLED(GPIOA_ARD_A0) | \
PIN_ASCR_DISABLED(GPIOA_PIN1) | \ PIN_ASCR_DISABLED(GPIOA_ARD_A1) | \
PIN_ASCR_DISABLED(GPIOA_PIN2) | \ PIN_ASCR_DISABLED(GPIOA_STLINK_TX) | \
PIN_ASCR_DISABLED(GPIOA_PIN3) | \ PIN_ASCR_DISABLED(GPIOA_STLINK_RX) | \
PIN_ASCR_DISABLED(GPIOA_PIN4) | \ PIN_ASCR_DISABLED(GPIOA_SMPS_EN) | \
PIN_ASCR_DISABLED(GPIOA_PIN5) | \ PIN_ASCR_DISABLED(GPIOA_SMPS_V1) | \
PIN_ASCR_DISABLED(GPIOA_PIN6) | \ PIN_ASCR_DISABLED(GPIOA_SMPS_PG) | \
PIN_ASCR_DISABLED(GPIOA_PIN7) | \ PIN_ASCR_DISABLED(GPIOA_SMPS_SW) | \
PIN_ASCR_DISABLED(GPIOA_PIN8) | \ PIN_ASCR_DISABLED(GPIOA_ARD_D9) | \
PIN_ASCR_DISABLED(GPIOA_PIN9) | \ PIN_ASCR_DISABLED(GPIOA_ARD_D1_TX) | \
PIN_ASCR_DISABLED(GPIOA_PIN10) | \ PIN_ASCR_DISABLED(GPIOA_ARD_D0_RX) | \
PIN_ASCR_DISABLED(GPIOA_PIN11) | \ PIN_ASCR_DISABLED(GPIOA_ARD_D10) | \
PIN_ASCR_DISABLED(GPIOA_PIN12) | \ PIN_ASCR_DISABLED(GPIOA_ARD_D2) | \
PIN_ASCR_DISABLED(GPIOA_SWDIO) | \ PIN_ASCR_DISABLED(GPIOA_SWDIO) | \
PIN_ASCR_DISABLED(GPIOA_SWCLK) | \ PIN_ASCR_DISABLED(GPIOA_SWCLK) | \
PIN_ASCR_DISABLED(GPIOA_PIN15)) PIN_ASCR_DISABLED(GPIOA_ARD_D5))
#define VAL_GPIOA_LOCKR (PIN_LOCKR_DISABLED(GPIOA_PIN0) | \ #define VAL_GPIOA_LOCKR (PIN_LOCKR_DISABLED(GPIOA_ARD_A0) | \
PIN_LOCKR_DISABLED(GPIOA_PIN1) | \ PIN_LOCKR_DISABLED(GPIOA_ARD_A1) | \
PIN_LOCKR_DISABLED(GPIOA_PIN2) | \ PIN_LOCKR_DISABLED(GPIOA_STLINK_TX) | \
PIN_LOCKR_DISABLED(GPIOA_PIN3) | \ PIN_LOCKR_DISABLED(GPIOA_STLINK_RX) | \
PIN_LOCKR_DISABLED(GPIOA_PIN4) | \ PIN_LOCKR_DISABLED(GPIOA_SMPS_EN) | \
PIN_LOCKR_DISABLED(GPIOA_PIN5) | \ PIN_LOCKR_DISABLED(GPIOA_SMPS_V1) | \
PIN_LOCKR_DISABLED(GPIOA_PIN6) | \ PIN_LOCKR_DISABLED(GPIOA_SMPS_PG) | \
PIN_LOCKR_DISABLED(GPIOA_PIN7) | \ PIN_LOCKR_DISABLED(GPIOA_SMPS_SW) | \
PIN_LOCKR_DISABLED(GPIOA_PIN8) | \ PIN_LOCKR_DISABLED(GPIOA_ARD_D9) | \
PIN_LOCKR_DISABLED(GPIOA_PIN9) | \ PIN_LOCKR_DISABLED(GPIOA_ARD_D1_TX) | \
PIN_LOCKR_DISABLED(GPIOA_PIN1) | \ PIN_LOCKR_DISABLED(GPIOA_ARD_D0_RX) | \
PIN_LOCKR_DISABLED(GPIOA_PIN11) | \ PIN_LOCKR_DISABLED(GPIOA_ARD_D10) | \
PIN_LOCKR_DISABLED(GPIOA_PIN12) | \ PIN_LOCKR_DISABLED(GPIOA_ARD_D2) | \
PIN_LOCKR_DISABLED(GPIOA_SWDIO) | \ PIN_LOCKR_DISABLED(GPIOA_SWDIO) | \
PIN_LOCKR_DISABLED(GPIOA_SWCLK) | \ PIN_LOCKR_DISABLED(GPIOA_SWCLK) | \
PIN_LOCKR_DISABLED(GPIOA_PIN15)) PIN_LOCKR_DISABLED(GPIOA_ARD_D5))
/* /*
* GPIOB setup: * GPIOB setup:
@ -501,297 +451,297 @@
* PB0 - PIN0 (analog). * PB0 - PIN0 (analog).
* PB1 - PIN1 (analog). * PB1 - PIN1 (analog).
* PB2 - PIN2 (analog). * PB2 - PIN2 (analog).
* PB3 - PIN3 (analog). * PB3 - ARD_D3 (analog).
* PB4 - PIN4 (analog). * PB4 - PIN4 (analog).
* PB5 - PIN5 (analog). * PB5 - ARD_D4 (analog).
* PB6 - PIN6 (analog). * PB6 - ARD_D8 (analog).
* PB7 - PIN7 (analog). * PB7 - ARD_D14 (analog).
* PB8 - PIN8 (analog). * PB8 - ARD_D15 (analog).
* PB9 - PIN9 (analog). * PB9 - PIN9 (analog).
* PB10 - PIN10 (analog). * PB10 - ARD_D6 (analog).
* PB11 - PIN11 (analog). * PB11 - PIN11 (analog).
* PB12 - PIN12 (analog). * PB12 - PIN12 (analog).
* PB13 - PIN13 LED_GREEN (output pushpull maximum). * PB13 - ARD_D13 LED_GREEN (output pushpull maximum).
* PB14 - PIN14 (analog). * PB14 - ARD_D12 (analog).
* PB15 - PIN15 (analog). * PB15 - ARD_D11 (analog).
*/ */
#define VAL_GPIOB_MODER (PIN_MODE_ANALOG(GPIOB_PIN0) | \ #define VAL_GPIOB_MODER (PIN_MODE_ANALOG(GPIOB_PIN0) | \
PIN_MODE_ANALOG(GPIOB_PIN1) | \ PIN_MODE_ANALOG(GPIOB_PIN1) | \
PIN_MODE_ANALOG(GPIOB_PIN2) | \ PIN_MODE_ANALOG(GPIOB_PIN2) | \
PIN_MODE_ANALOG(GPIOB_PIN3) | \ PIN_MODE_ANALOG(GPIOB_ARD_D3) | \
PIN_MODE_ANALOG(GPIOB_PIN4) | \ PIN_MODE_ANALOG(GPIOB_PIN4) | \
PIN_MODE_ANALOG(GPIOB_PIN5) | \ PIN_MODE_ANALOG(GPIOB_ARD_D4) | \
PIN_MODE_ANALOG(GPIOB_PIN6) | \ PIN_MODE_ANALOG(GPIOB_ARD_D8) | \
PIN_MODE_ANALOG(GPIOB_PIN7) | \ PIN_MODE_ANALOG(GPIOB_ARD_D14) | \
PIN_MODE_ANALOG(GPIOB_PIN8) | \ PIN_MODE_ANALOG(GPIOB_ARD_D15) | \
PIN_MODE_ANALOG(GPIOB_PIN9) | \ PIN_MODE_ANALOG(GPIOB_PIN9) | \
PIN_MODE_ANALOG(GPIOB_PIN10) | \ PIN_MODE_ANALOG(GPIOB_ARD_D6) | \
PIN_MODE_ANALOG(GPIOB_PIN11) | \ PIN_MODE_ANALOG(GPIOB_PIN11) | \
PIN_MODE_ANALOG(GPIOB_PIN12) | \ PIN_MODE_ANALOG(GPIOB_PIN12) | \
PIN_MODE_OUTPUT(GPIOB_PIN13) | \ PIN_MODE_OUTPUT(GPIOB_ARD_D13) | \
PIN_MODE_ANALOG(GPIOB_PIN14) | \ PIN_MODE_ANALOG(GPIOB_ARD_D12) | \
PIN_MODE_ANALOG(GPIOB_PIN15)) PIN_MODE_ANALOG(GPIOB_ARD_D11))
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \ #define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \ PIN_OTYPE_PUSHPULL(GPIOB_ARD_D3) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOB_ARD_D4) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOB_ARD_D8) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOB_ARD_D14) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOB_ARD_D15) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \ PIN_OTYPE_PUSHPULL(GPIOB_ARD_D6) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOB_ARD_D13) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOB_ARD_D12) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) PIN_OTYPE_PUSHPULL(GPIOB_ARD_D11))
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_PIN0) | \ #define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_PIN0) | \
PIN_OSPEED_HIGH(GPIOB_PIN1) | \ PIN_OSPEED_HIGH(GPIOB_PIN1) | \
PIN_OSPEED_HIGH(GPIOB_PIN2) | \ PIN_OSPEED_HIGH(GPIOB_PIN2) | \
PIN_OSPEED_HIGH(GPIOB_PIN3) | \ PIN_OSPEED_HIGH(GPIOB_ARD_D3) | \
PIN_OSPEED_HIGH(GPIOB_PIN4) | \ PIN_OSPEED_HIGH(GPIOB_PIN4) | \
PIN_OSPEED_HIGH(GPIOB_PIN5) | \ PIN_OSPEED_HIGH(GPIOB_ARD_D4) | \
PIN_OSPEED_HIGH(GPIOB_PIN6) | \ PIN_OSPEED_HIGH(GPIOB_ARD_D8) | \
PIN_OSPEED_HIGH(GPIOB_PIN7) | \ PIN_OSPEED_HIGH(GPIOB_ARD_D14) | \
PIN_OSPEED_HIGH(GPIOB_PIN8) | \ PIN_OSPEED_HIGH(GPIOB_ARD_D15) | \
PIN_OSPEED_HIGH(GPIOB_PIN9) | \ PIN_OSPEED_HIGH(GPIOB_PIN9) | \
PIN_OSPEED_HIGH(GPIOB_PIN10) | \ PIN_OSPEED_HIGH(GPIOB_ARD_D6) | \
PIN_OSPEED_HIGH(GPIOB_PIN11) | \ PIN_OSPEED_HIGH(GPIOB_PIN11) | \
PIN_OSPEED_HIGH(GPIOB_PIN12) | \ PIN_OSPEED_HIGH(GPIOB_PIN12) | \
PIN_OSPEED_HIGH(GPIOB_PIN13) | \ PIN_OSPEED_HIGH(GPIOB_ARD_D13) | \
PIN_OSPEED_HIGH(GPIOB_PIN14) | \ PIN_OSPEED_HIGH(GPIOB_ARD_D12) | \
PIN_OSPEED_HIGH(GPIOB_PIN15)) PIN_OSPEED_HIGH(GPIOB_ARD_D11))
#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_PIN0) | \ #define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_PIN0) | \
PIN_PUPDR_FLOATING(GPIOB_PIN1) | \ PIN_PUPDR_FLOATING(GPIOB_PIN1) | \
PIN_PUPDR_FLOATING(GPIOB_PIN2) | \ PIN_PUPDR_FLOATING(GPIOB_PIN2) | \
PIN_PUPDR_FLOATING(GPIOB_PIN3) | \ PIN_PUPDR_FLOATING(GPIOB_ARD_D3) | \
PIN_PUPDR_FLOATING(GPIOB_PIN4) | \ PIN_PUPDR_FLOATING(GPIOB_PIN4) | \
PIN_PUPDR_FLOATING(GPIOB_PIN5) | \ PIN_PUPDR_FLOATING(GPIOB_ARD_D4) | \
PIN_PUPDR_FLOATING(GPIOB_PIN6) | \ PIN_PUPDR_FLOATING(GPIOB_ARD_D8) | \
PIN_PUPDR_FLOATING(GPIOB_PIN7) | \ PIN_PUPDR_FLOATING(GPIOB_ARD_D14) | \
PIN_PUPDR_FLOATING(GPIOB_PIN8) | \ PIN_PUPDR_FLOATING(GPIOB_ARD_D15) | \
PIN_PUPDR_FLOATING(GPIOB_PIN9) | \ PIN_PUPDR_FLOATING(GPIOB_PIN9) | \
PIN_PUPDR_FLOATING(GPIOB_PIN10) | \ PIN_PUPDR_FLOATING(GPIOB_ARD_D6) | \
PIN_PUPDR_FLOATING(GPIOB_PIN11) | \ PIN_PUPDR_FLOATING(GPIOB_PIN11) | \
PIN_PUPDR_FLOATING(GPIOB_PIN12) | \ PIN_PUPDR_FLOATING(GPIOB_PIN12) | \
PIN_PUPDR_FLOATING(GPIOB_PIN13) | \ PIN_PUPDR_FLOATING(GPIOB_ARD_D13) | \
PIN_PUPDR_FLOATING(GPIOB_PIN14) | \ PIN_PUPDR_FLOATING(GPIOB_ARD_D12) | \
PIN_PUPDR_FLOATING(GPIOB_PIN15)) PIN_PUPDR_FLOATING(GPIOB_ARD_D11))
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \ #define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
PIN_ODR_HIGH(GPIOB_PIN1) | \ PIN_ODR_HIGH(GPIOB_PIN1) | \
PIN_ODR_HIGH(GPIOB_PIN2) | \ PIN_ODR_HIGH(GPIOB_PIN2) | \
PIN_ODR_HIGH(GPIOB_PIN3) | \ PIN_ODR_HIGH(GPIOB_ARD_D3) | \
PIN_ODR_HIGH(GPIOB_PIN4) | \ PIN_ODR_HIGH(GPIOB_PIN4) | \
PIN_ODR_HIGH(GPIOB_PIN5) | \ PIN_ODR_HIGH(GPIOB_ARD_D4) | \
PIN_ODR_HIGH(GPIOB_PIN6) | \ PIN_ODR_HIGH(GPIOB_ARD_D8) | \
PIN_ODR_HIGH(GPIOB_PIN7) | \ PIN_ODR_HIGH(GPIOB_ARD_D14) | \
PIN_ODR_HIGH(GPIOB_PIN8) | \ PIN_ODR_HIGH(GPIOB_ARD_D15) | \
PIN_ODR_HIGH(GPIOB_PIN9) | \ PIN_ODR_HIGH(GPIOB_PIN9) | \
PIN_ODR_HIGH(GPIOB_PIN10) | \ PIN_ODR_HIGH(GPIOB_ARD_D6) | \
PIN_ODR_HIGH(GPIOB_PIN11) | \ PIN_ODR_HIGH(GPIOB_PIN11) | \
PIN_ODR_HIGH(GPIOB_PIN12) | \ PIN_ODR_HIGH(GPIOB_PIN12) | \
PIN_ODR_LOW(GPIOB_PIN13) | \ PIN_ODR_LOW(GPIOB_ARD_D13) | \
PIN_ODR_HIGH(GPIOB_PIN14) | \ PIN_ODR_HIGH(GPIOB_ARD_D12) | \
PIN_ODR_HIGH(GPIOB_PIN15)) PIN_ODR_HIGH(GPIOB_ARD_D11))
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \ #define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \
PIN_AFIO_AF(GPIOB_PIN1, 0U) | \ PIN_AFIO_AF(GPIOB_PIN1, 0U) | \
PIN_AFIO_AF(GPIOB_PIN2, 0U) | \ PIN_AFIO_AF(GPIOB_PIN2, 0U) | \
PIN_AFIO_AF(GPIOB_PIN3, 0U) | \ PIN_AFIO_AF(GPIOB_ARD_D3, 0U) | \
PIN_AFIO_AF(GPIOB_PIN4, 0U) | \ PIN_AFIO_AF(GPIOB_PIN4, 0U) | \
PIN_AFIO_AF(GPIOB_PIN5, 0U) | \ PIN_AFIO_AF(GPIOB_ARD_D4, 0U) | \
PIN_AFIO_AF(GPIOB_PIN6, 0U) | \ PIN_AFIO_AF(GPIOB_ARD_D8, 0U) | \
PIN_AFIO_AF(GPIOB_PIN7, 0U)) PIN_AFIO_AF(GPIOB_ARD_D14, 0U))
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \ #define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_ARD_D15, 0U) | \
PIN_AFIO_AF(GPIOB_PIN9, 0U) | \ PIN_AFIO_AF(GPIOB_PIN9, 0U) | \
PIN_AFIO_AF(GPIOB_PIN10, 0U) | \ PIN_AFIO_AF(GPIOB_ARD_D6, 0U) | \
PIN_AFIO_AF(GPIOB_PIN11, 0U) | \ PIN_AFIO_AF(GPIOB_PIN11, 0U) | \
PIN_AFIO_AF(GPIOB_PIN12, 0U) | \ PIN_AFIO_AF(GPIOB_PIN12, 0U) | \
PIN_AFIO_AF(GPIOB_PIN13, 0U) | \ PIN_AFIO_AF(GPIOB_ARD_D13, 0U) | \
PIN_AFIO_AF(GPIOB_PIN14, 0U) | \ PIN_AFIO_AF(GPIOB_ARD_D12, 0U) | \
PIN_AFIO_AF(GPIOB_PIN15, 0U)) PIN_AFIO_AF(GPIOB_ARD_D11, 0U))
#define VAL_GPIOB_ASCR (PIN_ASCR_DISABLED(GPIOB_PIN0) | \ #define VAL_GPIOB_ASCR (PIN_ASCR_DISABLED(GPIOB_PIN0) | \
PIN_ASCR_DISABLED(GPIOB_PIN1) | \ PIN_ASCR_DISABLED(GPIOB_PIN1) | \
PIN_ASCR_DISABLED(GPIOB_PIN2) | \ PIN_ASCR_DISABLED(GPIOB_PIN2) | \
PIN_ASCR_DISABLED(GPIOB_PIN3) | \ PIN_ASCR_DISABLED(GPIOB_ARD_D3) | \
PIN_ASCR_DISABLED(GPIOB_PIN4) | \ PIN_ASCR_DISABLED(GPIOB_PIN4) | \
PIN_ASCR_DISABLED(GPIOB_PIN5) | \ PIN_ASCR_DISABLED(GPIOB_ARD_D4) | \
PIN_ASCR_DISABLED(GPIOB_PIN6) | \ PIN_ASCR_DISABLED(GPIOB_ARD_D8) | \
PIN_ASCR_DISABLED(GPIOB_PIN7) | \ PIN_ASCR_DISABLED(GPIOB_ARD_D14) | \
PIN_ASCR_DISABLED(GPIOB_PIN8) | \ PIN_ASCR_DISABLED(GPIOB_ARD_D15) | \
PIN_ASCR_DISABLED(GPIOB_PIN9) | \ PIN_ASCR_DISABLED(GPIOB_PIN9) | \
PIN_ASCR_DISABLED(GPIOB_PIN10) | \ PIN_ASCR_DISABLED(GPIOB_ARD_D6) | \
PIN_ASCR_DISABLED(GPIOB_PIN11) | \ PIN_ASCR_DISABLED(GPIOB_PIN11) | \
PIN_ASCR_DISABLED(GPIOB_PIN12) | \ PIN_ASCR_DISABLED(GPIOB_PIN12) | \
PIN_ASCR_DISABLED(GPIOB_PIN13) | \ PIN_ASCR_DISABLED(GPIOB_ARD_D13) | \
PIN_ASCR_DISABLED(GPIOB_PIN14) | \ PIN_ASCR_DISABLED(GPIOB_ARD_D12) | \
PIN_ASCR_DISABLED(GPIOB_PIN15)) PIN_ASCR_DISABLED(GPIOB_ARD_D11))
#define VAL_GPIOB_LOCKR (PIN_LOCKR_DISABLED(GPIOB_PIN0) | \ #define VAL_GPIOB_LOCKR (PIN_LOCKR_DISABLED(GPIOB_PIN0) | \
PIN_LOCKR_DISABLED(GPIOB_PIN1) | \ PIN_LOCKR_DISABLED(GPIOB_PIN1) | \
PIN_LOCKR_DISABLED(GPIOB_PIN2) | \ PIN_LOCKR_DISABLED(GPIOB_PIN2) | \
PIN_LOCKR_DISABLED(GPIOB_PIN3) | \ PIN_LOCKR_DISABLED(GPIOB_ARD_D3) | \
PIN_LOCKR_DISABLED(GPIOB_PIN4) | \ PIN_LOCKR_DISABLED(GPIOB_PIN4) | \
PIN_LOCKR_DISABLED(GPIOB_PIN5) | \ PIN_LOCKR_DISABLED(GPIOB_ARD_D4) | \
PIN_LOCKR_DISABLED(GPIOB_PIN6) | \ PIN_LOCKR_DISABLED(GPIOB_ARD_D8) | \
PIN_LOCKR_DISABLED(GPIOB_PIN7) | \ PIN_LOCKR_DISABLED(GPIOB_ARD_D14) | \
PIN_LOCKR_DISABLED(GPIOB_PIN8) | \ PIN_LOCKR_DISABLED(GPIOB_ARD_D15) | \
PIN_LOCKR_DISABLED(GPIOB_PIN9) | \ PIN_LOCKR_DISABLED(GPIOB_PIN9) | \
PIN_LOCKR_DISABLED(GPIOB_PIN10) | \ PIN_LOCKR_DISABLED(GPIOB_ARD_D6) | \
PIN_LOCKR_DISABLED(GPIOB_PIN11) | \ PIN_LOCKR_DISABLED(GPIOB_PIN11) | \
PIN_LOCKR_DISABLED(GPIOB_PIN12) | \ PIN_LOCKR_DISABLED(GPIOB_PIN12) | \
PIN_LOCKR_DISABLED(GPIOB_PIN13) | \ PIN_LOCKR_DISABLED(GPIOB_ARD_D13) | \
PIN_LOCKR_DISABLED(GPIOB_PIN14) | \ PIN_LOCKR_DISABLED(GPIOB_ARD_D12) | \
PIN_LOCKR_DISABLED(GPIOB_PIN15)) PIN_LOCKR_DISABLED(GPIOB_ARD_D11))
/* /*
* GPIOC setup: * GPIOC setup:
* *
* PC0 - PIN0 (analog). * PC0 - ARD_A5 ADC1_IN1 (analog).
* PC1 - PIN1 (analog). * PC1 - ARD_A4 ADC1_IN2 (analog).
* PC2 - PIN2 (analog). * PC2 - ARD_A3 ADC1_IN3 (analog).
* PC3 - PIN3 (analog). * PC3 - ARD_A2 ADC1_IN4 (analog).
* PC4 - PIN4 (analog). * PC4 - PIN4 (analog).
* PC5 - PIN5 (analog). * PC5 - PIN5 (analog).
* PC6 - PIN6 (analog). * PC6 - PIN6 (analog).
* PC7 - PIN7 (analog). * PC7 - ARD_D7 (analog).
* PC8 - PIN8 (analog). * PC8 - PIN8 (analog).
* PC9 - PIN9 (analog). * PC9 - PIN9 (analog).
* PC10 - PIN10 (analog). * PC10 - PIN10 (analog).
* PC11 - PIN11 (analog). * PC11 - PIN11 (analog).
* PC12 - PIN12 (analog). * PC12 - PIN12 (analog).
* PC13 - PIN13 BUTTON (input floating). * PC13 - BUTTON (input floating).
* PC14 - PIN14 (analog). * PC14 - OSC32_IN (input floating).
* PC15 - PIN14 (analog). * PC15 - OSC32_OUT (input floating).
*/ */
#define VAL_GPIOC_MODER (PIN_MODE_ANALOG(GPIOC_PIN0) | \ #define VAL_GPIOC_MODER (PIN_MODE_ANALOG(GPIOC_ARD_A5) | \
PIN_MODE_ANALOG(GPIOC_PIN1) | \ PIN_MODE_ANALOG(GPIOC_ARD_A4) | \
PIN_MODE_ANALOG(GPIOC_PIN2) | \ PIN_MODE_ANALOG(GPIOC_ARD_A3) | \
PIN_MODE_ANALOG(GPIOC_PIN3) | \ PIN_MODE_ANALOG(GPIOC_ARD_A2) | \
PIN_MODE_ANALOG(GPIOC_PIN4) | \ PIN_MODE_ANALOG(GPIOC_PIN4) | \
PIN_MODE_ANALOG(GPIOC_PIN5) | \ PIN_MODE_ANALOG(GPIOC_PIN5) | \
PIN_MODE_ANALOG(GPIOC_PIN6) | \ PIN_MODE_ANALOG(GPIOC_PIN6) | \
PIN_MODE_ANALOG(GPIOC_PIN7) | \ PIN_MODE_ANALOG(GPIOC_ARD_D7) | \
PIN_MODE_ANALOG(GPIOC_PIN8) | \ PIN_MODE_ANALOG(GPIOC_PIN8) | \
PIN_MODE_ANALOG(GPIOC_PIN9) | \ PIN_MODE_ANALOG(GPIOC_PIN9) | \
PIN_MODE_ANALOG(GPIOC_PIN10) | \ PIN_MODE_ANALOG(GPIOC_PIN10) | \
PIN_MODE_ANALOG(GPIOC_PIN11) | \ PIN_MODE_ANALOG(GPIOC_PIN11) | \
PIN_MODE_ANALOG(GPIOC_PIN12) | \ PIN_MODE_ANALOG(GPIOC_PIN12) | \
PIN_MODE_INPUT(GPIOC_PIN13) | \ PIN_MODE_INPUT(GPIOC_BUTTON) | \
PIN_MODE_ANALOG(GPIOC_PIN14) | \ PIN_MODE_INPUT(GPIOC_OSC32_IN) | \
PIN_MODE_ANALOG(GPIOC_PIN15)) PIN_MODE_INPUT(GPIOC_OSC32_OUT))
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \ #define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_ARD_A5) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOC_ARD_A4) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOC_ARD_A3) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ PIN_OTYPE_PUSHPULL(GPIOC_ARD_A2) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOC_ARD_D7) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOC_BUTTON) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT))
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_PIN0) | \ #define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_ARD_A5) | \
PIN_OSPEED_HIGH(GPIOC_PIN1) | \ PIN_OSPEED_HIGH(GPIOC_ARD_A4) | \
PIN_OSPEED_HIGH(GPIOC_PIN2) | \ PIN_OSPEED_HIGH(GPIOC_ARD_A3) | \
PIN_OSPEED_HIGH(GPIOC_PIN3) | \ PIN_OSPEED_HIGH(GPIOC_ARD_A2) | \
PIN_OSPEED_HIGH(GPIOC_PIN4) | \ PIN_OSPEED_HIGH(GPIOC_PIN4) | \
PIN_OSPEED_HIGH(GPIOC_PIN5) | \ PIN_OSPEED_HIGH(GPIOC_PIN5) | \
PIN_OSPEED_HIGH(GPIOC_PIN6) | \ PIN_OSPEED_HIGH(GPIOC_PIN6) | \
PIN_OSPEED_HIGH(GPIOC_PIN7) | \ PIN_OSPEED_HIGH(GPIOC_ARD_D7) | \
PIN_OSPEED_HIGH(GPIOC_PIN8) | \ PIN_OSPEED_HIGH(GPIOC_PIN8) | \
PIN_OSPEED_HIGH(GPIOC_PIN9) | \ PIN_OSPEED_HIGH(GPIOC_PIN9) | \
PIN_OSPEED_HIGH(GPIOC_PIN10) | \ PIN_OSPEED_HIGH(GPIOC_PIN10) | \
PIN_OSPEED_HIGH(GPIOC_PIN11) | \ PIN_OSPEED_HIGH(GPIOC_PIN11) | \
PIN_OSPEED_HIGH(GPIOC_PIN12) | \ PIN_OSPEED_HIGH(GPIOC_PIN12) | \
PIN_OSPEED_HIGH(GPIOC_PIN13) | \ PIN_OSPEED_HIGH(GPIOC_BUTTON) | \
PIN_OSPEED_HIGH(GPIOC_PIN14) | \ PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | \
PIN_OSPEED_HIGH(GPIOC_PIN15)) PIN_OSPEED_HIGH(GPIOC_OSC32_OUT))
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_PIN0) | \ #define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_ARD_A5) | \
PIN_PUPDR_FLOATING(GPIOC_PIN1) | \ PIN_PUPDR_FLOATING(GPIOC_ARD_A4) | \
PIN_PUPDR_FLOATING(GPIOC_PIN2) | \ PIN_PUPDR_FLOATING(GPIOC_ARD_A3) | \
PIN_PUPDR_FLOATING(GPIOC_PIN3) | \ PIN_PUPDR_FLOATING(GPIOC_ARD_A2) | \
PIN_PUPDR_FLOATING(GPIOC_PIN4) | \ PIN_PUPDR_FLOATING(GPIOC_PIN4) | \
PIN_PUPDR_FLOATING(GPIOC_PIN5) | \ PIN_PUPDR_FLOATING(GPIOC_PIN5) | \
PIN_PUPDR_FLOATING(GPIOC_PIN6) | \ PIN_PUPDR_FLOATING(GPIOC_PIN6) | \
PIN_PUPDR_FLOATING(GPIOC_PIN7) | \ PIN_PUPDR_FLOATING(GPIOC_ARD_D7) | \
PIN_PUPDR_FLOATING(GPIOC_PIN8) | \ PIN_PUPDR_FLOATING(GPIOC_PIN8) | \
PIN_PUPDR_FLOATING(GPIOC_PIN9) | \ PIN_PUPDR_FLOATING(GPIOC_PIN9) | \
PIN_PUPDR_FLOATING(GPIOC_PIN10) | \ PIN_PUPDR_FLOATING(GPIOC_PIN10) | \
PIN_PUPDR_FLOATING(GPIOC_PIN11) | \ PIN_PUPDR_FLOATING(GPIOC_PIN11) | \
PIN_PUPDR_FLOATING(GPIOC_PIN12) | \ PIN_PUPDR_FLOATING(GPIOC_PIN12) | \
PIN_PUPDR_FLOATING(GPIOC_PIN13) | \ PIN_PUPDR_FLOATING(GPIOC_BUTTON) | \
PIN_PUPDR_FLOATING(GPIOC_PIN14) | \ PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \
PIN_PUPDR_FLOATING(GPIOC_PIN15)) PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT))
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \ #define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_ARD_A5) | \
PIN_ODR_HIGH(GPIOC_PIN1) | \ PIN_ODR_HIGH(GPIOC_ARD_A4) | \
PIN_ODR_HIGH(GPIOC_PIN2) | \ PIN_ODR_HIGH(GPIOC_ARD_A3) | \
PIN_ODR_HIGH(GPIOC_PIN3) | \ PIN_ODR_HIGH(GPIOC_ARD_A2) | \
PIN_ODR_HIGH(GPIOC_PIN4) | \ PIN_ODR_HIGH(GPIOC_PIN4) | \
PIN_ODR_HIGH(GPIOC_PIN5) | \ PIN_ODR_HIGH(GPIOC_PIN5) | \
PIN_ODR_HIGH(GPIOC_PIN6) | \ PIN_ODR_HIGH(GPIOC_PIN6) | \
PIN_ODR_HIGH(GPIOC_PIN7) | \ PIN_ODR_HIGH(GPIOC_ARD_D7) | \
PIN_ODR_HIGH(GPIOC_PIN8) | \ PIN_ODR_HIGH(GPIOC_PIN8) | \
PIN_ODR_HIGH(GPIOC_PIN9) | \ PIN_ODR_HIGH(GPIOC_PIN9) | \
PIN_ODR_HIGH(GPIOC_PIN10) | \ PIN_ODR_HIGH(GPIOC_PIN10) | \
PIN_ODR_HIGH(GPIOC_PIN11) | \ PIN_ODR_HIGH(GPIOC_PIN11) | \
PIN_ODR_HIGH(GPIOC_PIN12) | \ PIN_ODR_HIGH(GPIOC_PIN12) | \
PIN_ODR_HIGH(GPIOC_PIN13) | \ PIN_ODR_HIGH(GPIOC_BUTTON) | \
PIN_ODR_HIGH(GPIOC_PIN14) | \ PIN_ODR_HIGH(GPIOC_OSC32_IN) | \
PIN_ODR_HIGH(GPIOC_PIN15)) PIN_ODR_HIGH(GPIOC_OSC32_OUT))
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0U) | \ #define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_ARD_A5, 0U) | \
PIN_AFIO_AF(GPIOC_PIN1, 0U) | \ PIN_AFIO_AF(GPIOC_ARD_A4, 0U) | \
PIN_AFIO_AF(GPIOC_PIN2, 0U) | \ PIN_AFIO_AF(GPIOC_ARD_A3, 0U) | \
PIN_AFIO_AF(GPIOC_PIN3, 0U) | \ PIN_AFIO_AF(GPIOC_ARD_A2, 0U) | \
PIN_AFIO_AF(GPIOC_PIN4, 0U) | \ PIN_AFIO_AF(GPIOC_PIN4, 0U) | \
PIN_AFIO_AF(GPIOC_PIN5, 0U) | \ PIN_AFIO_AF(GPIOC_PIN5, 0U) | \
PIN_AFIO_AF(GPIOC_PIN6, 0U) | \ PIN_AFIO_AF(GPIOC_PIN6, 0U) | \
PIN_AFIO_AF(GPIOC_PIN7, 0U)) PIN_AFIO_AF(GPIOC_ARD_D7, 0U))
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \ #define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \
PIN_AFIO_AF(GPIOC_PIN9, 0U) | \ PIN_AFIO_AF(GPIOC_PIN9, 0U) | \
PIN_AFIO_AF(GPIOC_PIN10, 0U) | \ PIN_AFIO_AF(GPIOC_PIN10, 0U) | \
PIN_AFIO_AF(GPIOC_PIN11, 0U) | \ PIN_AFIO_AF(GPIOC_PIN11, 0U) | \
PIN_AFIO_AF(GPIOC_PIN12, 0U) | \ PIN_AFIO_AF(GPIOC_PIN12, 0U) | \
PIN_AFIO_AF(GPIOC_PIN13, 0U) | \ PIN_AFIO_AF(GPIOC_BUTTON, 0U) | \
PIN_AFIO_AF(GPIOC_PIN14, 0U) | \ PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | \
PIN_AFIO_AF(GPIOC_PIN15, 0U)) PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U))
#define VAL_GPIOC_ASCR (PIN_ASCR_DISABLED(GPIOC_PIN0) | \ #define VAL_GPIOC_ASCR (PIN_ASCR_DISABLED(GPIOC_ARD_A5) | \
PIN_ASCR_DISABLED(GPIOC_PIN1) | \ PIN_ASCR_DISABLED(GPIOC_ARD_A4) | \
PIN_ASCR_DISABLED(GPIOC_PIN2) | \ PIN_ASCR_DISABLED(GPIOC_ARD_A3) | \
PIN_ASCR_DISABLED(GPIOC_PIN3) | \ PIN_ASCR_DISABLED(GPIOC_ARD_A2) | \
PIN_ASCR_DISABLED(GPIOC_PIN4) | \ PIN_ASCR_DISABLED(GPIOC_PIN4) | \
PIN_ASCR_DISABLED(GPIOC_PIN5) | \ PIN_ASCR_DISABLED(GPIOC_PIN5) | \
PIN_ASCR_DISABLED(GPIOC_PIN6) | \ PIN_ASCR_DISABLED(GPIOC_PIN6) | \
PIN_ASCR_DISABLED(GPIOC_PIN7) | \ PIN_ASCR_DISABLED(GPIOC_ARD_D7) | \
PIN_ASCR_DISABLED(GPIOC_PIN8) | \ PIN_ASCR_DISABLED(GPIOC_PIN8) | \
PIN_ASCR_DISABLED(GPIOC_PIN9) | \ PIN_ASCR_DISABLED(GPIOC_PIN9) | \
PIN_ASCR_DISABLED(GPIOC_PIN10) | \ PIN_ASCR_DISABLED(GPIOC_PIN10) | \
PIN_ASCR_DISABLED(GPIOC_PIN11) | \ PIN_ASCR_DISABLED(GPIOC_PIN11) | \
PIN_ASCR_DISABLED(GPIOC_PIN12) | \ PIN_ASCR_DISABLED(GPIOC_PIN12) | \
PIN_ASCR_DISABLED(GPIOC_PIN13) | \ PIN_ASCR_DISABLED(GPIOC_BUTTON) | \
PIN_ASCR_DISABLED(GPIOC_PIN14) | \ PIN_ASCR_DISABLED(GPIOC_OSC32_IN) | \
PIN_ASCR_DISABLED(GPIOC_PIN15)) PIN_ASCR_DISABLED(GPIOC_OSC32_OUT))
#define VAL_GPIOC_LOCKR (PIN_LOCKR_DISABLED(GPIOC_PIN0) | \ #define VAL_GPIOC_LOCKR (PIN_LOCKR_DISABLED(GPIOC_ARD_A5) | \
PIN_LOCKR_DISABLED(GPIOC_PIN1) | \ PIN_LOCKR_DISABLED(GPIOC_ARD_A4) | \
PIN_LOCKR_DISABLED(GPIOC_PIN2) | \ PIN_LOCKR_DISABLED(GPIOC_ARD_A3) | \
PIN_LOCKR_DISABLED(GPIOC_PIN3) | \ PIN_LOCKR_DISABLED(GPIOC_ARD_A2) | \
PIN_LOCKR_DISABLED(GPIOC_PIN4) | \ PIN_LOCKR_DISABLED(GPIOC_PIN4) | \
PIN_LOCKR_DISABLED(GPIOC_PIN5) | \ PIN_LOCKR_DISABLED(GPIOC_PIN5) | \
PIN_LOCKR_DISABLED(GPIOC_PIN6) | \ PIN_LOCKR_DISABLED(GPIOC_PIN6) | \
PIN_LOCKR_DISABLED(GPIOC_PIN7) | \ PIN_LOCKR_DISABLED(GPIOC_ARD_D7) | \
PIN_LOCKR_DISABLED(GPIOC_PIN8) | \ PIN_LOCKR_DISABLED(GPIOC_PIN8) | \
PIN_LOCKR_DISABLED(GPIOC_PIN9) | \ PIN_LOCKR_DISABLED(GPIOC_PIN9) | \
PIN_LOCKR_DISABLED(GPIOC_PIN10) | \ PIN_LOCKR_DISABLED(GPIOC_PIN10) | \
PIN_LOCKR_DISABLED(GPIOC_PIN11) | \ PIN_LOCKR_DISABLED(GPIOC_PIN11) | \
PIN_LOCKR_DISABLED(GPIOC_PIN12) | \ PIN_LOCKR_DISABLED(GPIOC_PIN12) | \
PIN_LOCKR_DISABLED(GPIOC_PIN13) | \ PIN_LOCKR_DISABLED(GPIOC_BUTTON) | \
PIN_LOCKR_DISABLED(GPIOC_PIN14) | \ PIN_LOCKR_DISABLED(GPIOC_OSC32_IN) | \
PIN_LOCKR_DISABLED(GPIOC_PIN15)) PIN_LOCKR_DISABLED(GPIOC_OSC32_OUT))
/* /*
* GPIOD setup: * GPIOD setup: