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fixed bug #1194 ADCv4: removed incorrect asserts for H7 

these are not needed

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_20.3.x@14852 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
akscram 2021-09-30 05:20:58 +00:00
parent a70950a037
commit 57f570dd9b
2 changed files with 1 additions and 9 deletions
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9
os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c
View File

@ -765,10 +765,6 @@ void adc_lld_stop_conversion(ADCDriver *adcp) {
*/ */
void adcSTM32EnableVREF(ADCDriver *adcp) { void adcSTM32EnableVREF(ADCDriver *adcp) {
#ifdef STM32H7XX
chDbgAssert(STM32_PWR_CR2 & PWR_CR2_MONEN,
"adcSTM32EnableVREF need PWR_CR2_MONEN in STM32_PWR_CR2");
#endif
adcp->adcc->CCR |= ADC_CCR_VREFEN; adcp->adcc->CCR |= ADC_CCR_VREFEN;
} }
@ -799,11 +795,6 @@ void adcSTM32DisableVREF(ADCDriver *adcp) {
*/ */
void adcSTM32EnableTS(ADCDriver *adcp) { void adcSTM32EnableTS(ADCDriver *adcp) {
#ifdef STM32H7XX
chDbgAssert(STM32_PWR_CR2 & PWR_CR2_MONEN,
"adcSTM32EnableVREF need PWR_CR2_MONEN in STM32_PWR_CR2");
#endif
adcp->adcc->CCR |= ADC_CCR_TSEN; adcp->adcc->CCR |= ADC_CCR_TSEN;
} }

1
readme.txt
View File

@ -83,6 +83,7 @@
- NEW: Improved boost settings for STM32G4. - NEW: Improved boost settings for STM32G4.
- NEW: Files mcuconf.h for STM32F746, F767, L432, L452, L476, L496 received - NEW: Files mcuconf.h for STM32F746, F767, L432, L452, L476, L496 received
the missing setting STM32_WSPI_QUADSPI1_PRESCALER_VALUE. the missing setting STM32_WSPI_QUADSPI1_PRESCALER_VALUE.
- FIX: removed incorrect ADCv4 checks for MONEN (bug #1194)
- FIX: Fixed invalid RCC LPUART1 clock enable on STM32G0xx (bug #1189). - FIX: Fixed invalid RCC LPUART1 clock enable on STM32G0xx (bug #1189).
- FIX: Fixed wrong configuration in testex LSM6DSL demos (bug #1184). - FIX: Fixed wrong configuration in testex LSM6DSL demos (bug #1184).
- FIX: Fixed STM32 ADCv3 differences in headers (bug #1182). - FIX: Fixed STM32 ADCv3 differences in headers (bug #1182).