Update the testhal/AVR/PWM with the new ChibiOS architecture.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10048 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
tfateba 2017-01-14 14:08:09 +00:00
parent 7e6afddc6e
commit 5893750163
3 changed files with 86 additions and 49 deletions

View File

@ -28,6 +28,8 @@
#ifndef CHCONF_H
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
/*===========================================================================*/
/**
* @name System timers settings
@ -46,7 +48,7 @@
* @details Frequency of the system timer that drives the system ticks. This
* setting also defines the system tick time unit.
*/
#define CH_CFG_ST_FREQUENCY 1000
#define CH_CFG_ST_FREQUENCY 15624
/**
* @brief Time delta constant for the tick-less mode.
@ -56,7 +58,7 @@
* The value one is not valid, timeouts are rounded up to
* this value.
*/
#define CH_CFG_ST_TIMEDELTA 0
#define CH_CFG_ST_TIMEDELTA 2
/** @} */
@ -78,7 +80,7 @@
* @note Disabling the round robin preemption makes the kernel more compact
* and generally faster.
*/
#define CH_CFG_TIME_QUANTUM 20
#define CH_CFG_TIME_QUANTUM 0
/**
* @brief Managed RAM size.
@ -180,16 +182,6 @@
*/
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
/**
* @brief Atomic semaphore API.
* @details If enabled then the semaphores the @p chSemSignalWait() API
* is included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_SEMAPHORES.
*/
#define CH_USE_SEMSW TRUE
/**
* @brief Mutexes APIs.
* @details If enabled then the mutexes APIs are included in the kernel.
@ -296,18 +288,6 @@
*/
#define CH_CFG_USE_HEAP FALSE
/**
* @brief C-runtime allocator.
* @details If enabled the the heap allocator APIs just wrap the C-runtime
* @p malloc() and @p free() functions.
*
* @note The default is @p FALSE.
* @note Requires @p CH_CFG_USE_HEAP.
* @note The C-runtime may or may not require @p CH_CFG_USE_MEMCORE, see the
* appropriate documentation.
*/
#define CH_CFG_USE_MALLOC_HEAP FALSE
/**
* @brief Memory Pools Allocator APIs.
* @details If enabled then the memory pools allocator APIs are included
@ -378,7 +358,14 @@
*
* @note The default is @p FALSE.
*/
#define CH_DBG_ENABLE_TRACE FALSE
#define CH_DBG_ENABLE_TRACE CH_DBG_TRACE_MASK_DISABLED
/**
* @brief Trace buffer entries.
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
* different from @p CH_DBG_TRACE_MASK_DISABLED.
*/
#define CH_DBG_TRACE_BUFFER_SIZE 128
/**
* @brief Debug option, stack checks.
@ -424,9 +411,9 @@
/**
* @brief Threads descriptor structure extension.
* @details User fields added to the end of the @p Thread structure.
* @details User fields added to the end of the @p thread_t structure.
*/
#define THREAD_EXT_FIELDS \
#define CH_CFG_THREAD_EXTRA_FIELDS \
/* Add threads custom fields here.*/
/**
@ -436,19 +423,15 @@
* @note It is invoked from within @p chThdInit() and implicitly from all
* the threads creation APIs.
*/
#define THREAD_EXT_INIT_HOOK(tp) { \
#define CH_CFG_THREAD_INIT_HOOK(tp) { \
/* Add threads initialization code here.*/ \
}
/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
*
* @note It is inserted into lock zone.
* @note It is also invoked when the threads simply return in order to
* terminate.
*/
#define THREAD_EXT_EXIT_HOOK(tp) { \
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
/* Add threads finalization code here.*/ \
}
@ -460,6 +443,40 @@
/* Context switch code here.*/ \
}
/**
* @brief ISR enter hook.
*/
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
/* IRQ prologue code here.*/ \
}
/**
* @brief ISR exit hook.
*/
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
/* IRQ epilogue code here.*/ \
}
/**
* @brief Idle thread enter hook.
* @note This hook is invoked within a critical zone, no OS functions
* should be invoked from here.
* @note This macro can be used to activate a power saving mode.
*/
#define CH_CFG_IDLE_ENTER_HOOK() { \
/* Idle-enter code here.*/ \
}
/**
* @brief Idle thread leave hook.
* @note This hook is invoked within a critical zone, no OS functions
* should be invoked from here.
* @note This macro can be used to deactivate a power saving mode.
*/
#define CH_CFG_IDLE_LEAVE_HOOK() { \
/* Idle-leave code here.*/ \
}
/**
* @brief Idle Loop hook.
* @details This hook is continuously invoked by the idle thread loop.
@ -473,7 +490,7 @@
* @details This hook is invoked in the system tick handler immediately
* after processing the virtual timers queue.
*/
#define SYSTEM_TICK_EVENT_HOOK() { \
#define CH_CFG_SYSTEM_TICK_HOOK() { \
/* System tick event code here.*/ \
}
@ -482,10 +499,19 @@
* @details This hook is invoked in case to a system halting error before
* the system is halted.
*/
#define SYSTEM_HALT_HOOK() { \
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
/* System halt code here.*/ \
}
/**
* @brief Trace hook.
* @details This hook is invoked each time a new record is written in the
* trace buffer.
*/
#define CH_CFG_TRACE_HOOK(tep) { \
/* Trace code here.*/ \
}
/** @} */
/*===========================================================================*/

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@ -45,7 +45,7 @@ int main(void) {
* more can be done in this thread so we first initialize PWM subsystem.
*/
static PWMConfig pwm1cfg = {
static PWMConfig pwm3cfg = {
1023, /* Not real clock */
1023, /* Maximum PWM count */
NULL,
@ -56,19 +56,20 @@ int main(void) {
},
};
/* PB5-7 are timer 1 pwm channel outputs */
palSetPadMode(IOPORT2, 7, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(IOPORT2, 6, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(IOPORT2, 5, PAL_MODE_OUTPUT_PUSHPULL);
/* PE3-5 are timer 3 pwm channel outputs */
palSetPadMode(IOPORT5, 3, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(IOPORT5, 4, PAL_MODE_OUTPUT_PUSHPULL);
palSetPadMode(IOPORT5, 5, PAL_MODE_OUTPUT_PUSHPULL);
pwmStart(&PWMD1, &pwm1cfg);
pwmStart(&PWMD3, &pwm3cfg);
/* channel 0 with 50% duty cycle, 1 with 25% and 2 with 75% */
pwmEnableChannel(&PWMD1, 0, 511);
pwmEnableChannel(&PWMD1, 1, 255);
pwmEnableChannel(&PWMD1, 2, 767);
pwmEnableChannel(&PWMD3, 0, 511);
pwmEnableChannel(&PWMD3, 1, 255);
pwmEnableChannel(&PWMD3, 2, 767);
chSysInit();
while (1) {}
}

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@ -30,6 +30,16 @@
*/
#define AVR_ADC_USE_ADC1 FALSE
/*
* EXT drivers system settings.
*/
#define AVR_EXT_USE_INT0 FALSE
#define AVR_EXT_USE_INT1 FALSE
#define AVR_EXT_USE_INT2 FALSE
#define AVR_EXT_USE_INT3 FALSE
#define AVR_EXT_USE_INT4 FALSE
#define AVR_EXT_USE_INT5 FALSE
/*
* CAN driver system settings.
*/
@ -41,9 +51,9 @@
/*
* PWM driver system settings.
*/
#define AVR_PWM_USE_TIM1 TRUE
#define AVR_PWM_USE_TIM2 TRUE
#define AVR_PWM_USE_TIM3 FALSE
#define AVR_PWM_USE_TIM1 FALSE
#define AVR_PWM_USE_TIM2 FALSE
#define AVR_PWM_USE_TIM3 TRUE
#define AVR_PWM_USE_TIM4 FALSE
#define AVR_PWM_USE_TIM5 FALSE
@ -67,7 +77,7 @@
/*
* SERIAL driver system settings.
*/
#define AVR_SERIAL_USE_USART0 FALSE
#define AVR_SERIAL_USE_USART0 TRUE
#define AVR_SERIAL_USE_USART1 FALSE
/*