Update the testhal/AVR/PWM with the new ChibiOS architecture.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10048 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -28,6 +28,8 @@
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#ifndef CHCONF_H
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#define CHCONF_H
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#define _CHIBIOS_RT_CONF_
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/*===========================================================================*/
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/**
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* @name System timers settings
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@ -46,7 +48,7 @@
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* @details Frequency of the system timer that drives the system ticks. This
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* setting also defines the system tick time unit.
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*/
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#define CH_CFG_ST_FREQUENCY 1000
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#define CH_CFG_ST_FREQUENCY 15624
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/**
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* @brief Time delta constant for the tick-less mode.
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@ -56,7 +58,7 @@
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* The value one is not valid, timeouts are rounded up to
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* this value.
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*/
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#define CH_CFG_ST_TIMEDELTA 0
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#define CH_CFG_ST_TIMEDELTA 2
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/** @} */
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@ -78,7 +80,7 @@
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* @note Disabling the round robin preemption makes the kernel more compact
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* and generally faster.
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*/
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#define CH_CFG_TIME_QUANTUM 20
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#define CH_CFG_TIME_QUANTUM 0
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/**
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* @brief Managed RAM size.
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@ -180,16 +182,6 @@
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*/
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#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
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/**
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* @brief Atomic semaphore API.
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* @details If enabled then the semaphores the @p chSemSignalWait() API
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* is included in the kernel.
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*
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* @note The default is @p TRUE.
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* @note Requires @p CH_CFG_USE_SEMAPHORES.
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*/
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#define CH_USE_SEMSW TRUE
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/**
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* @brief Mutexes APIs.
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* @details If enabled then the mutexes APIs are included in the kernel.
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@ -296,18 +288,6 @@
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*/
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#define CH_CFG_USE_HEAP FALSE
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/**
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* @brief C-runtime allocator.
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* @details If enabled the the heap allocator APIs just wrap the C-runtime
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* @p malloc() and @p free() functions.
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*
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* @note The default is @p FALSE.
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* @note Requires @p CH_CFG_USE_HEAP.
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* @note The C-runtime may or may not require @p CH_CFG_USE_MEMCORE, see the
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* appropriate documentation.
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*/
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#define CH_CFG_USE_MALLOC_HEAP FALSE
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/**
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* @brief Memory Pools Allocator APIs.
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* @details If enabled then the memory pools allocator APIs are included
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@ -378,7 +358,14 @@
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*
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* @note The default is @p FALSE.
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*/
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#define CH_DBG_ENABLE_TRACE FALSE
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#define CH_DBG_ENABLE_TRACE CH_DBG_TRACE_MASK_DISABLED
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/**
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* @brief Trace buffer entries.
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* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
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* different from @p CH_DBG_TRACE_MASK_DISABLED.
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*/
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#define CH_DBG_TRACE_BUFFER_SIZE 128
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/**
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* @brief Debug option, stack checks.
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@ -424,9 +411,9 @@
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/**
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* @brief Threads descriptor structure extension.
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* @details User fields added to the end of the @p Thread structure.
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* @details User fields added to the end of the @p thread_t structure.
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*/
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#define THREAD_EXT_FIELDS \
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#define CH_CFG_THREAD_EXTRA_FIELDS \
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/* Add threads custom fields here.*/
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/**
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@ -436,19 +423,15 @@
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* @note It is invoked from within @p chThdInit() and implicitly from all
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* the threads creation APIs.
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*/
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#define THREAD_EXT_INIT_HOOK(tp) { \
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#define CH_CFG_THREAD_INIT_HOOK(tp) { \
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/* Add threads initialization code here.*/ \
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}
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/**
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* @brief Threads finalization hook.
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* @details User finalization code added to the @p chThdExit() API.
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*
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* @note It is inserted into lock zone.
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* @note It is also invoked when the threads simply return in order to
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* terminate.
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*/
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#define THREAD_EXT_EXIT_HOOK(tp) { \
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#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
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/* Add threads finalization code here.*/ \
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}
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@ -460,6 +443,40 @@
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/* Context switch code here.*/ \
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}
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/**
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* @brief ISR enter hook.
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*/
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#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
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/* IRQ prologue code here.*/ \
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}
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/**
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* @brief ISR exit hook.
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*/
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#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
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/* IRQ epilogue code here.*/ \
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}
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/**
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* @brief Idle thread enter hook.
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* @note This hook is invoked within a critical zone, no OS functions
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* should be invoked from here.
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* @note This macro can be used to activate a power saving mode.
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*/
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#define CH_CFG_IDLE_ENTER_HOOK() { \
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/* Idle-enter code here.*/ \
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}
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/**
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* @brief Idle thread leave hook.
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* @note This hook is invoked within a critical zone, no OS functions
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* should be invoked from here.
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* @note This macro can be used to deactivate a power saving mode.
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*/
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#define CH_CFG_IDLE_LEAVE_HOOK() { \
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/* Idle-leave code here.*/ \
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}
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/**
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* @brief Idle Loop hook.
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* @details This hook is continuously invoked by the idle thread loop.
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* @details This hook is invoked in the system tick handler immediately
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* after processing the virtual timers queue.
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*/
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#define SYSTEM_TICK_EVENT_HOOK() { \
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#define CH_CFG_SYSTEM_TICK_HOOK() { \
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/* System tick event code here.*/ \
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}
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@ -482,10 +499,19 @@
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* @details This hook is invoked in case to a system halting error before
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* the system is halted.
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*/
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#define SYSTEM_HALT_HOOK() { \
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#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
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/* System halt code here.*/ \
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}
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/**
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* @brief Trace hook.
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* @details This hook is invoked each time a new record is written in the
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* trace buffer.
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*/
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#define CH_CFG_TRACE_HOOK(tep) { \
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/* Trace code here.*/ \
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}
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/** @} */
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/*===========================================================================*/
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@ -45,7 +45,7 @@ int main(void) {
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* more can be done in this thread so we first initialize PWM subsystem.
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*/
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static PWMConfig pwm1cfg = {
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static PWMConfig pwm3cfg = {
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1023, /* Not real clock */
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1023, /* Maximum PWM count */
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NULL,
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},
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};
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/* PB5-7 are timer 1 pwm channel outputs */
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palSetPadMode(IOPORT2, 7, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(IOPORT2, 6, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(IOPORT2, 5, PAL_MODE_OUTPUT_PUSHPULL);
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/* PE3-5 are timer 3 pwm channel outputs */
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palSetPadMode(IOPORT5, 3, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(IOPORT5, 4, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(IOPORT5, 5, PAL_MODE_OUTPUT_PUSHPULL);
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pwmStart(&PWMD1, &pwm1cfg);
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pwmStart(&PWMD3, &pwm3cfg);
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/* channel 0 with 50% duty cycle, 1 with 25% and 2 with 75% */
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pwmEnableChannel(&PWMD1, 0, 511);
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pwmEnableChannel(&PWMD1, 1, 255);
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pwmEnableChannel(&PWMD1, 2, 767);
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pwmEnableChannel(&PWMD3, 0, 511);
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pwmEnableChannel(&PWMD3, 1, 255);
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pwmEnableChannel(&PWMD3, 2, 767);
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chSysInit();
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while (1) {}
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}
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*/
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#define AVR_ADC_USE_ADC1 FALSE
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/*
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* EXT drivers system settings.
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*/
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#define AVR_EXT_USE_INT0 FALSE
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#define AVR_EXT_USE_INT1 FALSE
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#define AVR_EXT_USE_INT2 FALSE
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#define AVR_EXT_USE_INT3 FALSE
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#define AVR_EXT_USE_INT4 FALSE
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#define AVR_EXT_USE_INT5 FALSE
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/*
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* CAN driver system settings.
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*/
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/*
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* PWM driver system settings.
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*/
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#define AVR_PWM_USE_TIM1 TRUE
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#define AVR_PWM_USE_TIM2 TRUE
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#define AVR_PWM_USE_TIM3 FALSE
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#define AVR_PWM_USE_TIM1 FALSE
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#define AVR_PWM_USE_TIM2 FALSE
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#define AVR_PWM_USE_TIM3 TRUE
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#define AVR_PWM_USE_TIM4 FALSE
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#define AVR_PWM_USE_TIM5 FALSE
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/*
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* SERIAL driver system settings.
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*/
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#define AVR_SERIAL_USE_USART0 FALSE
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#define AVR_SERIAL_USE_USART0 TRUE
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#define AVR_SERIAL_USE_USART1 FALSE
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/*
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