diff --git a/demos/ARM7-AT91SAM7X-GCC/Makefile b/demos/ARM7-AT91SAM7X-GCC/Makefile
index b419f525f..9c2006fe2 100644
--- a/demos/ARM7-AT91SAM7X-GCC/Makefile
+++ b/demos/ARM7-AT91SAM7X-GCC/Makefile
@@ -78,10 +78,11 @@ ASRC = ../../ports/ARM7-AT91SAM7X/GCC/chcore.c \
TSRC =
# List ASM source files here
-ASMSRC = ../../ports/ARM7-AT91SAM7X/GCC/crt0.s
+ASMSRC = ../../ports/ARM7-AT91SAM7X/GCC/crt0.s ../../ports/ARM7/chsys.s
# List all user directories here
-UINCDIR = ../../src/include ../../src/lib ../../ports/ARM7-AT91SAM7X/GCC
+UINCDIR = ../../src/include ../../src/lib \
+ ../../ports/ARM7 ../../ports/ARM7-AT91SAM7X/GCC
# List the user directory to look for the libraries here
ULIBDIR =
@@ -130,6 +131,7 @@ ODFLAGS = -x --syms
# Thumb interwork enabled only if needed because it kills performance.
ifneq ($(TSRC),)
CPFLAGS += -D THUMB_PRESENT
+ ASFLAGS += -D THUMB_PRESENT
ifneq ($(ASRC),)
# Mixed ARM and THUMB case.
CPFLAGS += -mthumb-interwork
diff --git a/demos/ARM7-AT91SAM7X-GCC/Makefile.thumb b/demos/ARM7-AT91SAM7X-GCC/Makefile.thumb
index bb33297ca..5dd2f33c6 100644
--- a/demos/ARM7-AT91SAM7X-GCC/Makefile.thumb
+++ b/demos/ARM7-AT91SAM7X-GCC/Makefile.thumb
@@ -78,10 +78,11 @@ TSRC = ../../ports/ARM7-AT91SAM7X/GCC/chcore.c \
board.c main.c
# List ASM source files here
-ASMSRC = ../../ports/ARM7-AT91SAM7X/GCC/crt0.s
+ASMSRC = ../../ports/ARM7-AT91SAM7X/GCC/crt0.s ../../ports/ARM7/chsys.s
# List all user directories here
-UINCDIR = ../../src/include ../../src/lib ../../ports/ARM7-AT91SAM7X/GCC
+UINCDIR = ../../src/include ../../src/lib \
+ ../../ports/ARM7 ../../ports/ARM7-AT91SAM7X/GCC
# List the user directory to look for the libraries here
ULIBDIR =
@@ -130,6 +131,7 @@ ODFLAGS = -x --syms
# Thumb interwork enabled only if needed because it kills performance.
ifneq ($(TSRC),)
CPFLAGS += -D THUMB_PRESENT
+ ASFLAGS += -D THUMB_PRESENT
ifneq ($(ASRC),)
# Mixed ARM and THUMB case.
CPFLAGS += -mthumb-interwork
diff --git a/demos/ARM7-AT91SAM7X-GCC/board.c b/demos/ARM7-AT91SAM7X-GCC/board.c
index 8d0851329..236e1100e 100644
--- a/demos/ARM7-AT91SAM7X-GCC/board.c
+++ b/demos/ARM7-AT91SAM7X-GCC/board.c
@@ -30,7 +30,7 @@ static void SpuriousHandler(void) {
chSysIRQEnterI();
- AT91C_BASE_AIC->AIC_EOICR = (AT91_REG)AT91C_BASE_AIC;
+ AT91C_BASE_AIC->AIC_EOICR = 0;
chSysIRQExitI();
}
@@ -47,6 +47,7 @@ static void SYSIrqHandler(void) {
(void) AT91C_BASE_PITC->PITC_PIVR;
chSysTimerHandlerI();
}
+ AT91C_BASE_AIC->AIC_EOICR = 0; \
chSysIRQExitI();
}
diff --git a/ports/ARM7-AT91SAM7X/GCC/chcore.c b/ports/ARM7-AT91SAM7X/GCC/chcore.c
index 80004fb25..053cc4831 100644
--- a/ports/ARM7-AT91SAM7X/GCC/chcore.c
+++ b/ports/ARM7-AT91SAM7X/GCC/chcore.c
@@ -33,194 +33,12 @@ void _IdleThread(void *p) {
}
}
-/*
- * The following functions are present only if there is in the system any
- * code compiled as THUMB that may invoke them.
- * NOTE: The undefs are there in case this module is compiled in ARM mode but
- * there are THUMB modules in the system.
- */
-#ifdef THUMB_PRESENT
-#undef chSysLock
-void chSysLock(void) {
-
-#ifdef THUMB
- asm(".p2align 2,, \n\t" \
- "mov r0, pc \n\t" \
- "bx r0 \n\t" \
- ".code 32 \n\t");
-#endif
-
- asm("msr CPSR_c, #0x9F \n\t" \
- "bx lr \n\t");
-}
-
-#undef chSysUnlock
-void chSysUnlock(void) {
-
-#ifdef THUMB
- asm(".p2align 2,, \n\t" \
- "mov r0, pc \n\t" \
- "bx r0 \n\t" \
- ".code 32 \n\t");
-#endif
-
- asm("msr CPSR_c, #0x1F \n\t" \
- "bx lr \n\t");
-}
-#endif
-
-void chSysSwitchI(Thread *otp, Thread *ntp) {
-
-#ifdef THUMB
- asm(".p2align 2,, \n\t" \
- "mov r2, pc \n\t" \
- "bx r2 \n\t" \
- ".code 32 \n\t");
-#endif
-
-#ifdef CH_CURRP_REGISTER_CACHE
- asm("stmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr} \n\t" \
- "str sp, [r0, #16] \n\t" \
- "ldr sp, [r1, #16] \n\t");
-#ifdef THUMB_PRESENT
- asm("ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr} \n\t" \
- "bx lr \n\t");
-#else /* !THUMB_PRESENT */
- asm("ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, pc} \n\t");
-#endif /* !THUMB_PRESENT */
-#else /* !CH_CURRP_REGISTER_CACHE */
- asm("stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr} \n\t" \
- "str sp, [r0, #16] \n\t" \
- "ldr sp, [r1, #16] \n\t");
-#ifdef THUMB_PRESENT
- asm("ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr} \n\t" \
- "bx lr \n\t");
-#else /* !THUMB_PRESENT */
- asm("ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc} \n\t");
-#endif /* !THUMB_PRESENT */
-#endif /* !CH_CURRP_REGISTER_CACHE */
-}
-
/*
* System console message (not implemented).
*/
void chSysPuts(char *msg) {
}
-/*
- * Common IRQ exit code, \p chSysIRQExitI() just jumps here.
- *
- * System stack frame structure after a context switch in the
- * interrupt handler:
- *
- * High +------------+
- * | LR_USR | -+
- * | R12 | |
- * | R3 | |
- * | R2 | | External context: IRQ handler frame
- * | R1 | |
- * | R0 | |
- * | LR_IRQ | | (user code return address)
- * | SPSR | -+ (user code status)
- * | .... | <- chSchDoRescheduleI() stack frame, optimize it for space
- * | LR | -+ (system code return address)
- * | R11 | |
- * | R10 | |
- * | R9 | |
- * | R8 | | Internal context: chSysSwitchI() frame
- * | (R7) | | (optional, see CH_CURRP_REGISTER_CACHE)
- * | R6 | |
- * | R5 | |
- * SP-> | R4 | -+
- * Low +------------+
- */
-__attribute__((naked, weak))
-void IrqCommon(void) {
- register BOOL b asm("r0");
-
- AT91C_BASE_AIC->AIC_EOICR = (AT91_REG)AT91C_BASE_AIC;
- b = chSchRescRequiredI();
-#ifdef THUMB
- asm(".p2align 2,, \n\t" \
- "mov lr, pc \n\t" \
- "bx lr \n\t" \
- ".code 32 \n\t");
-#endif
- /*
- * If a reschedulation is not required then just returns from the IRQ.
- */
- asm("cmp r0, #0 \n\t" \
- "ldmeqfd sp!, {r0-r3, r12, lr} \n\t" \
- "subeqs pc, lr, #4 \n\t");
- /*
- * Reschedulation required, saves the external context on the
- * system/user stack and empties the IRQ stack.
- */
- asm(".set MODE_IRQ, 0x12 \n\t" \
- ".set MODE_SYS, 0x1F \n\t" \
- ".set F_BIT, 0x40 \n\t" \
- ".set I_BIT, 0x80 \n\t" \
- "ldmfd sp!, {r0-r3, r12, lr} \n\t" \
- "msr CPSR_c, #MODE_SYS | I_BIT \n\t" \
- "stmfd sp!, {r0-r3, r12, lr} \n\t" \
- "msr CPSR_c, #MODE_IRQ | I_BIT \n\t" \
- "mrs r0, SPSR \n\t" \
- "mov r1, lr \n\t" \
- "msr CPSR_c, #MODE_SYS | I_BIT \n\t" \
- "stmfd sp!, {r0, r1} \n\t");
-
-#ifdef THUMB_NO_INTERWORKING
- asm("add r0, pc, #1 \n\t" \
- "bx r0 \n\t" \
- ".code 16 \n\t" \
- "bl chSchDoRescheduleI \n\t" \
- ".p2align 2,, \n\t" \
- "mov lr, pc \n\t" \
- "bx lr \n\t" \
- ".code 32 \n\t");
-#else
- asm("bl chSchDoRescheduleI \n\t");
-#endif
-
- /*
- * Restores the external context.
- */
- asm("ldmfd sp!, {r0, r1} \n\t" \
- "msr CPSR_c, #MODE_IRQ | I_BIT \n\t" \
- "msr SPSR_fsxc, r0 \n\t" \
- "mov lr, r1 \n\t" \
- "msr CPSR_c, #MODE_SYS | I_BIT \n\t" \
- "ldmfd sp!, {r0-r3, r12, lr} \n\t" \
- "msr CPSR_c, #MODE_IRQ | I_BIT \n\t" \
- "subs pc, lr, #4 \n\t");
-
- /*
- * Threads entry/exit code. It is declared weak so you can easily replace it.
- * NOTE: It is always invoked in ARM mode, it does the mode switching.
- * NOTE: It is included into IrqCommon to make sure the symbol refers to
- * 32 bit code.
- */
- asm(".weak threadstart \n\t" \
- ".globl threadstart \n\t" \
- "threadstart: \n\t" \
- "msr CPSR_c, #MODE_SYS \n\t");
-#ifndef THUMB_NO_INTERWORKING
- asm("mov r0, r5 \n\t" \
- "mov lr, pc \n\t" \
- "bx r4 \n\t" \
- "bl chThdExit \n\t");
-#else
- asm("add r0, pc, #1 \n\t" \
- "bx r0 \n\t" \
- ".code 16 \n\t" \
- "mov r0, r5 \n\t" \
- "bl jmpr4 \n\t" \
- "bl chThdExit \n\t" \
- "jmpr4: \n\t" \
- "bx r4 \n\t");
-#endif
-}
-
/*
* System halt.
*/
@@ -228,8 +46,8 @@ __attribute__((naked, weak))
void chSysHalt(void) {
#ifdef THUMB
- asm("ldr r0, =_halt32 \n\t" \
- "bx r0 \n\t");
+ asm("b _halt16");
+#else
+ asm("b _halt32");
#endif
- asm("b _halt32 \n\t");
}
diff --git a/ports/ARM7-AT91SAM7X/GCC/crt0.s b/ports/ARM7-AT91SAM7X/GCC/crt0.s
index add484686..dbe9db079 100644
--- a/ports/ARM7-AT91SAM7X/GCC/crt0.s
+++ b/ports/ARM7-AT91SAM7X/GCC/crt0.s
@@ -169,10 +169,4 @@ AbortHandler:
.globl FiqHandler
FiqHandler:
-.weak _halt32
-.globl _halt32
-_halt32:
- mrs r0, CPSR
- orr r0, #I_BIT | F_BIT
- msr CPSR_c, r0
.loop: b .loop
diff --git a/ports/ARM7-AT91SAM7X/GCC/sam7x_serial.c b/ports/ARM7-AT91SAM7X/GCC/sam7x_serial.c
index 2c03511c6..5d56e267d 100644
--- a/ports/ARM7-AT91SAM7X/GCC/sam7x_serial.c
+++ b/ports/ARM7-AT91SAM7X/GCC/sam7x_serial.c
@@ -63,6 +63,7 @@ static void ServeInterrupt(AT91PS_USART u, FullDuplexDriver *com) {
SetError(u->US_CSR, com);
u->US_CR = AT91C_US_RSTSTA;
}
+ AT91C_BASE_AIC->AIC_EOICR = 0; \
}
__attribute__((naked, weak))
diff --git a/ports/ARM7-AT91SAM7X/GCC/chcore.h b/ports/ARM7/chcore.h
similarity index 95%
rename from ports/ARM7-AT91SAM7X/GCC/chcore.h
rename to ports/ARM7/chcore.h
index 8f3e7f4be..2917428f3 100644
--- a/ports/ARM7-AT91SAM7X/GCC/chcore.h
+++ b/ports/ARM7/chcore.h
@@ -116,6 +116,10 @@ extern void chSysUnlock(void);
}
#endif /* !THUMB */
+#ifdef THUMB
+#define chSysSwitchI chSysSwitchI_thumb
+#endif /* THUMB */
+
/* It requires zero bytes, but better be safe.*/
#define IDLE_THREAD_STACK_SIZE 8
void _IdleThread(void *p) __attribute__((noreturn));
diff --git a/ports/ARM7/chsys.s b/ports/ARM7/chsys.s
new file mode 100644
index 000000000..770edaaec
--- /dev/null
+++ b/ports/ARM7/chsys.s
@@ -0,0 +1,225 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+/*
+ * ARM7 port system code.
+ */
+
+#include
+
+.set MODE_USR, 0x10
+.set MODE_FIQ, 0x11
+.set MODE_IRQ, 0x12
+.set MODE_SVC, 0x13
+.set MODE_ABT, 0x17
+.set MODE_UND, 0x1B
+.set MODE_SYS, 0x1F
+
+.equ I_BIT, 0x80
+.equ F_BIT, 0x40
+
+.text
+
+/*
+ * Interrupt enable/disable functions, only present if there is THUMB code in
+ * the system because those are inlined in ARM code.
+ */
+#ifdef THUMB_PRESENT
+.balign 16
+.code 16
+.thumb_func
+.global chSysLock
+chSysLock:
+ mov r0, pc
+ bx r0
+.code 32
+ msr CPSR_c, #MODE_SYS | I_BIT
+ bx lr
+
+.balign 16
+.code 16
+.thumb_func
+.global chSysUnlock
+chSysUnlock:
+ mov r0, pc
+ bx r0
+.code 32
+ msr CPSR_c, #MODE_SYS
+ bx lr
+#endif
+
+.balign 16
+#ifdef THUMB_PRESENT
+.code 16
+.thumb_func
+.global chSysSwitchI_thumb
+chSysSwitchI_thumb:
+ mov r2, pc
+ bx r2
+ // Jumps into chSysSwitchI in ARM mode
+#endif
+.code 32
+.global chSysSwitchI
+chSysSwitchI:
+#ifdef CH_CURRP_REGISTER_CACHE
+ stmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr}
+ str sp, [r0, #16]
+ ldr sp, [r1, #16]
+#ifdef THUMB_PRESENT
+ ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr}
+ bx lr
+#else /* !THUMB_PRESENT */
+ ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, pc}
+#endif /* !THUMB_PRESENT */
+#else /* !CH_CURRP_REGISTER_CACHE */
+ stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
+ str sp, [r0, #16]
+ ldr sp, [r1, #16]
+#ifdef THUMB_PRESENT
+ ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
+ bx lr
+#else /* !THUMB_PRESENT */
+ ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc}
+#endif /* !THUMB_PRESENT */
+#endif /* !CH_CURRP_REGISTER_CACHE */
+
+/*
+ * Common exit point for all IRQ routines, it performs the rescheduling if
+ * required.
+ * System stack frame structure after a context switch in the
+ * interrupt handler:
+ *
+ * High +------------+
+ * | LR_USR | -+
+ * | R12 | |
+ * | R3 | |
+ * | R2 | | External context: IRQ handler frame
+ * | R1 | |
+ * | R0 | |
+ * | LR_IRQ | | (user code return address)
+ * | SPSR | -+ (user code status)
+ * | .... | <- mk_DoRescheduleI() stack frame, optimize it for space
+ * | LR | -+ (system code return address)
+ * | R11 | |
+ * | R10 | |
+ * | R9 | |
+ * | R8 | | Internal context: mk_SwitchI() frame
+ * | (R7) | | (optional, see CH_CURRP_REGISTER_CACHE)
+ * | R6 | |
+ * | R5 | |
+ * SP-> | R4 | -+
+ * Low +------------+
+ */
+.balign 16
+#ifdef THUMB_NO_INTERWORKING
+.code 16
+.thumb_func
+.globl IrqCommon
+IrqCommon:
+ bl chSchRescRequiredI
+ mov lr, pc
+ bx lr
+.code 32
+#else /* !THUMB_NO_INTERWORKING */
+.code 32
+.globl IrqCommon
+IrqCommon:
+ bl chSchRescRequiredI
+#endif /* !THUMB_NO_INTERWORKING */
+ cmp r0, #0 // Simply returns if a
+ ldmeqfd sp!, {r0-r3, r12, lr} // reschedule is not
+ subeqs pc, lr, #4 // required.
+
+ // Saves the IRQ mode registers in the system stack.
+ ldmfd sp!, {r0-r3, r12, lr} // IRQ stack now empty.
+ msr CPSR_c, #MODE_SYS | I_BIT
+ stmfd sp!, {r0-r3, r12, lr} // Registers on System Stack.
+ msr CPSR_c, #MODE_IRQ | I_BIT
+ mrs r0, SPSR
+ mov r1, lr
+ msr CPSR_c, #MODE_SYS | I_BIT
+ stmfd sp!, {r0, r1} // Push R0=SPSR, R1=LR_IRQ.
+
+ // Context switch.
+#ifdef THUMB_NO_INTERWORKING
+ add r0, pc, #1
+ bx r0
+.code 16
+ bl chSchDoRescheduleI
+ mov lr, pc
+ bx lr
+.code 32
+#else /* !THUMB_NO_INTERWORKING */
+ bl chSchDoRescheduleI
+#endif /* !THUMB_NO_INTERWORKING */
+
+ // Re-establish the IRQ conditions again.
+ ldmfd sp!, {r0, r1} // Pop R0=SPSR, R1=LR_IRQ.
+ msr CPSR_c, #MODE_IRQ | I_BIT
+ msr SPSR_fsxc, r0
+ mov lr, r1
+ msr CPSR_c, #MODE_SYS | I_BIT
+ ldmfd sp!, {r0-r3, r12, lr}
+ msr CPSR_c, #MODE_IRQ | I_BIT
+ subs pc, lr, #4
+
+/*
+ * Threads trampoline code.
+ * NOTE: The threads always start in ARM mode then switch to the thread-function mode.
+ */
+.balign 16
+.code 32
+.globl threadstart
+threadstart:
+ msr CPSR_c, #MODE_SYS
+#ifndef THUMB_NO_INTERWORKING
+ mov r0, r5
+ mov lr, pc
+ bx r4
+ bl chThdExit
+#else /* !THUMB_NO_INTERWORKING */
+ add r0, pc, #1
+ bx r0
+.code 16
+ mov r0, r5
+ bl jmpr4
+ bl chThdExit
+jmpr4:
+ bx r4
+#endif /* !THUMB_NO_INTERWORKING */
+
+/*
+ * System stop code.
+ */
+.code 16
+.p2align 2,,
+.thumb_func
+.weak _halt16
+.globl _halt16
+_halt16:
+ mov r0, pc
+ bx r0
+.code 32
+.weak _halt32
+.globl _halt32
+_halt32:
+ mrs r0, CPSR
+ orr r0, #I_BIT | F_BIT
+ msr CPSR_c, r0
+.loop: b .loop
diff --git a/ports/ARM7-AT91SAM7X/GCC/chtypes.h b/ports/ARM7/chtypes.h
similarity index 100%
rename from ports/ARM7-AT91SAM7X/GCC/chtypes.h
rename to ports/ARM7/chtypes.h