andreika-git
/
ChibiOS
mirror of https://github.com/andreika-git/ChibiOS.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3788 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2012-01-11 18:02:20 +00:00
parent 1ed89364ca
commit 58f1fe92ee
35 changed files with 120 additions and 58 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
demos/ARM7-AT91SAM7S-FATFS-GCC/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/ARM7-AT91SAM7S-GCC/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/ARM7-AT91SAM7X-FATFS-GCC/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/ARM7-AT91SAM7X-GCC/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/ARM7-AT91SAM7X-LWIP-GCC/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/ARM7-AT91SAM7X-UIP-GCC/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/ARM7-LPC214x-FATFS-GCC/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/ARM7-LPC214x-G++/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/ARM7-LPC214x-GCC/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/ARMCM0-LPC1114-LPCXPRESSO/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/ARMCM3-LPC1343-LPCXPRESSO/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/AVR-AT90CANx-GCC/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/AVR-ATmega128-GCC/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/MSP430-MSP430x1611-GCC/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/PPC-SPC563-GCC/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/Posix-GCC/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/STM8L-STM8L152-DISCOVERY-STVD/demo/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/STM8S-STM8S105-DISCOVERY-STVD/demo/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/STM8S-STM8S208-RC/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/Win32-MinGW/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
demos/Win32-MinGW/main.c
View File

@ -61,7 +61,7 @@ static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) {
tp = chRegFirstThread();
do {
chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n",
(uint32_t)tp, (uint32_t)tp->p_ctx.r13,
(uint32_t)tp, (uint32_t)tp->p_ctx.esp,
(uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1),
states[tp->p_state], (uint32_t)tp->p_time);
tp = chRegNextThread(tp);

12
os/hal/platforms/Posix/hal_lld.c
View File

@ -78,8 +78,10 @@ void ChkIntSources(void) {
#if HAL_USE_SERIAL
if (sd_lld_interrupt_pending()) {
dbg_check_lock();
if (chSchIsPreemptionRequired())
chSchDoReschedule();
dbg_check_unlock();
return;
}
#endif
@ -87,9 +89,19 @@ void ChkIntSources(void) {
gettimeofday(&tv, NULL);
if (timercmp(&tv, &nextcnt, >=)) {
timeradd(&nextcnt, &tick, &nextcnt);
CH_IRQ_PROLOGUE();
chSysLockFromIsr();
chSysTimerHandlerI();
chSysUnlockFromIsr();
CH_IRQ_EPILOGUE();
dbg_check_lock();
if (chSchIsPreemptionRequired())
chSchDoReschedule();
dbg_check_unlock();
}
}

22
os/hal/platforms/Posix/serial_lld.c
View File

@ -120,7 +120,9 @@ static bool_t connint(SerialDriver *sdp) {
printf("%s: Unable to setup non blocking mode on data socket\n", sdp->com_name);
goto abort;
}
chSysLockFromIsr();
chIOAddFlagsI(sdp, IO_CONNECTED);
chSysUnlockFromIsr();
return TRUE;
}
return FALSE;
@ -146,7 +148,9 @@ static bool_t inint(SerialDriver *sdp) {
case 0:
close(sdp->com_data);
sdp->com_data = INVALID_SOCKET;
chSysLockFromIsr();
chIOAddFlagsI(sdp, IO_DISCONNECTED);
chSysUnlockFromIsr();
return FALSE;
case INVALID_SOCKET:
if (errno == EWOULDBLOCK)
@ -155,8 +159,11 @@ static bool_t inint(SerialDriver *sdp) {
sdp->com_data = INVALID_SOCKET;
return FALSE;
}
for (i = 0; i < n; i++)
for (i = 0; i < n; i++) {
chSysLockFromIsr();
sdIncomingDataI(sdp, data[i]);
chSysUnlockFromIsr();
}
return TRUE;
}
return FALSE;
@ -171,7 +178,9 @@ static bool_t outint(SerialDriver *sdp) {
/*
* Input.
*/
chSysLockFromIsr();
n = sdRequestDataI(sdp);
chSysUnlockFromIsr();
if (n < 0)
return FALSE;
data[0] = (uint8_t)n;
@ -180,7 +189,9 @@ static bool_t outint(SerialDriver *sdp) {
case 0:
close(sdp->com_data);
sdp->com_data = INVALID_SOCKET;
chSysLockFromIsr();
chIOAddFlagsI(sdp, IO_DISCONNECTED);
chSysUnlockFromIsr();
return FALSE;
case INVALID_SOCKET:
if (errno == EWOULDBLOCK)
@ -256,10 +267,17 @@ void sd_lld_stop(SerialDriver *sdp) {
}
bool_t sd_lld_interrupt_pending(void) {
bool_t b;
return connint(&SD1) || connint(&SD2) ||
CH_IRQ_PROLOGUE();
b = connint(&SD1) || connint(&SD2) ||
inint(&SD1) || inint(&SD2) ||
outint(&SD1) || outint(&SD2);
CH_IRQ_EPILOGUE();
return b;
}
#endif /* HAL_USE_SERIAL */

1
os/hal/platforms/STM32F1xx/hal_lld.c
View File

@ -54,6 +54,7 @@ static void hal_lld_backup_domain_init(void) {
if ((RCC->BDCR & RCC_BDCR_LSEON) == 0) {
/* Backup domain reset.*/
RCC->BDCR = RCC_BDCR_BDRST;
RCC->BDCR = 0;
RCC->BDCR = RCC_BDCR_LSEON;
while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
; /* Waits until LSE is stable. */

1
os/hal/platforms/STM32F2xx/hal_lld.c
View File

@ -54,6 +54,7 @@ static void hal_lld_backup_domain_init(void) {
if ((RCC->BDCR & RCC_BDCR_LSEON) == 0) {
/* Backup domain reset.*/
RCC->BDCR = RCC_BDCR_BDRST;
RCC->BDCR = 0;
RCC->BDCR = RCC_BDCR_LSEON;
while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
; /* Waits until LSE is stable. */

1
os/hal/platforms/STM32F4xx/hal_lld.c
View File

@ -54,6 +54,7 @@ static void hal_lld_backup_domain_init(void) {
if ((RCC->BDCR & RCC_BDCR_LSEON) == 0) {
/* Backup domain reset.*/
RCC->BDCR = RCC_BDCR_BDRST;
RCC->BDCR = 0;
RCC->BDCR = RCC_BDCR_LSEON;
while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
; /* Waits until LSE is stable. */

15
os/hal/platforms/STM32L1xx/hal_lld.c
View File

@ -51,11 +51,12 @@ static void hal_lld_backup_domain_init(void) {
/* If enabled then the LSE is started.*/
#if STM32_LSE_ENABLED
if ((RCC->BDCR & RCC_BDCR_LSEON) == 0) {
if ((RCC->CSR & RCC_CSR_LSEON) == 0) {
/* Backup domain reset.*/
RCC->BDCR = RCC_BDCR_BDRST;
RCC->BDCR = RCC_BDCR_LSEON;
while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
RCC->CSR |= RCC_CSR_RTCRST;
RCC->CSR &= ~RCC_CSR_RTCRST;
RCC->CSR |= RCC_CSR_LSEON;
while ((RCC->CSR & RCC_CSR_LSERDY) == 0)
; /* Waits until LSE is stable. */
}
#endif
@ -63,12 +64,12 @@ static void hal_lld_backup_domain_init(void) {
#if STM32_RTCSEL != STM32_RTCSEL_NOCLOCK
/* If the backup domain hasn't been initialized yet then proceed with
initialization.*/
if ((RCC->BDCR & RCC_BDCR_RTCEN) == 0) {
if ((RCC->CSR & RCC_CSR_RTCEN) == 0) {
/* Selects clock source.*/
RCC->BDCR = (RCC->BDCR & ~RCC_BDCR_RTCSEL) | STM32_RTCSEL;
RCC->CSR = (RCC->CSR & ~RCC_CSR_RTCSEL) | STM32_RTCSEL;
/* RTC clock enabled.*/
RCC->BDCR |= RCC_BDCR_RTCEN;
RCC->CSR |= RCC_CSR_RTCEN;
}
#endif /* STM32_RTCSEL != STM32_RTCSEL_NOCLOCK */

12
os/hal/platforms/Win32/hal_lld.c
View File

@ -83,8 +83,10 @@ void ChkIntSources(void) {
#if HAL_USE_SERIAL
if (sd_lld_interrupt_pending()) {
dbg_check_lock();
if (chSchIsPreemptionRequired())
chSchDoReschedule();
dbg_check_unlock();
return;
}
#endif
@ -93,9 +95,19 @@ void ChkIntSources(void) {
QueryPerformanceCounter(&n);
if (n.QuadPart > nextcnt.QuadPart) {
nextcnt.QuadPart += slice.QuadPart;
CH_IRQ_PROLOGUE();
chSysLockFromIsr();
chSysTimerHandlerI();
chSysUnlockFromIsr();
CH_IRQ_EPILOGUE();
dbg_check_lock();
if (chSchIsPreemptionRequired())
chSchDoReschedule();
dbg_check_unlock();
}
}

22
os/hal/platforms/Win32/serial_lld.c
View File

@ -113,7 +113,9 @@ static bool_t connint(SerialDriver *sdp) {
printf("%s: Unable to setup non blocking mode on data socket\n", sdp->com_name);
goto abort;
}
chSysLockFromIsr();
chIOAddFlagsI(sdp, IO_CONNECTED);
chSysUnlockFromIsr();
return TRUE;
}
return FALSE;
@ -140,7 +142,9 @@ static bool_t inint(SerialDriver *sdp) {
case 0:
closesocket(sdp->com_data);
sdp->com_data = INVALID_SOCKET;
chSysLockFromIsr();
chIOAddFlagsI(sdp, IO_DISCONNECTED);
chSysUnlockFromIsr();
return FALSE;
case SOCKET_ERROR:
if (WSAGetLastError() == WSAEWOULDBLOCK)
@ -149,8 +153,11 @@ static bool_t inint(SerialDriver *sdp) {
sdp->com_data = INVALID_SOCKET;
return FALSE;
}
for (i = 0; i < n; i++)
for (i = 0; i < n; i++) {
chSysLockFromIsr();
sdIncomingDataI(sdp, data[i]);
chSysUnlockFromIsr();
}
return TRUE;
}
return FALSE;
@ -165,7 +172,9 @@ static bool_t outint(SerialDriver *sdp) {
/*
* Input.
*/
chSysLockFromIsr();
n = sdRequestDataI(sdp);
chSysUnlockFromIsr();
if (n < 0)
return FALSE;
data[0] = (uint8_t)n;
@ -174,7 +183,9 @@ static bool_t outint(SerialDriver *sdp) {
case 0:
closesocket(sdp->com_data);
sdp->com_data = INVALID_SOCKET;
chSysLockFromIsr();
chIOAddFlagsI(sdp, IO_DISCONNECTED);
chSysUnlockFromIsr();
return FALSE;
case SOCKET_ERROR:
if (WSAGetLastError() == WSAEWOULDBLOCK)
@ -253,10 +264,17 @@ void sd_lld_stop(SerialDriver *sdp) {
}
bool_t sd_lld_interrupt_pending(void) {
bool_t b;
return connint(&SD1) || connint(&SD2) ||
CH_IRQ_PROLOGUE();
b = connint(&SD1) || connint(&SD2) ||
inint(&SD1) || inint(&SD2) ||
outint(&SD1) || outint(&SD2);
CH_IRQ_EPILOGUE();
return b;
}
#endif /* HAL_USE_SERIAL */

17
os/ports/GCC/SIMIA32/chcore.c
View File

@ -69,17 +69,16 @@ void port_halt(void) {
}
/**
* Threads return point, it just invokes @p chThdExit().
* @brief Start a thread by invoking its work function.
* @details If the work function returns @p chThdExit() is automatically
* invoked.
*/
void threadexit(void) {
__attribute__((cdecl, noreturn))
void _port_thread_start(msg_t (*pf)(void *), void *p) {
#if defined(WIN32) || defined (__APPLE__)
asm volatile ("push %eax \n\t" \
"call _chThdExit");
#else
asm volatile ("push %eax \n\t" \
"call chThdExit");
#endif
chSysUnlock();
chThdExit(pf(p));
while(1);
}
/** @} */

11
os/ports/GCC/SIMIA32/chcore.h
View File

@ -105,13 +105,11 @@ struct context {
*/
#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
uint8_t *esp = (uint8_t *)workspace + wsize; \
APUSH(esp, 0); \
APUSH(esp, 0); \
APUSH(esp, 0); \
APUSH(esp, arg); \
APUSH(esp, threadexit); \
APUSH(esp, pf); \
APUSH(esp, 0); \
esp -= sizeof(struct intctx); \
((struct intctx *)esp)->eip = pf; \
((struct intctx *)esp)->eip = _port_thread_start; \
((struct intctx *)esp)->ebx = 0; \
((struct intctx *)esp)->edi = 0; \
((struct intctx *)esp)->esi = 0; \
@ -224,7 +222,8 @@ extern "C" {
#endif
__attribute__((fastcall)) void port_switch(Thread *ntp, Thread *otp);
__attribute__((fastcall)) void port_halt(void);
void threadexit(void);
__attribute__((cdecl, noreturn)) void _port_thread_start(msg_t (*pf)(void *),
void *p);
void ChkIntSources(void);
#ifdef __cplusplus
}

2
testhal/LPC11xx/IRQ_STORM/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
testhal/LPC13xx/IRQ_STORM/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

2
testhal/STM8S/SPI/demo/halconf.h
View File

@ -38,7 +38,7 @@
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE
#define HAL_USE_TM FALSE
#endif
/**

8
todo.txt
View File

@ -8,11 +8,11 @@ N = Decided against.
Current Pipeline (2.3.x):
* I2C device driver class support and at least one implementation.
* Consistency check of all halconf.h files.
X STM32F2xx validation (so far done testing on STM32F4).
X Revision of the RTCv1 driver implementation.
* Consistency check of all STM32xx mcuconf.h files.
* Revision of the RTCv1 driver implementation.
* Fixing issue with Simulator and CH_DBG_SYSTEM_STATE_CHECK option.
X STM32F2 validation (so far done testing on STM32F4).
X Revision of the RTCv2 driver implementation.
- Consistency check of all STM32xx mcuconf.h files.
- Fixing issue with Simulator and CH_DBG_SYSTEM_STATE_CHECK option.
- SDC driver port to STM32F2 and STM32F4.
- CAN driver test on STM32F4.