git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1415 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -29,6 +29,11 @@
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#if CH_HAL_USE_PWM || defined(__DOXYGEN__)
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/** @brief PWM1 driver identifier.*/
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#if defined(USE_STM32_PWM1) || defined(__DOXYGEN__)
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PWMDriver PWMD1;
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#endif
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/*===========================================================================*/
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/* Low Level Driver exported variables. */
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/*===========================================================================*/
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@ -54,6 +59,15 @@
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*/
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void pwm_lld_init(void) {
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#if USE_STM32_PWM1
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/* TIM1 reset, ensures reset state in order to avoid trouble with JTAGs.*/
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RCC->APB2RSTR = RCC_APB2RSTR_TIM1RST;
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RCC->APB2RSTR = 0;
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/* Driver initialization.*/
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pwmObjectInit(&PWMD1);
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#endif
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}
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/**
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@ -65,6 +79,12 @@ void pwm_lld_start(PWMDriver *pwmp) {
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if (pwmp->pd_state == PWM_STOP) {
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/* Clock activation.*/
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#if USE_STM32_PWM1
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if (&PWMD1 == pwmp) {
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NVICEnableVector(TIM1_CC_IRQn, STM32_PWM1_IRQ_PRIORITY);
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RCC->APB2ENR |= RCC_APB2ENR_TIM1EN;
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}
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#endif
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}
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/* Configuration.*/
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}
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@ -76,6 +96,15 @@ void pwm_lld_start(PWMDriver *pwmp) {
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*/
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void pwm_lld_stop(PWMDriver *pwmp) {
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/* If in ready state then disables the PWM clock.*/
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if (pwmp->pd_state == PWM_READY) {
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#if USE_STM32_PWM1
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if (&PWMD1 == pwmp) {
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NVICDisableVector(TIM1_CC_IRQn);
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RCC->APB2ENR &= ~RCC_APB2ENR_TIM1EN;
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}
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#endif
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}
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}
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/**
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@ -105,6 +134,14 @@ bool_t pwm_lld_is_enabled(PWMDriver *pwmp, pwmchannel_t channel) {
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void pwm_lld_set_callback(PWMDriver *pwmp, pwmchannel_t channel,
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pwmedge_t edge, pwmcallback_t callback) {
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if (edge == PWM_NONE) {
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/* Callback disable.*/
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pwmp->pd_callbacks[channel] = NULL;
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}
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else {
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/* Callback enable.*/
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pwmp->pd_callbacks[channel] = callback;
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}
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}
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/**
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@ -33,15 +33,30 @@
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @brief Number of PWM channels per PWM driver.
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*/
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#define PWM_CHANNELS 4
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @brief Number of PWM channels per PWM driver.
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* @brief PWM1 driver enable switch.
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* @details If set to @p TRUE the support for PWM1 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(PWM_CHANNELS) || defined(__DOXYGEN__)
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#define PWM_CHANNELS 1
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#if !defined(USE_STM32_PWM1) || defined(__DOXYGEN__)
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#define USE_STM32_PWM1 TRUE
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#endif
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/**
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* @brief PWM1 interrupt priority level setting.
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* @note @p BASEPRI_KERNEL >= @p STM32_PWM1_IRQ_PRIORITY > @p PRIORITY_PENDSV.
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*/
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#if !defined(STM32_PWM1_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_PWM1_IRQ_PRIORITY 0x80
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#endif
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/*===========================================================================*/
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@ -79,12 +94,25 @@ typedef struct {
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*/
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const PWMConfig *pd_config;
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/* End of the mandatory fields.*/
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/**
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* @brief Bit mask of the enabled channels.
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*/
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uint32_t pd_enabled_channels;
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/**
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* @brief Callback pointers.
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*/
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pwmcallback_t pd_callbacks[PWM_CHANNELS];
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} PWMDriver;
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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/** @cond never*/
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#if defined(USE_STM32_PWM1)
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extern PWMDriver PWMD1;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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@ -101,6 +129,7 @@ extern "C" {
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#ifdef __cplusplus
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}
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#endif
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/** @endcond*/
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#endif /* CH_HAL_USE_PWM */
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