git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9552 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
Giovanni Di Sirio 2016-06-01 14:53:12 +00:00
parent 78f63bd88d
commit 5c0d7fa732
3 changed files with 66 additions and 15 deletions

View File

@ -210,6 +210,16 @@ static const uint8_t evconf_value[1] = {0x4F};
#endif
static const uint8_t flash_status[1] = {(M25Q_READ_DUMMY_CYCLES << 4U) | 0x0FU};
static const uint8_t flash_status_xip[1] = {(M25Q_READ_DUMMY_CYCLES << 4U) | 0x07U};
static const uint8_t flash_reset_xip_pattern[50] = {
0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11,
0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11,
0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11,
0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11,
0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11,
0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11,
0x11, 0x11
};
#endif /* M25Q_BUS_MODE != M25Q_BUS_MODE_SPI */
@ -497,12 +507,31 @@ static void flash_cmd_addr_dummy_receive(M25QDriver *devp,
QSPI_CFG_ADDR_SIZE_24 |
QSPI_CFG_DUMMY_CYCLES(dummy) |
QSPI_CFG_DATA_MODE_FOUR_LINES;
#endif
mode.addr = addr;
mode.alt = 0U;
qspiReceive(devp->config->qspip, &mode, n, p);
}
void flash_xip_reset(M25QDriver *devp) {
qspi_command_t cmd;
/* The only mode to generate an odd number of clock cycles is to write
data on 4 lines in DDR mode.*/
#if M25Q_BUS_MODE == M25Q_BUS_MODE_QSPI1L
cmd.cfg = QSPI_CFG_DUMMY_CYCLES(25);
#elif M25Q_BUS_MODE == M25Q_BUS_MODE_QSPI2L
cmd.cfg = QSPI_CFG_DUMMY_CYCLES(13);
#else
cmd.cfg = QSPI_CFG_CMD(0x11) |
QSPI_CFG_CMD_MODE_FOUR_LINES |
QSPI_CFG_DUMMY_CYCLES(8) |
QSPI_CFG_DATA_MODE_FOUR_LINES;
#endif
cmd.addr = 0U;
cmd.alt = 0U;
qspiSend(devp->config->qspip, &cmd, 2, flash_reset_xip_pattern);
}
#endif /* M25Q_BUS_MODE != M25Q_BUS_MODE_SPI */
static flash_error_t flash_poll_status(M25QDriver *devp) {
@ -882,17 +911,25 @@ void m25qStart(M25QDriver *devp, const M25QConfig *config) {
/* QSPI initialization.*/
qspiStart(devp->config->qspip, devp->config->qspicfg);
/* Reading device ID and unique ID.*/
/* Resetting XIP mode on entry.*/
flash_xip_reset(devp);
#if M25Q_SWITCH_WIDTH == TRUE
/* Attempting a device reset with different bus widths, commands
shorter than 8 bits are ignored.*/
qspiCommand(devp->config->qspip, &cmd_reset_enable_1);
qspiCommand(devp->config->qspip, &cmd_reset_memory_1);
qspiCommand(devp->config->qspip, &cmd_reset_enable_2);
qspiCommand(devp->config->qspip, &cmd_reset_memory_2);
/* If the device is in one bit mode then the following commands are
rejected because shorter than 8 bits. If the device is in multiple
bits mode then the comands are accepted and the device is reset to
one bit mode.*/
#if M25Q_BUS_MODE == M25Q_BUS_MODE_QSPI4L
qspiCommand(devp->config->qspip, &cmd_reset_enable_4);
qspiCommand(devp->config->qspip, &cmd_reset_memory_4);
#else
qspiCommand(devp->config->qspip, &cmd_reset_enable_2);
qspiCommand(devp->config->qspip, &cmd_reset_memory_2);
#endif
/* Now the device should be in one bit mode for sure and we perform a
device reset.*/
qspiCommand(devp->config->qspip, &cmd_reset_enable_1);
qspiCommand(devp->config->qspip, &cmd_reset_memory_1);
#endif
/* Reading device ID and unique ID.*/
@ -992,29 +1029,33 @@ void m25qStop(M25QDriver *devp) {
*
* @api
*/
void m25qMemoryMap(M25QDriver *devp, uint8_t ** addrp) {
void m25qMemoryMap(M25QDriver *devp, uint8_t **addrp) {
qspi_command_t cmd;
/* Activating XIP mode in the device.*/
flash_cmd(devp, M25Q_CMD_WRITE_ENABLE);
flash_cmd_send(devp, M25Q_CMD_WRITE_V_CONF_REGISTER,
1, flash_status_xip);
/* Putting the QSPI driver in memory mapped mode.*/
cmd.cfg = QSPI_CFG_CMD(M25Q_CMD_FAST_READ) |
QSPI_CFG_ADDR_SIZE_24 |
#if M25Q_BUS_MODE == M25Q_BUS_MODE_QSPI1L
QSPI_CFG_CMD_MODE_ONE_LINE |
QSPI_CFG_ADDR_MODE_ONE_LINE |
QSPI_CFG_ALT_MODE_ONE_LINE |
QSPI_CFG_DATA_MODE_ONE_LINE |
#elif M25Q_BUS_MODE == M25Q_BUS_MODE_QSPI2L
QSPI_CFG_CMD_MODE_TWO_LINES |
QSPI_CFG_ADDR_MODE_TWO_LINES |
QSPI_CFG_ALT_MODE_TWO_LINES |
QSPI_CFG_DATA_MODE_TWO_LINES |
#else
QSPI_CFG_CMD_MODE_FOUR_LINES |
QSPI_CFG_ADDR_MODE_FOUR_LINES |
QSPI_CFG_ALT_MODE_FOUR_LINES |
QSPI_CFG_DATA_MODE_FOUR_LINES |
#endif
QSPI_CFG_ALT_MODE_FOUR_LINES | /* Always 4 lines, note.*/
QSPI_CFG_SIOO |
QSPI_CFG_DUMMY_CYCLES(M25Q_READ_DUMMY_CYCLES);
QSPI_CFG_DUMMY_CYCLES(M25Q_READ_DUMMY_CYCLES - 2);
qspiMapFlash(devp->config->qspip, &cmd, addrp);
}
@ -1029,6 +1070,9 @@ void m25qMemoryMap(M25QDriver *devp, uint8_t ** addrp) {
void m25qMemoryUnmap(M25QDriver *devp) {
qspiUnmapFlash(devp->config->qspip);
/* Resetting XIP mode.*/
flash_xip_reset(devp);
}
#endif /* QSPI_SUPPORTS_MEMMAP == TRUE */
#endif /* M25Q_BUS_MODE != M25Q_BUS_MODE_SPI */

File diff suppressed because one or more lines are too long

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@ -79,6 +79,7 @@ static THD_FUNCTION(Thread1, arg) {
*/
int main(void) {
flash_error_t err;
uint8_t *addr;
/*
* System initializations.
@ -127,6 +128,12 @@ int main(void) {
if (err != FLASH_ERROR_VERIFY)
chSysHalt("verify non-erase error");
/* Memory mapping the device.*/
m25qMemoryMap(&m25q, &addr);
/* Unmapping the device.*/
m25qMemoryUnmap(&m25q);
/* Reading it back.*/
err = flashRead(&m25q, 0, buffer, 128);
if (err != FLASH_NO_ERROR)