Add STM32F412/F413 EFL driver support.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13119 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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/*
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ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file hal_efl_lld.c
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* @brief STM32F412/413 Embedded Flash subsystem low level driver source.
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*
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* @addtogroup HAL_EFL
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* @{
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*/
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#include <string.h>
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#include "hal.h"
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#if (HAL_USE_EFL == TRUE) || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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#define STM32_FLASH_LINE_SIZE (1 << STM32_FLASH_PSIZE)
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#define STM32_FLASH_LINE_MASK (STM32_FLASH_LINE_SIZE - 1U)
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#define FLASH_PDKEY1 0x04152637U
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#define FLASH_PDKEY2 0xFAFBFCFDU
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#define FLASH_KEY1 0x45670123U
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#define FLASH_KEY2 0xCDEF89ABU
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#define FLASH_OPTKEY1 0x08192A3BU
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#define FLASH_OPTKEY2 0x4C5D6E7FU
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/**
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* @brief EFL1 driver identifier.
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*/
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EFlashDriver EFLD1;
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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#if defined(STM32F413xx) || defined(STM32F412xx) || defined(__DOXYGEN__)
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/* Sector table for 1.5M device. */
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static const flash_sector_descriptor_t efl_lld_sect1[STM32_FLASH1_SECTORS_TOTAL] = {
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{ 0, 16134}, /* Sector 0. */
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{ 1 * 16134, 16134}, /* Sector 1. */
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{ 2 * 16134, 16134}, /* Sector 2. */
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{ 3 * 16134, 16134}, /* Sector 3. */
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{ 4 * 16134, 65536}, /* Sector 4. */
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{ 4 * 16134 + 65536, 131072}, /* Sector 5. */
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{ 4 * 16134 + 65536 + 1 * 131072, 131072}, /* Sector 6. */
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{ 4 * 16134 + 65536 + 2 * 131072, 131072}, /* Sector 7. */
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{ 4 * 16134 + 65536 + 3 * 131072, 131072}, /* Sector 8. */
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{ 4 * 16134 + 65536 + 4 * 131072, 131072}, /* Sector 9. */
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{ 4 * 16134 + 65536 + 5 * 131072, 131072}, /* Sector 10. */
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{ 4 * 16134 + 65536 + 6 * 131072, 131072}, /* Sector 11. */
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{ 4 * 16134 + 65536 + 7 * 131072, 131072}, /* Sector 12. */
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{ 4 * 16134 + 65536 + 8 * 131072, 131072}, /* Sector 13. */
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{ 4 * 16134 + 65536 + 9 * 131072, 131072}, /* Sector 14. */
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{ 4 * 16134 + 65536 + 10 * 131072, 131072} /* Sector 15. */
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};
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/* Sector table for 1M device. */
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static const flash_sector_descriptor_t efl_lld_sect2[STM32_FLASH2_SECTORS_TOTAL] = {
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{ 0, 16134}, /* Sector 0. */
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{ 1 * 16134, 16134}, /* Sector 1. */
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{ 2 * 16134, 16134}, /* Sector 2. */
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{ 3 * 16134, 16134}, /* Sector 3. */
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{ 4 * 16134, 65536}, /* Sector 4. */
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{ 4 * 16134 + 65536, 131072}, /* Sector 5. */
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{ 4 * 16134 + 65536 + 1 * 131072, 131072}, /* Sector 6. */
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{ 4 * 16134 + 65536 + 2 * 131072, 131072}, /* Sector 7. */
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{ 4 * 16134 + 65536 + 3 * 131072, 131072}, /* Sector 8. */
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{ 4 * 16134 + 65536 + 4 * 131072, 131072}, /* Sector 9. */
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{ 4 * 16134 + 65536 + 5 * 131072, 131072}, /* Sector 10. */
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{ 4 * 16134 + 65536 + 6 * 131072, 131072} /* Sector 11. */
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};
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/* The descriptors for 1.5M device. */
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static const flash_descriptor_t efl_lld_size1[STM32_FLASH_NUMBER_OF_BANKS] = {
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{ /* Single bank organisation. */
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.attributes = FLASH_ATTR_ERASED_IS_ONE |
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FLASH_ATTR_MEMORY_MAPPED,
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.page_size = STM32_FLASH_LINE_SIZE,
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.sectors_count = STM32_FLASH1_SECTORS_TOTAL,
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.sectors = efl_lld_sect1,
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.sectors_size = 0,
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.address = (uint8_t *)FLASH_BASE,
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.size = STM32_FLASH1_SIZE * STM32_FLASH_SIZE_SCALE
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}
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};
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/* The descriptors for 1M device. */
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static const flash_descriptor_t efl_lld_size2[STM32_FLASH_NUMBER_OF_BANKS] = {
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{ /* Single bank organisation. */
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.attributes = FLASH_ATTR_ERASED_IS_ONE |
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FLASH_ATTR_MEMORY_MAPPED,
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.page_size = STM32_FLASH_LINE_SIZE,
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.sectors_count = STM32_FLASH2_SECTORS_TOTAL,
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.sectors = efl_lld_sect2,
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.sectors_size = 0,
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.address = (uint8_t *)FLASH_BASE,
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.size = STM32_FLASH2_SIZE * STM32_FLASH_SIZE_SCALE
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}
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};
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/* Table describing possible flash sizes and descriptors for this device. */
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static const efl_lld_size_t efl_lld_flash_sizes[] = {
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{
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.desc = efl_lld_size1
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},
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{
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.desc = efl_lld_size2
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}
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};
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#else
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#error "This EFL driver does not support the selected device"
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#endif
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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static inline void stm32_flash_lock(EFlashDriver *eflp) {
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eflp->flash->CR |= FLASH_CR_LOCK;
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}
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static inline void stm32_flash_unlock(EFlashDriver *eflp) {
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eflp->flash->KEYR |= FLASH_KEY1;
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eflp->flash->KEYR |= FLASH_KEY2;
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}
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static inline void stm32_flash_enable_pgm(EFlashDriver *eflp) {
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/* Set parallelism. */
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eflp->flash->CR &= ~FLASH_CR_PSIZE;
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eflp->flash->CR |= STM32_FLASH_PSIZE << FLASH_CR_PSIZE_Pos;
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/* Enable programming. */
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eflp->flash->CR |= FLASH_CR_PG;
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}
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static inline void stm32_flash_disable_pgm(EFlashDriver *eflp) {
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eflp->flash->CR &= ~FLASH_CR_PG;
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}
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static inline void stm32_flash_clear_status(EFlashDriver *eflp) {
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eflp->flash->SR = 0x0000FFFFU;
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}
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static inline void stm32_flash_wait_busy(EFlashDriver *eflp) {
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/* Wait for busy bit clear.*/
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while ((eflp->flash->SR & FLASH_SR_BSY) != 0U) {
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}
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}
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static inline size_t stm32_flash_get_size(void) {
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return *(uint16_t*)((uint32_t) STM32_FLASH_SIZE_REGISTER) * STM32_FLASH_SIZE_SCALE;
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}
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static inline bool stm32_flash_dual_bank(EFlashDriver *eflp) {
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#if STM32_FLASH_NUMBER_OF_BANKS > 1
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return ((eflp->flash->OPTCR & FLASH_OPTCR_DB1M) != 0U);
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#endif
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(void)eflp;
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return false;
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}
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static inline flash_error_t stm32_flash_check_errors(EFlashDriver *eflp) {
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uint32_t sr = eflp->flash->SR;
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/* Clearing error conditions.*/
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eflp->flash->SR = sr & 0x0000FFFFU;
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/* Some errors are only caught by assertion.*/
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osalDbgAssert((sr & 0) == 0U, "unexpected flash error");
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/* Decoding relevant errors.*/
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if ((sr & FLASH_SR_WRPERR) != 0U) {
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return FLASH_ERROR_HW_FAILURE;
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}
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if ((sr & (FLASH_SR_PGAERR | FLASH_SR_PGPERR | FLASH_SR_OPERR)) != 0U) {
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return eflp->state == FLASH_PGM ? FLASH_ERROR_PROGRAM : FLASH_ERROR_ERASE;
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}
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return FLASH_NO_ERROR;
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}
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level Embedded Flash driver initialization.
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*
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* @notapi
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*/
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void efl_lld_init(void) {
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/* Driver initialization.*/
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eflObjectInit(&EFLD1);
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EFLD1.flash = FLASH;
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/* Find the size of the flash and set descriptor reference. */
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uint8_t i;
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for (i = 0; i < (sizeof(efl_lld_flash_sizes) / sizeof(efl_lld_size_t)); i++) {
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if (efl_lld_flash_sizes[i].desc->size == stm32_flash_get_size()) {
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EFLD1.descriptor = efl_lld_flash_sizes[i].desc;
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if (stm32_flash_dual_bank(&EFLD1)) {
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/* Point to the dual bank descriptor. */
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EFLD1.descriptor++;
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}
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return;
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}
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}
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osalDbgAssert(false, "invalid flash configuration");
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}
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/**
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* @brief Configures and activates the Embedded Flash peripheral.
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*
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* @param[in] eflp pointer to a @p EFlashDriver structure
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*
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* @notapi
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*/
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void efl_lld_start(EFlashDriver *eflp) {
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stm32_flash_unlock(eflp);
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FLASH->CR = 0x00000000U;
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}
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/**
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* @brief Deactivates the Embedded Flash peripheral.
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*
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* @param[in] eflp pointer to a @p EFlashDriver structure
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*
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* @notapi
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*/
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void efl_lld_stop(EFlashDriver *eflp) {
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stm32_flash_lock(eflp);
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}
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/**
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* @brief Gets the flash descriptor structure.
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*
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* @param[in] ip pointer to a @p EFlashDriver instance
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* @return A flash device descriptor.
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* @retval Pointer to single bank if DBM not enabled.
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* @retval Pointer to bank1 if DBM enabled.
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*
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* @notapi
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*/
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const flash_descriptor_t *efl_lld_get_descriptor(void *instance) {
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EFlashDriver *devp = (EFlashDriver *)instance;
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return devp->descriptor;
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}
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/**
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* @brief Read operation.
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*
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* @param[in] ip pointer to a @p EFlashDriver instance
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* @param[in] offset offset within full flash address space
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* @param[in] n number of bytes to be read
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* @param[out] rp pointer to the data buffer
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* @return An error code.
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* @retval FLASH_NO_ERROR if there is no erase operation in progress.
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* @retval FLASH_BUSY_ERASING if there is an erase operation in progress.
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* @retval FLASH_ERROR_READ if the read operation failed.
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* @retval FLASH_ERROR_HW_FAILURE if access to the memory failed.
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*
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* @notapi
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*/
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flash_error_t efl_lld_read(void *instance, flash_offset_t offset,
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size_t n, uint8_t *rp) {
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EFlashDriver *devp = (EFlashDriver *)instance;
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flash_error_t err = FLASH_NO_ERROR;
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osalDbgCheck((instance != NULL) && (rp != NULL) && (n > 0U));
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const flash_descriptor_t *bank = efl_lld_get_descriptor(instance);
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osalDbgCheck((size_t)offset + n <= (size_t)bank->size);
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osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE),
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"invalid state");
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/* No reading while erasing.*/
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if (devp->state == FLASH_ERASE) {
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return FLASH_BUSY_ERASING;
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}
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/* FLASH_READ state while the operation is performed.*/
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devp->state = FLASH_READ;
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/* Clearing error status bits.*/
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stm32_flash_clear_status(devp);
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/* Actual read implementation.*/
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memcpy((void *)rp, (const void *)efl_lld_get_descriptor(instance)->address
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+ offset, n);
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/* Checking for errors after reading.*/
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if ((devp->flash->SR & FLASH_SR_RDERR) != 0U) {
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err = FLASH_ERROR_READ;
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}
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/* Ready state again.*/
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devp->state = FLASH_READY;
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return err;
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}
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/**
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* @brief Program operation.
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* @note Successive write operations are possible without the need of
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* an erase when changing bits from one to zero. Writing one requires
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* an erase operation.
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*
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* @param[in] ip pointer to a @p EFlashDriver instance
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* @param[in] offset offset within full flash address space
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* @param[in] n number of bytes to be programmed
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* @param[in] pp pointer to the data buffer
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* @return An error code.
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* @retval FLASH_NO_ERROR if there is no erase operation in progress.
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* @retval FLASH_BUSY_ERASING if there is an erase operation in progress.
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* @retval FLASH_ERROR_PROGRAM if the program operation failed.
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* @retval FLASH_ERROR_HW_FAILURE if access to the memory failed.
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*
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* @notapi
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*/
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flash_error_t efl_lld_program(void *instance, flash_offset_t offset,
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size_t n, const uint8_t *pp) {
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EFlashDriver *devp = (EFlashDriver *)instance;
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const flash_descriptor_t *bank = efl_lld_get_descriptor(instance);
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flash_error_t err = FLASH_NO_ERROR;
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osalDbgCheck((instance != NULL) && (pp != NULL) && (n > 0U));
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osalDbgCheck((size_t)offset + n <= (size_t)bank->size);
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osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE),
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"invalid state");
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/* No programming while erasing.*/
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if (devp->state == FLASH_ERASE) {
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return FLASH_BUSY_ERASING;
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}
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/* FLASH_PGM state while the operation is performed.*/
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devp->state = FLASH_PGM;
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/* Clearing error status bits.*/
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stm32_flash_clear_status(devp);
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/* Enabling PGM mode in the controller.*/
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stm32_flash_enable_pgm(devp);
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/* Actual program implementation.*/
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while (n > 0U) {
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volatile uint32_t *address;
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/* Create an array of sufficient size to hold line(s). */
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union {
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uint32_t w[STM32_FLASH_LINE_SIZE / sizeof(uint32_t)];
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uint16_t h[STM32_FLASH_LINE_SIZE / sizeof(uint16_t)];
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uint8_t b[STM32_FLASH_LINE_SIZE / sizeof(uint8_t)];
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} line;
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/* Unwritten bytes are initialized to all ones.*/
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uint8_t i;
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for (i = 0; i < bank->page_size; i++) {
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line.b[i] = 0xFF;
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}
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/* Programming address aligned to flash lines.*/
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address = (volatile uint32_t *)(bank->address +
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(offset & ~STM32_FLASH_LINE_MASK));
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/* Copying data inside the prepared line(s).*/
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do {
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line.b[offset & STM32_FLASH_LINE_MASK] = *pp;
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offset++;
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n--;
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pp++;
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}
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while ((n > 0U) & ((offset & STM32_FLASH_LINE_MASK) != 0U));
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/* Programming line according to parallelism.*/
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switch (STM32_FLASH_LINE_SIZE) {
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case 1:
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address[0] = line.b[0];
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break;
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case 2:
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address[0] = line.h[0];
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break;
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case 4:
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address[0] = line.w[0];
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break;
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case 8:
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address[0] = line.w[0];
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address[1] = line.w[1];
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break;
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default:
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osalDbgAssert(false, "invalid line size");
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break;
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}
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stm32_flash_wait_busy(devp);
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err = stm32_flash_check_errors(devp);
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if (err != FLASH_NO_ERROR) {
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break;
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}
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}
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/* Disabling PGM mode in the controller.*/
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stm32_flash_disable_pgm(devp);
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/* Ready state again.*/
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devp->state = FLASH_READY;
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return err;
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}
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/**
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* @brief Starts a whole-device erase operation.
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* @note This function only erases bank 2 if it is present. Bank 1 is not
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* allowed since it is normally where the primary program is located.
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* Sectors on bank 1 can be individually erased.
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*
|
||||
* @param[in] ip pointer to a @p EFlashDriver instance
|
||||
* @return An error code.
|
||||
* @retval FLASH_NO_ERROR if there is no erase operation in progress.
|
||||
* @retval FLASH_BUSY_ERASING if there is an erase operation in progress.
|
||||
* @retval FLASH_ERROR_HW_FAILURE if access to the memory failed.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
flash_error_t efl_lld_start_erase_all(void *instance) {
|
||||
EFlashDriver *devp = (EFlashDriver *)instance;
|
||||
|
||||
osalDbgCheck(instance != NULL);
|
||||
osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE),
|
||||
"invalid state");
|
||||
|
||||
/* No erasing while erasing.*/
|
||||
if (devp->state == FLASH_ERASE) {
|
||||
return FLASH_BUSY_ERASING;
|
||||
}
|
||||
|
||||
#if defined(FLASH_CR_MER1)
|
||||
/* If dual bank is active then mass erase bank2. */
|
||||
if (stm32_flash_dual_bank(devp)) {
|
||||
|
||||
/* FLASH_ERASE state while the operation is performed.*/
|
||||
devp->state = FLASH_ERASE;
|
||||
|
||||
/* Clearing error status bits.*/
|
||||
stm32_flash_clear_status(devp);
|
||||
|
||||
devp->flash->CR |= FLASH_CR_MER1;
|
||||
devp->flash->CR |= FLASH_CR_STRT;
|
||||
return FLASH_NO_ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Mass erase not allowed. */
|
||||
return FLASH_ERROR_UNIMPLEMENTED;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Starts an sector erase operation.
|
||||
*
|
||||
* @param[in] ip pointer to a @p EFlashDriver instance
|
||||
* @param[in] sector sector to be erased
|
||||
* this is an index within the total sectors
|
||||
* in a flash bank
|
||||
* @return An error code.
|
||||
* @retval FLASH_NO_ERROR if there is no erase operation in progress.
|
||||
* @retval FLASH_BUSY_ERASING if there is an erase operation in progress.
|
||||
* @retval FLASH_ERROR_HW_FAILURE if access to the memory failed.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
flash_error_t efl_lld_start_erase_sector(void *instance,
|
||||
flash_sector_t sector) {
|
||||
EFlashDriver *devp = (EFlashDriver *)instance;
|
||||
const flash_descriptor_t *bank = efl_lld_get_descriptor(instance);
|
||||
osalDbgCheck(instance != NULL);
|
||||
osalDbgCheck(sector < bank->sectors_count);
|
||||
osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE),
|
||||
"invalid state");
|
||||
|
||||
/* No erasing while erasing.*/
|
||||
if (devp->state == FLASH_ERASE) {
|
||||
return FLASH_BUSY_ERASING;
|
||||
}
|
||||
|
||||
/* FLASH_PGM state while the operation is performed.*/
|
||||
devp->state = FLASH_ERASE;
|
||||
|
||||
/* Clearing error status bits.*/
|
||||
stm32_flash_clear_status(devp);
|
||||
|
||||
/* Enable sector erase.*/
|
||||
devp->flash->CR |= FLASH_CR_SER;
|
||||
|
||||
/* Mask off the sector and parallelism selection bits.*/
|
||||
devp->flash->CR &= ~FLASH_CR_SNB;
|
||||
devp->flash->CR &= ~FLASH_CR_PSIZE;
|
||||
|
||||
/* Set sector and parallelism. */
|
||||
devp->flash->CR |= (sector << FLASH_CR_SNB_Pos) |
|
||||
(STM32_FLASH_PSIZE << FLASH_CR_PSIZE_Pos);
|
||||
|
||||
/* Start the erase.*/
|
||||
devp->flash->CR |= FLASH_CR_STRT;
|
||||
|
||||
return FLASH_NO_ERROR;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Queries the driver for erase operation progress.
|
||||
*
|
||||
* @param[in] instance pointer to a @p EFlashDriver instance
|
||||
* @param[out] msec recommended time, in milliseconds, that
|
||||
* should be spent before calling this
|
||||
* function again, can be @p NULL
|
||||
* @return An error code.
|
||||
* @retval FLASH_NO_ERROR if there is no erase operation in progress.
|
||||
* @retval FLASH_BUSY_ERASING if there is an erase operation in progress.
|
||||
* @retval FLASH_ERROR_ERASE if the erase operation failed.
|
||||
* @retval FLASH_ERROR_HW_FAILURE if access to the memory failed.
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
flash_error_t efl_lld_query_erase(void *instance, uint32_t *msec) {
|
||||
EFlashDriver *devp = (EFlashDriver *)instance;
|
||||
flash_error_t err;
|
||||
|
||||
/* If there is an erase in progress then the device must be checked.*/
|
||||
if (devp->state == FLASH_ERASE) {
|
||||
|
||||
/* Checking for operation in progress.*/
|
||||
if ((devp->flash->SR & FLASH_SR_BSY) == 0U) {
|
||||
|
||||
/* Disabling the various erase control bits.*/
|
||||
devp->flash->CR &= ~(FLASH_CR_MER |
|
||||
#if defined(FLASH_CR_MER1)
|
||||
FLASH_CR_MER1 |
|
||||
#endif
|
||||
FLASH_CR_SER);
|
||||
|
||||
/* No operation in progress, checking for errors.*/
|
||||
err = stm32_flash_check_errors(devp);
|
||||
|
||||
/* Back to ready state.*/
|
||||
devp->state = FLASH_READY;
|
||||
}
|
||||
else {
|
||||
/* Recommended time before polling again. This is a simplified
|
||||
implementation.*/
|
||||
if (msec != NULL) {
|
||||
*msec = (uint32_t)STM32_FLASH_WAIT_TIME_MS;
|
||||
}
|
||||
|
||||
err = FLASH_BUSY_ERASING;
|
||||
}
|
||||
}
|
||||
else {
|
||||
err = FLASH_NO_ERROR;
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the erase state of a sector.
|
||||
*
|
||||
* @param[in] ip pointer to a @p EFlashDriver instance
|
||||
* @param[in] sector sector to be verified
|
||||
* @return An error code.
|
||||
* @retval FLASH_NO_ERROR if the sector is erased.
|
||||
* @retval FLASH_BUSY_ERASING if there is an erase operation in progress.
|
||||
* @retval FLASH_ERROR_VERIFY if the verify operation failed.
|
||||
* @retval FLASH_ERROR_HW_FAILURE if access to the memory failed.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
flash_error_t efl_lld_verify_erase(void *instance, flash_sector_t sector) {
|
||||
EFlashDriver *devp = (EFlashDriver *)instance;
|
||||
uint32_t *address;
|
||||
const flash_descriptor_t *bank = efl_lld_get_descriptor(instance);
|
||||
flash_error_t err = FLASH_NO_ERROR;
|
||||
unsigned i;
|
||||
|
||||
osalDbgCheck(instance != NULL);
|
||||
osalDbgCheck(sector < bank->sectors_count);
|
||||
osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE),
|
||||
"invalid state");
|
||||
|
||||
/* No verifying while erasing.*/
|
||||
if (devp->state == FLASH_ERASE) {
|
||||
return FLASH_BUSY_ERASING;
|
||||
}
|
||||
|
||||
/* Address of the sector in the bank.*/
|
||||
address = (uint32_t *)(bank->address +
|
||||
flashGetSectorOffset(getBaseFlash(devp), sector));
|
||||
|
||||
/* FLASH_READ state while the operation is performed.*/
|
||||
devp->state = FLASH_READ;
|
||||
|
||||
/* Scanning the sector space.*/
|
||||
uint32_t sector_size = flashGetSectorSize(getBaseFlash(devp), sector);
|
||||
for (i = 0U; i < sector_size / sizeof(uint32_t); i++) {
|
||||
if (*address != 0xFFFFFFFFU) {
|
||||
err = FLASH_ERROR_VERIFY;
|
||||
break;
|
||||
}
|
||||
address++;
|
||||
}
|
||||
|
||||
/* Ready state again.*/
|
||||
devp->state = FLASH_READY;
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
#endif /* HAL_USE_EFL == TRUE */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,133 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file hal_efl_lld.h
|
||||
* @brief STM32F412/413 Embedded Flash subsystem low level driver header.
|
||||
*
|
||||
* @addtogroup HAL_EFL
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef HAL_EFL_LLD_H
|
||||
#define HAL_EFL_LLD_H
|
||||
|
||||
#if (HAL_USE_EFL == TRUE) || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name STM32F412/413 EFL driver configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Suggested wait time during erase operations polling.
|
||||
*/
|
||||
#if !defined(STM32_FLASH_WAIT_TIME_MS) || defined(__DOXYGEN__)
|
||||
#define STM32_FLASH_WAIT_TIME_MS 5
|
||||
#endif
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if defined(STM32F413xx) || defined(STM32F412xx) || defined(__DOXYGEN__)
|
||||
|
||||
/* Flash size register. */
|
||||
#define STM32_FLASH_SIZE_REGISTER 0x1FFF7A22
|
||||
#define STM32_FLASH_SIZE_SCALE 1024U
|
||||
|
||||
/*
|
||||
* Device flash size...
|
||||
*
|
||||
*/
|
||||
#define STM32_FLASH_NUMBER_OF_BANKS 1
|
||||
#define STM32_FLASH1_SIZE 1536U
|
||||
#define STM32_FLASH2_SIZE 1024U
|
||||
#define STM32_FLASH1_SECTORS_TOTAL 16
|
||||
#define STM32_FLASH2_SECTORS_TOTAL 12
|
||||
#else
|
||||
#error "This EFL driver does not support the selected device"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* A flash size declaration. */
|
||||
typedef struct {
|
||||
const flash_descriptor_t* desc;
|
||||
} efl_lld_size_t;
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level fields of the embedded flash driver structure.
|
||||
*/
|
||||
#define efl_lld_driver_fields \
|
||||
/* Flash registers.*/ \
|
||||
FLASH_TypeDef *flash; \
|
||||
const flash_descriptor_t *descriptor;
|
||||
|
||||
/**
|
||||
* @brief Low level fields of the embedded flash configuration structure.
|
||||
*/
|
||||
#define efl_lld_config_fields \
|
||||
/* Dummy configuration, it is not needed.*/ \
|
||||
uint32_t dummy
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern EFlashDriver EFLD1;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void efl_lld_init(void);
|
||||
void efl_lld_start(EFlashDriver *eflp);
|
||||
void efl_lld_stop(EFlashDriver *eflp);
|
||||
const flash_descriptor_t *efl_lld_get_descriptor(void *instance);
|
||||
flash_error_t efl_lld_read(void *instance, flash_offset_t offset,
|
||||
size_t n, uint8_t *rp);
|
||||
flash_error_t efl_lld_program(void *instance, flash_offset_t offset,
|
||||
size_t n, const uint8_t *pp);
|
||||
flash_error_t efl_lld_start_erase_all(void *instance);
|
||||
flash_error_t efl_lld_start_erase_sector(void *instance,
|
||||
flash_sector_t sector);
|
||||
flash_error_t efl_lld_query_erase(void *instance, uint32_t *wait_time);
|
||||
flash_error_t efl_lld_verify_erase(void *instance, flash_sector_t sector);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_EFL == TRUE */
|
||||
|
||||
#endif /* HAL_EFL_LLD_H */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -1,7 +1,8 @@
|
|||
# Required platform files.
|
||||
PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
|
||||
$(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/stm32_isr.c \
|
||||
$(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/hal_lld.c
|
||||
$(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/hal_lld.c \
|
||||
$(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/hal_efl_lld.c
|
||||
|
||||
# Required include directories.
|
||||
PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \
|
||||
|
|
|
|||
Loading…
Reference in New Issue