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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6489 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2013-11-18 15:09:25 +00:00
parent 7c1b187f5b
commit 5d284d0f61
1 changed files with 4 additions and 22 deletions
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26
os/hal/platforms/SPC5xx/ADC_v1/adc_lld.c
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@ -195,7 +195,6 @@ static void adc_lld_serve_interrupt(ADCDriver *adcp, uint32_t isr) {
#if !defined(SPC5_ADC0_WD_HANDLER) #if !defined(SPC5_ADC0_WD_HANDLER)
#error "SPC5_ADC0_WD_HANDLER not defined" #error "SPC5_ADC0_WD_HANDLER not defined"
#endif #endif
/** /**
* @brief ADC0 Watch Dog interrupt handler. * @brief ADC0 Watch Dog interrupt handler.
* @note It is assumed that the various sources are only activated if the * @note It is assumed that the various sources are only activated if the
@ -304,42 +303,25 @@ void adc_lld_start(ADCDriver *adcp) {
#if SPC5_ADC_USE_ADC0 #if SPC5_ADC_USE_ADC0
if (&ADCD1 == adcp) { if (&ADCD1 == adcp) {
adcp->adc_dma_channel = edmaChannelAllocate(&adc_adc0_dma_config); adcp->adc_dma_channel = edmaChannelAllocate(&adc_adc0_dma_config);
halSPCSetPeripheralClockMode(SPC5_ADC0_PCTL,
SPC5_ADC_ADC0_START_PCTL);
} }
#endif /* SPC5_ADC_USE_ADC0 */ #endif /* SPC5_ADC_USE_ADC0 */
#if SPC5_ADC_USE_ADC1 #if SPC5_ADC_USE_ADC1
if (&ADCD2 == adcp) { if (&ADCD2 == adcp) {
adcp->adc_dma_channel = edmaChannelAllocate(&adc_adc1_dma_config); adcp->adc_dma_channel = edmaChannelAllocate(&adc_adc1_dma_config);
halSPCSetPeripheralClockMode(SPC5_ADC1_PCTL,
SPC5_ADC_ADC1_START_PCTL);
} }
#endif /* SPC5_ADC_USE_ADC1 */ #endif /* SPC5_ADC_USE_ADC1 */
osalDbgAssert((adcp->adc_dma_channel != EDMA_ERROR), osalDbgAssert((adcp->adc_dma_channel != EDMA_ERROR),
"adc_lld_start(), #1", "DMA channel cannot be allocated"); "adc_lld_start(), #1", "DMA channel cannot be allocated");
/* Configures the peripheral.*/
/* Sets ADC0 Clock.*/
#if SPC5_ADC_USE_ADC0
if (&ADCD1 == adcp) {
halSPCSetPeripheralClockMode(SPC5_ADC0_PCTL,
SPC5_ADC_ADC0_START_PCTL);
}
#endif
/* Sets ADC1 Clock.*/
#if SPC5_ADC_USE_ADC1
if (&ADCD2 == adcp) {
halSPCSetPeripheralClockMode(SPC5_ADC1_PCTL,
SPC5_ADC_ADC1_START_PCTL);
}
#endif
/* Sets ADC Normal Mode.*/ /* Sets ADC Normal Mode.*/
adcp->adc_tagp->MCR.B.PWDN = 0; adcp->adc_tagp->MCR.B.PWDN = 0;
/* Power up delay.*/
osalThreadSleep(US2ST(5));
/* Sets MCR Register.*/ /* Sets MCR Register.*/
adcp->adc_tagp->MCR.R = ADC_MCR_OWREN | ADC_MCR_MODE; adcp->adc_tagp->MCR.R = ADC_MCR_OWREN | ADC_MCR_MODE;
} }