git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6489 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -195,7 +195,6 @@ static void adc_lld_serve_interrupt(ADCDriver *adcp, uint32_t isr) {
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#if !defined(SPC5_ADC0_WD_HANDLER)
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#error "SPC5_ADC0_WD_HANDLER not defined"
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#endif
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/**
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* @brief ADC0 Watch Dog interrupt handler.
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* @note It is assumed that the various sources are only activated if the
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@ -304,42 +303,25 @@ void adc_lld_start(ADCDriver *adcp) {
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#if SPC5_ADC_USE_ADC0
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if (&ADCD1 == adcp) {
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adcp->adc_dma_channel = edmaChannelAllocate(&adc_adc0_dma_config);
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halSPCSetPeripheralClockMode(SPC5_ADC0_PCTL,
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SPC5_ADC_ADC0_START_PCTL);
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}
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#endif /* SPC5_ADC_USE_ADC0 */
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#if SPC5_ADC_USE_ADC1
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if (&ADCD2 == adcp) {
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adcp->adc_dma_channel = edmaChannelAllocate(&adc_adc1_dma_config);
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halSPCSetPeripheralClockMode(SPC5_ADC1_PCTL,
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SPC5_ADC_ADC1_START_PCTL);
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}
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#endif /* SPC5_ADC_USE_ADC1 */
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osalDbgAssert((adcp->adc_dma_channel != EDMA_ERROR),
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"adc_lld_start(), #1", "DMA channel cannot be allocated");
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/* Configures the peripheral.*/
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/* Sets ADC0 Clock.*/
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#if SPC5_ADC_USE_ADC0
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if (&ADCD1 == adcp) {
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halSPCSetPeripheralClockMode(SPC5_ADC0_PCTL,
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SPC5_ADC_ADC0_START_PCTL);
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}
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#endif
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/* Sets ADC1 Clock.*/
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#if SPC5_ADC_USE_ADC1
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if (&ADCD2 == adcp) {
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halSPCSetPeripheralClockMode(SPC5_ADC1_PCTL,
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SPC5_ADC_ADC1_START_PCTL);
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}
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#endif
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/* Sets ADC Normal Mode.*/
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adcp->adc_tagp->MCR.B.PWDN = 0;
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/* Power up delay.*/
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osalThreadSleep(US2ST(5));
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/* Sets MCR Register.*/
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adcp->adc_tagp->MCR.R = ADC_MCR_OWREN | ADC_MCR_MODE;
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}
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