Mass update.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13395 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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@ -184,6 +184,9 @@
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#define STM32_IRQ_EXTI19_PRIORITY 6
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#define STM32_IRQ_EXTI19_PRIORITY 6
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#define STM32_IRQ_EXTI20_21_PRIORITY 6
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#define STM32_IRQ_EXTI20_21_PRIORITY 6
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_EXTI19_PRIORITY 6
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#define STM32_IRQ_EXTI19_PRIORITY 6
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#define STM32_IRQ_EXTI20_21_PRIORITY 6
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#define STM32_IRQ_EXTI20_21_PRIORITY 6
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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@ -184,6 +184,9 @@
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#define STM32_IRQ_EXTI19_PRIORITY 6
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#define STM32_IRQ_EXTI19_PRIORITY 6
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#define STM32_IRQ_EXTI20_21_PRIORITY 6
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#define STM32_IRQ_EXTI20_21_PRIORITY 6
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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@ -184,6 +184,9 @@
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#define STM32_IRQ_EXTI19_PRIORITY 6
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#define STM32_IRQ_EXTI19_PRIORITY 6
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#define STM32_IRQ_EXTI20_21_PRIORITY 6
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#define STM32_IRQ_EXTI20_21_PRIORITY 6
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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@ -184,6 +184,9 @@
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#define STM32_IRQ_EXTI19_PRIORITY 6
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#define STM32_IRQ_EXTI19_PRIORITY 6
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#define STM32_IRQ_EXTI20_21_PRIORITY 6
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#define STM32_IRQ_EXTI20_21_PRIORITY 6
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_EXTI19_PRIORITY 6
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#define STM32_IRQ_EXTI19_PRIORITY 6
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#define STM32_IRQ_EXTI20_21_PRIORITY 6
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#define STM32_IRQ_EXTI20_21_PRIORITY 6
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#define STM32_IRQ_FDCAN1_PRIORITY 10
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#define STM32_IRQ_FDCAN2_PRIORITY 10
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_MDMA_PRIORITY 9
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_QUADSPI1_PRIORITY 10
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#define STM32_IRQ_EXTI19_PRIORITY ${doc.STM32_IRQ_EXTI19_PRIORITY!"6"}
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#define STM32_IRQ_EXTI19_PRIORITY ${doc.STM32_IRQ_EXTI19_PRIORITY!"6"}
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#define STM32_IRQ_EXTI20_21_PRIORITY ${doc.STM32_IRQ_EXTI20_21_PRIORITY!"6"}
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#define STM32_IRQ_EXTI20_21_PRIORITY ${doc.STM32_IRQ_EXTI20_21_PRIORITY!"6"}
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#define STM32_IRQ_FDCAN1_PRIORITY ${doc.STM32_IRQ_FDCAN1_PRIORITY!"10"}
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#define STM32_IRQ_FDCAN2_PRIORITY ${doc.STM32_IRQ_FDCAN2_PRIORITY!"10"}
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#define STM32_IRQ_MDMA_PRIORITY ${doc.STM32_IRQ_MDMA_PRIORITY!"9"}
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#define STM32_IRQ_MDMA_PRIORITY ${doc.STM32_IRQ_MDMA_PRIORITY!"9"}
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#define STM32_IRQ_QUADSPI1_PRIORITY ${doc.STM32_IRQ_QUADSPI1_PRIORITY!"10"}
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#define STM32_IRQ_QUADSPI1_PRIORITY ${doc.STM32_IRQ_QUADSPI1_PRIORITY!"10"}
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