andreika-git
/
ChibiOS
mirror of https://github.com/andreika-git/ChibiOS.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Typos and macro redefinition fixed. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14811 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2021-09-20 16:28:44 +00:00
parent 9ce0fb3636
commit 5db0577f85
2 changed files with 4 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
os/hal/ports/STM32/LLD/RCCv1/stm32_pll.inc
View File

@ -76,11 +76,11 @@
#endif
#if !defined(STM32_PLLVCO_MAX)
#error "STM32_PLLIN_MAX not defined in hal_lld.h"
#error "STM32_PLLVCO_MAX not defined in hal_lld.h"
#endif
#if !defined(STM32_PLLVCO_MIN)
#error "STM32_PLLIN_MAX not defined in hal_lld.h"
#error "STM32_PLLVCO_MIN not defined in hal_lld.h"
#endif
#if !defined(STM32_PLLP_MAX)
@ -222,7 +222,6 @@
#else /* !STM32_RCC_PLL_HAS_P */
#define STM32_PLLP 0U
#define STM32_PLLPEN 0U
#endif /* !STM32_RCC_PLL_HAS_P */
/*---------------------------------------------------------------------------*/
@ -263,7 +262,6 @@
#else /* !STM32_RCC_PLL_HAS_Q */
#define STM32_PLLQ 0U
#define STM32_PLLQEN 0U
#endif /* !STM32_RCC_PLL_HAS_Q */
/*---------------------------------------------------------------------------*/
@ -304,7 +302,6 @@
#else /* !STM32_RCC_PLL_HAS_R */
#define STM32_PLLR 0U
#define STM32_PLLREN 0U
#endif /* !STM32_RCC_PLL_HAS_R */
/*===========================================================================*/

7
os/hal/ports/STM32/LLD/RCCv1/stm32_pll_v2.inc
View File

@ -113,11 +113,11 @@
#endif
#if !defined(STM32_PLLVCO_MAX)
#error "STM32_PLLIN_MAX not defined in hal_lld.h"
#error "STM32_PLLVCO_MAX not defined in hal_lld.h"
#endif
#if !defined(STM32_PLLVCO_MIN)
#error "STM32_PLLIN_MAX not defined in hal_lld.h"
#error "STM32_PLLVCO_MIN not defined in hal_lld.h"
#endif
#if !defined(STM32_PLLP_MAX)
@ -234,7 +234,6 @@
#else /* !STM32_RCC_PLL_HAS_P */
#define STM32_PLLP 0
#define STM32_PLLPEN 0
#endif /* !STM32_RCC_PLL_HAS_P */
/*---------------------------------------------------------------------------*/
@ -272,7 +271,6 @@
#else /* !STM32_RCC_PLL_HAS_Q */
#define STM32_PLLQ 0
#define STM32_PLLQEN 0
#endif /* !STM32_RCC_PLL_HAS_Q */
/*---------------------------------------------------------------------------*/
@ -306,7 +304,6 @@
#else /* !STM32_RCC_PLL_HAS_R */
#define STM32_PLLR 0
#define STM32_PLLREN 0
#endif /* !STM32_RCC_PLL_HAS_R */
/*===========================================================================*/