diff --git a/os/hal/ports/STM32/LLD/GPDMAv1/stm32_gpdma.h b/os/hal/ports/STM32/LLD/GPDMAv1/stm32_gpdma.h
index c0f32a5c3..25d50ba86 100644
--- a/os/hal/ports/STM32/LLD/GPDMAv1/stm32_gpdma.h
+++ b/os/hal/ports/STM32/LLD/GPDMAv1/stm32_gpdma.h
@@ -70,7 +70,11 @@
 #define STM32_GPDMA_CCR_PRIO_POS        DMA_CCR_PRIO_Pos
 #define STM32_GPDMA_CCR_PRIO_MASK       (3U << STM32_GPDMA_CCR_PRIO_POS)
 #define STM32_GPDMA_CCR_PRIO(n)         ((n) << STM32_GPDMA_CCR_PRIO_POS)
-#define STM32_GPDMA_CCR_LAP             DMA_CCR_LAP
+#define STM32_GPDMA_CCR_LAP_POS         DMA_CCR_LAP_Pos
+#define STM32_GPDMA_CCR_LAP_MASK        (1U << STM32_GPDMA_CCR_LAP_POS)
+#define STM32_GPDMA_CCR_LAP(n)          ((n) << STM32_GPDMA_CCR_LAP_POS)
+#define STM32_GPDMA_CCR_LAP_MEM         STM32_GPDMA_CCR_LAP(STM32_GPDMA_MEMORY_PORT)
+#define STM32_GPDMA_CCR_LAP_PER         STM32_GPDMA_CCR_LAP(STM32_GPDMA_PERIPHERAL_PORT)
 #define STM32_GPDMA_CCR_LSM             DMA_CCR_LSM
 #define STM32_GPDMA_CCR_TOIE            DMA_CCR_TOIE
 #define STM32_GPDMA_CCR_SUSPIE          DMA_CCR_SUSPIE
diff --git a/os/hal/ports/STM32/LLD/SPIv4/hal_spi_v2_lld.c b/os/hal/ports/STM32/LLD/SPIv4/hal_spi_v2_lld.c
index f727a8ac8..c7ddceea3 100644
--- a/os/hal/ports/STM32/LLD/SPIv4/hal_spi_v2_lld.c
+++ b/os/hal/ports/STM32/LLD/SPIv4/hal_spi_v2_lld.c
@@ -674,10 +674,11 @@ msg_t spi_lld_start(SPIDriver *spip) {
 
   /* Configuration-specific GPDMA setup.*/
   dmaccr  = STM32_GPDMA_CCR_PRIO((uint32_t)spip->dprio) |
-            STM32_GPDMA_CCR_TOIE  |
-            STM32_GPDMA_CCR_USEIE |
-            STM32_GPDMA_CCR_ULEIE |
-            STM32_GPDMA_CCR_DTEIE |
+            STM32_GPDMA_CCR_LAP_MEM |
+            STM32_GPDMA_CCR_TOIE    |
+            STM32_GPDMA_CCR_USEIE   |
+            STM32_GPDMA_CCR_ULEIE   |
+            STM32_GPDMA_CCR_DTEIE   |
             STM32_GPDMA_CCR_TCIE;
 #if SPI_SUPPORTS_CIRCULAR
   dmalbar = (uint32_t)&__gpdma_base__;
@@ -894,7 +895,7 @@ msg_t spi_lld_exchange(SPIDriver *spip, size_t n,
                        const void *txbuf, void *rxbuf) {
   uint32_t llrrx, llrtx;
 
-  osalDbgAssert(n <= STM32_GPDMA_CCR_PRIO_POS, "unsupported GPDMA transfer size");
+  osalDbgAssert(n <= STM32_GPDMA_MAX_TRANSFER, "unsupported GPDMA transfer size");
 
 #if SPI_SUPPORTS_CIRCULAR
   if (spip->config->circular) {
@@ -962,15 +963,14 @@ msg_t spi_lld_exchange(SPIDriver *spip, size_t n,
  */
 msg_t spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
 
-  osalDbgAssert(n <= STM32_GPDMA_CCR_PRIO_POS, "unsupported GPDMA transfer size");
+  osalDbgAssert(n <= STM32_GPDMA_MAX_TRANSFER, "unsupported GPDMA transfer size");
 
   /* Setting up RX DMA channel.*/
   gpdmaChannelSetDestination(spip->dmarx, &spip->dbuf->rxsink);
   gpdmaChannelTransactionSize(spip->dmarx, n);
   gpdmaChannelSetMode(spip->dmarx,
                       (spip->config->dtr1rx |
-                       spip->dtr1rx |
-                       STM32_GPDMA_CTR1_DINC),
+                       spip->dtr1rx),
                       (spip->config->dtr2rx |
                        STM32_GPDMA_CTR2_REQSEL(spip->dreqrx)),
                       0U);
@@ -1010,7 +1010,7 @@ msg_t spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
  */
 msg_t spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
 
-  osalDbgAssert(n <= STM32_GPDMA_CCR_PRIO_POS, "unsupported GPDMA transfer size");
+  osalDbgAssert(n <= STM32_GPDMA_MAX_TRANSFER, "unsupported GPDMA transfer size");
 
   /* Setting up RX DMA channel.*/
   gpdmaChannelSetDestination(spip->dmarx, rxbuf);
@@ -1029,8 +1029,7 @@ msg_t spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
   gpdmaChannelTransactionSize(spip->dmatx, n);
   gpdmaChannelSetMode(spip->dmatx,
                       (spip->config->dtr1tx |
-                       spip->dtr1tx |
-                       STM32_GPDMA_CTR1_SINC),
+                       spip->dtr1tx),
                       (spip->config->dtr2tx |
                        STM32_GPDMA_CTR2_REQSEL(spip->dreqtx) |
                        STM32_GPDMA_CTR2_DREQ),
diff --git a/os/hal/ports/STM32/STM32H5xx/stm32_isr.h b/os/hal/ports/STM32/STM32H5xx/stm32_isr.h
index d7d879f57..67f4a0d1b 100644
--- a/os/hal/ports/STM32/STM32H5xx/stm32_isr.h
+++ b/os/hal/ports/STM32/STM32H5xx/stm32_isr.h
@@ -77,14 +77,14 @@
 /*
  * DMA unit.
  */
-#define STM32_GPDMA1_CH0_HANDLER            VectorAC
-#define STM32_GPDMA1_CH1_HANDLER            VectorB0
-#define STM32_GPDMA1_CH2_HANDLER            VectorB4
-#define STM32_GPDMA1_CH3_HANDLER            VectorB8
-#define STM32_GPDMA1_CH4_HANDLER            VectorBC
-#define STM32_GPDMA1_CH5_HANDLER            VectorC0
-#define STM32_GPDMA1_CH6_HANDLER            VectorC4
-#define STM32_GPDMA1_CH7_HANDLER            VectorC8
+#define STM32_GPDMA1_CH0_HANDLER            VectorA8
+#define STM32_GPDMA1_CH1_HANDLER            VectorAC
+#define STM32_GPDMA1_CH2_HANDLER            VectorB0
+#define STM32_GPDMA1_CH3_HANDLER            VectorB4
+#define STM32_GPDMA1_CH4_HANDLER            VectorB8
+#define STM32_GPDMA1_CH5_HANDLER            VectorBC
+#define STM32_GPDMA1_CH6_HANDLER            VectorC0
+#define STM32_GPDMA1_CH7_HANDLER            VectorC4
 #define STM32_GPDMA2_CH0_HANDLER            Vector1A8
 #define STM32_GPDMA2_CH1_HANDLER            Vector1AC
 #define STM32_GPDMA2_CH2_HANDLER            Vector1B0