git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6522 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2013-12-03 08:34:59 +00:00
parent 8a162d65ea
commit 5e84acec84
13 changed files with 13 additions and 13 deletions

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@ -70,7 +70,7 @@
#define STM32_ADC_SDADC1_DMA_PRIORITY 2
#define STM32_ADC_SDADC2_DMA_PRIORITY 2
#define STM32_ADC_SDADC3_DMA_PRIORITY 2
#define STM32_ADC_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
#define STM32_ADC_SDADC3_IRQ_PRIORITY 5

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@ -70,7 +70,7 @@
#define STM32_ADC_SDADC1_DMA_PRIORITY 2
#define STM32_ADC_SDADC2_DMA_PRIORITY 2
#define STM32_ADC_SDADC3_DMA_PRIORITY 2
#define STM32_ADC_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
#define STM32_ADC_SDADC3_IRQ_PRIORITY 5

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@ -321,7 +321,7 @@ void adc_lld_init(void) {
STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD |
STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE |
STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
nvicEnableVector(ADC1_IRQn, STM32_ADC_IRQ_PRIORITY);
nvicEnableVector(ADC1_IRQn, STM32_ADC_ADC1_IRQ_PRIORITY);
#endif
#if STM32_ADC_USE_SDADC1

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@ -70,7 +70,7 @@
#define STM32_ADC_SDADC1_DMA_PRIORITY 2
#define STM32_ADC_SDADC2_DMA_PRIORITY 2
#define STM32_ADC_SDADC3_DMA_PRIORITY 2
#define STM32_ADC_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
#define STM32_ADC_SDADC3_IRQ_PRIORITY 5

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@ -70,7 +70,7 @@
#define STM32_ADC_SDADC1_DMA_PRIORITY 2
#define STM32_ADC_SDADC2_DMA_PRIORITY 2
#define STM32_ADC_SDADC3_DMA_PRIORITY 2
#define STM32_ADC_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
#define STM32_ADC_SDADC3_IRQ_PRIORITY 5

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@ -70,7 +70,7 @@
#define STM32_ADC_SDADC1_DMA_PRIORITY 2
#define STM32_ADC_SDADC2_DMA_PRIORITY 2
#define STM32_ADC_SDADC3_DMA_PRIORITY 2
#define STM32_ADC_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
#define STM32_ADC_SDADC3_IRQ_PRIORITY 5

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@ -70,7 +70,7 @@
#define STM32_ADC_SDADC1_DMA_PRIORITY 2
#define STM32_ADC_SDADC2_DMA_PRIORITY 2
#define STM32_ADC_SDADC3_DMA_PRIORITY 2
#define STM32_ADC_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
#define STM32_ADC_SDADC3_IRQ_PRIORITY 5

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@ -70,7 +70,7 @@
#define STM32_ADC_SDADC1_DMA_PRIORITY 2
#define STM32_ADC_SDADC2_DMA_PRIORITY 2
#define STM32_ADC_SDADC3_DMA_PRIORITY 2
#define STM32_ADC_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
#define STM32_ADC_SDADC3_IRQ_PRIORITY 5

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@ -70,7 +70,7 @@
#define STM32_ADC_SDADC1_DMA_PRIORITY 2
#define STM32_ADC_SDADC2_DMA_PRIORITY 2
#define STM32_ADC_SDADC3_DMA_PRIORITY 2
#define STM32_ADC_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
#define STM32_ADC_SDADC3_IRQ_PRIORITY 5

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@ -70,7 +70,7 @@
#define STM32_ADC_SDADC1_DMA_PRIORITY 2
#define STM32_ADC_SDADC2_DMA_PRIORITY 2
#define STM32_ADC_SDADC3_DMA_PRIORITY 2
#define STM32_ADC_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
#define STM32_ADC_SDADC3_IRQ_PRIORITY 5

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@ -70,7 +70,7 @@
#define STM32_ADC_SDADC1_DMA_PRIORITY 2
#define STM32_ADC_SDADC2_DMA_PRIORITY 2
#define STM32_ADC_SDADC3_DMA_PRIORITY 2
#define STM32_ADC_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
#define STM32_ADC_SDADC3_IRQ_PRIORITY 5

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@ -70,7 +70,7 @@
#define STM32_ADC_SDADC1_DMA_PRIORITY 2
#define STM32_ADC_SDADC2_DMA_PRIORITY 2
#define STM32_ADC_SDADC3_DMA_PRIORITY 2
#define STM32_ADC_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
#define STM32_ADC_SDADC3_IRQ_PRIORITY 5

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@ -70,7 +70,7 @@
#define STM32_ADC_SDADC1_DMA_PRIORITY 2
#define STM32_ADC_SDADC2_DMA_PRIORITY 2
#define STM32_ADC_SDADC3_DMA_PRIORITY 2
#define STM32_ADC_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
#define STM32_ADC_SDADC3_IRQ_PRIORITY 5