andreika-git
/
ChibiOS
mirror of https://github.com/andreika-git/ChibiOS.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

More work on TZ support. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13526 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2020-04-12 12:37:12 +00:00
parent d99cc1acc9
commit 5f4acc7089
9 changed files with 335 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
demos/STM32/RT-STM32L552ZE-NUCLEO144-TEST/Makefile
View File

@ -5,7 +5,7 @@
# Compiler options here.
ifeq ($(USE_OPT),)
USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16
USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 -mcmse
endif
# C specific options here (added to USE_OPT).
@ -114,7 +114,7 @@ include $(CHIBIOS)/test/rt/rt_test.mk
include $(CHIBIOS)/test/oslib/oslib_test.mk
# Define linker script file here.
LDSCRIPT= $(STARTUPLD)/STM32L552xE_TZ.ld
LDSCRIPT= ./secure.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
@ -151,6 +151,8 @@ CPPWARN = -Wall -Wextra -Wundef
# List all user C define here, like -D_DEBUG=1
UDEFS =
UDEFS += -D__ARM_FEATURE_CMSE=3 # It is already intrinsic because -mcmse, added
# again to make it discoverable by Eclipse.
# Define ASM defines here
UADEFS =

2
demos/STM32/RT-STM32L552ZE-NUCLEO144-TEST/debug/RT-STM32L552ZE-NUCLEO144-TEST (ST-Link GDB Server, Flash and Run).launch
View File

File diff suppressed because one or more lines are too long

96
demos/STM32/RT-STM32L552ZE-NUCLEO144-TEST/secure.ld Normal file
View File

@ -0,0 +1,96 @@
/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* STM32L552xE memory setup (custom).
*/
MEMORY
{
flash0 (rx) : org = 0x0C000000, len = 120k - 256 /* Flash S */
flash1 (rx) : org = 0x0C01FF00, len = 256 /* Flash NSC */
flash2 (rx) : org = 0x08020000, len = 384k /* Flash NS */
flash3 (rx) : org = 0x00000000, len = 0
flash4 (rx) : org = 0x00000000, len = 0
flash5 (rx) : org = 0x00000000, len = 0
flash6 (rx) : org = 0x00000000, len = 0
flash7 (rx) : org = 0x00000000, len = 0
ram0 (wx) : org = 0x30000000, len = 32k /* SRAM1 S */
ram1 (wx) : org = 0x20008000, len = 160k /* SRAM1+SRAM2 NS */
ram2 (wx) : org = 0x00000000, len = 0
ram3 (wx) : org = 0x00000000, len = 0
ram4 (wx) : org = 0x00000000, len = 0
ram5 (wx) : org = 0x00000000, len = 0
ram6 (wx) : org = 0x00000000, len = 0
ram7 (wx) : org = 0x00000000, len = 0
}
SECTIONS
{
/* Special section for NSC flash.*/
.nsc_flash : ALIGN(4)
{
__nsc_flash_base__ = .;
KEEP(*(.nsc_flash))
__nsc_flash_end__ = .;
} > flash1
}
/* For each data/text section two region are defined, a virtual region
and a load region (_LMA suffix).*/
/* Flash region to be used for exception vectors.*/
REGION_ALIAS("VECTORS_FLASH", flash0);
REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
/* Flash region to be used for constructors and destructors.*/
REGION_ALIAS("XTORS_FLASH", flash0);
REGION_ALIAS("XTORS_FLASH_LMA", flash0);
/* Flash region to be used for code text.*/
REGION_ALIAS("TEXT_FLASH", flash0);
REGION_ALIAS("TEXT_FLASH_LMA", flash0);
/* Flash region to be used for read only data.*/
REGION_ALIAS("RODATA_FLASH", flash0);
REGION_ALIAS("RODATA_FLASH_LMA", flash0);
/* Flash region to be used for various.*/
REGION_ALIAS("VARIOUS_FLASH", flash0);
REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
/* Flash region to be used for RAM(n) initialization data.*/
REGION_ALIAS("RAM_INIT_FLASH_LMA", flash1);
/* RAM region to be used for Main stack. This stack accommodates the processing
of all exceptions and interrupts.*/
REGION_ALIAS("MAIN_STACK_RAM", ram0);
/* RAM region to be used for the process stack. This is the stack used by
the main() function.*/
REGION_ALIAS("PROCESS_STACK_RAM", ram0);
/* RAM region to be used for data segment.*/
REGION_ALIAS("DATA_RAM", ram0);
REGION_ALIAS("DATA_RAM_LMA", flash0);
/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);
/* RAM region to be used for the default heap.*/
REGION_ALIAS("HEAP_RAM", ram0);
/* Generic rules inclusion.*/
INCLUDE rules.ld

53
demos/STM32/RT-STM32L552ZE-NUCLEO144-TEST/source/nsc_flash.S Normal file
View File

@ -0,0 +1,53 @@
/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file nsc_flash.S
* @brief Non-secure callable area configuration.
*
* @defgroup NSC_FLASH_CONFIGURATION
* @{
*/
/*===========================================================================*/
/* Module constants. */
/*===========================================================================*/
/*===========================================================================*/
/* Module pre-compile time settings. */
/*===========================================================================*/
/*===========================================================================*/
/* Code section. */
/*===========================================================================*/
#if !defined(__DOXYGEN__)
.syntax unified
.cpu cortex-m33
.thumb
.section .nsc_flash, "ax"
.align 4
.globl __nsc_entries
__nsc_entries:
sg
.here:
b .here
#endif /* !defined(__DOXYGEN__) */
/** @} */

3
os/hal/ports/STM32/STM32L5xx/hal_lld.c
View File

@ -102,6 +102,9 @@ void hal_lld_init(void) {
/* IRQ subsystem initialization.*/
irqInit();
/* Security initialization.*/
secure_init();
}
/**

1
os/hal/ports/STM32/STM32L5xx/hal_lld.h
View File

@ -1774,6 +1774,7 @@
/* Various helpers.*/
#include "nvic.h"
#include "sau.h"
#include "cache.h"
//#include "mpu_v7m.h"
#include "stm32_isr.h"

1
os/hal/ports/STM32/STM32L5xx/platform.mk
View File

@ -1,5 +1,6 @@
# Required platform files.
PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
$(CHIBIOS)/os/hal/ports/common/ARMCMx/sau.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32L5xx/stm32_isr.c \
$(CHIBIOS)/os/hal/ports/STM32/STM32L5xx/hal_lld.c

102
os/hal/ports/common/ARMCMx/sau.c Normal file
View File

@ -0,0 +1,102 @@
/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file common/ARMCMx/sau.c
* @brief Cortex-Mx SAU support code.
*
* @addtogroup COMMON_ARMCMx_SAU
* @{
*/
#include "hal.h"
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Enables SAU.
*/
void sauEnable(void) {
SAU->CTRL = 1U;
}
/**
* @brief Disables SAU.
*/
void sauDisable(void) {
SAU->CTRL = 0U;
}
/**
* @brief Enables a SAU region.
*
* @param[in] region the region number
* @param[in] start the region start address
* @param[in] end the region end address
* @param[in] flags regions mode, note, this is tricky, read carefully
* the ARM documentation
*/
void sauEnableRegion(uint32_t region, uint32_t start,
uint32_t end, uint32_t flags) {
osalDbgCheck(region < SAU->TYPE);
osalDbgCheck((start & 0x1FU) == 0U);
osalDbgCheck((end & 0x1FU) == 0x1FU);
SAU->RNR = region;
SAU->RBAR = start;
SAU->RLAR = (end & 0xFFFFFFE0U) | (flags & SAU_REGION_NSC) | 1U;
}
/**
* @brief Disables a SAU region.
*
* @param[in] region the region number
*/
void sauDisableRegion(uint32_t region) {
osalDbgCheck(region < SAU->TYPE);
SAU->RNR = region;
SAU->RLAR = 0U;
SAU->RBAR = 0U;
}
/** @} */

74
os/hal/ports/common/ARMCMx/sau.h Normal file
View File

@ -0,0 +1,74 @@
/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file common/ARMCMx/sau.h
* @brief Cortex-Mx SAU support macros and structures.
*
* @addtogroup COMMON_ARMCMx_SAU
* @{
*/
#ifndef SAU_H
#define SAU_H
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/**
* @name System vectors numbers
* @{
*/
#define SAU_REGION_NOT_NSC (0U << 1U)
#define SAU_REGION_NSC (1U << 1U)
/** @} */
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#ifdef __cplusplus
extern "C" {
#endif
void sauEnable(void);
void sauDisable(void);
void sauEnableRegion(uint32_t region, uint32_t start,
uint32_t end, uint32_t flags);
void sauDisableRegion(uint32_t region);
#ifdef __cplusplus
}
#endif
#endif /* SAU_H */
/** @} */