From 5f7e63cdf1e02776685449ac83ededb4e1adfafd Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Fri, 27 May 2022 08:18:47 +0000 Subject: [PATCH] Added virtual vectors table to SB port. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@15638 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- .../Makefile | 2 +- .../SB-CLIENT-32k-08070000-4k-2001E000/main.c | 7 +- .../ports/ARMvx-M-SB/compilers/GCC/mk/port.mk | 14 ++ .../ports/ARMvx-M-SB/compilers/GCC/vectors.S | 149 ++++++++++++++++++ 4 files changed, 165 insertions(+), 7 deletions(-) create mode 100644 os/common/ports/ARMvx-M-SB/compilers/GCC/mk/port.mk create mode 100644 os/common/ports/ARMvx-M-SB/compilers/GCC/vectors.S diff --git a/demos/various/SB-CLIENT-32k-08070000-4k-2001E000/Makefile b/demos/various/SB-CLIENT-32k-08070000-4k-2001E000/Makefile index 93d484378..f483eb702 100644 --- a/demos/various/SB-CLIENT-32k-08070000-4k-2001E000/Makefile +++ b/demos/various/SB-CLIENT-32k-08070000-4k-2001E000/Makefile @@ -107,7 +107,7 @@ include $(CHIBIOS)/os/common/utils/utils.mk #include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk # RTOS files (optional). #include $(CHIBIOS)/os/rt/rt.mk -#include $(CHIBIOS)/os/common/ports/ARMv7-M/compilers/GCC/mk/port.mk +include $(CHIBIOS)/os/common/ports/ARMvx-M-SB/compilers/GCC/mk/port.mk include $(CHIBIOS)/os/sb/user/sbuser.mk # Auto-build files in ./source recursively. include $(CHIBIOS)/tools/mk/autobuild.mk diff --git a/demos/various/SB-CLIENT-32k-08070000-4k-2001E000/main.c b/demos/various/SB-CLIENT-32k-08070000-4k-2001E000/main.c index 1b2bce4bb..a4fb00287 100644 --- a/demos/various/SB-CLIENT-32k-08070000-4k-2001E000/main.c +++ b/demos/various/SB-CLIENT-32k-08070000-4k-2001E000/main.c @@ -18,14 +18,9 @@ #include "sbuser.h" -__attribute__((naked)) -void __crt0_vrq(int vrqn) { - - (void)vrqn; +void Vector00(void) { printf("#1 Hello World (%u)!!\r\n", (unsigned)0); - - __sb_vrq_return(); } /* diff --git a/os/common/ports/ARMvx-M-SB/compilers/GCC/mk/port.mk b/os/common/ports/ARMvx-M-SB/compilers/GCC/mk/port.mk new file mode 100644 index 000000000..9e557b552 --- /dev/null +++ b/os/common/ports/ARMvx-M-SB/compilers/GCC/mk/port.mk @@ -0,0 +1,14 @@ +# List of the ChibiOS ARMv7/8-M for sandboxes generic port files. +PORTSRC = #$(CHIBIOS)/os/common/ports/ARMvx-M-SB/chcore.c + +PORTASM = $(CHIBIOS)/os/common/ports/ARMvx-M-SB/compilers/GCC/vectors.S \ + #$(CHIBIOS)/os/common/ports/ARMvx-M-SB/compilers/GCC/chcoreasm.S + +PORTINC = $(CHIBIOS)/os/common/portability/GCC \ + $(CHIBIOS)/os/common/ports/ARM-common \ + $(CHIBIOS)/os/common/ports/ARMvx-M-SB + +# Shared variables +ALLXASMSRC += $(PORTASM) +ALLCSRC += $(PORTSRC) +ALLINC += $(PORTINC) diff --git a/os/common/ports/ARMvx-M-SB/compilers/GCC/vectors.S b/os/common/ports/ARMvx-M-SB/compilers/GCC/vectors.S new file mode 100644 index 000000000..dac296a42 --- /dev/null +++ b/os/common/ports/ARMvx-M-SB/compilers/GCC/vectors.S @@ -0,0 +1,149 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file ARMvx-M-SB/compilers/GCC/vectors.S + * @brief Interrupt vectors for Cortex-Mx devices. + * + * @defgroup ARMCMx_GCC_VECTORS Cortex-Mx Interrupt Vectors + * @{ + */ + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Code section. */ +/*===========================================================================*/ + +#if !defined(__DOXYGEN__) + + .syntax unified + .cpu cortex-m3 + .thumb + + .text + + .align 2 + .globl __crt0_vrq +__crt0_vrq: + ldr.w r1, =__vectors + ldr.w r1, [r1, r0, lsl #2] + blx r1 + svc #255 + + .align 2 + .globl _vectors +__vectors: + .long Vector00, Vector04, Vector08, Vector0C + .long Vector10, Vector14, Vector18, Vector1C + .long Vector20, Vector24, Vector28, Vector2C + .long Vector30, Vector34, Vector38, Vector3C + .long Vector40, Vector44, Vector48, Vector4C + .long Vector50, Vector54, Vector58, Vector5C + .long Vector60, Vector64, Vector68, Vector6C + .long Vector70, Vector74, Vector78, Vector7C + + .align 2 + .weak Vector00, Vector04, Vector08, Vector0C + .weak Vector10, Vector14, Vector18, Vector1C + .weak Vector20, Vector24, Vector28, Vector2C + .weak Vector30, Vector34, Vector38, Vector3C + .weak Vector40, Vector44, Vector48, Vector4C + .weak Vector50, Vector54, Vector58, Vector5C + .weak Vector60, Vector64, Vector68, Vector6C + .weak Vector70, Vector74, Vector78, Vector7C + + .thumb_func +Vector00: + .thumb_func +Vector04: + .thumb_func +Vector08: + .thumb_func +Vector0C: + .thumb_func +Vector10: + .thumb_func +Vector14: + .thumb_func +Vector18: + .thumb_func +Vector1C: + .thumb_func +Vector20: + .thumb_func +Vector24: + .thumb_func +Vector28: + .thumb_func +Vector2C: + .thumb_func +Vector30: + .thumb_func +Vector34: + .thumb_func +Vector38: + .thumb_func +Vector3C: + .thumb_func +Vector40: + .thumb_func +Vector44: + .thumb_func +Vector48: + .thumb_func +Vector4C: + .thumb_func +Vector50: + .thumb_func +Vector54: + .thumb_func +Vector58: + .thumb_func +Vector5C: + .thumb_func +Vector60: + .thumb_func +Vector64: + .thumb_func +Vector68: + .thumb_func +Vector6C: + .thumb_func +Vector70: + .thumb_func +Vector74: + .thumb_func +Vector78: + .thumb_func +Vector7C: + bl __unhandled_vrq + + .thumb_func + .weak __unhandled_vrq +__unhandled_vrq: + svc #255 +.stay: b .stay + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */