git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1813 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -104,7 +104,7 @@ void _port_switch_from_irq(void) {
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"pop {pc}");
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}
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#if CORTEX_MODEL == CORTEX_M0
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#if defined(CH_ARCHITECTURE_ARM_v6M)
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#define PUSH_CONTEXT(sp) { \
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asm volatile ("push {r4, r5, r6, r7, lr} \n\t" \
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"mov r4, r8 \n\t" \
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@ -122,8 +122,17 @@ void _port_switch_from_irq(void) {
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"mov r11, r7 \n\t" \
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"pop {r4, r5, r6, r7, pc}" : : "r" (sp)); \
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}
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#else /* CORTEX_MODEL != CORTEX_M0 */
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#endif /* CORTEX_MODEL != CORTEX_M0 */
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#elif defined(CH_ARCHITECTURE_ARM_v7M)
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#define PUSH_CONTEXT(sp) { \
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asm volatile ("push {r4, r5, r6, r7, r8, r9, r10, r11, lr} \n\t"); \
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}
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#define POP_CONTEXT(sp) { \
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asm volatile ("pop {r4, r5, r6, r7, r8, r9, r10, r11, pc} \n\t" \
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: : "r" (sp)); \
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}
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#else
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#endif
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/**
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* @brief Performs a context switch between two threads.
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@ -129,32 +129,36 @@
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/* Port exported info. */
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/*===========================================================================*/
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#if defined(__DOXYGEN__)
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/**
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* @brief Macro defining the ARM architecture.
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*/
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#define CH_ARCHITECTURE_ARM_vxm
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/**
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* @brief Name of the implemented architecture.
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*/
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#define CH_ARCHITECTURE_NAME "ARM"
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#if defined(__DOXYGEN__)
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/**
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* @brief Macro defining the ARM Cortex-M3 architecture.
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*/
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#define CH_ARCHITECTURE_ARMCMx
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#define CH_ARCHITECTURE_NAME "ARMvx-M"
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/**
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* @brief Name of the architecture variant (optional).
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*/
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#define CH_CORE_VARIANT_NAME "Cortex-Mx"
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#elif CORTEX_MODEL == CORTEX_M4
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#define CH_ARCHITECTURE_ARMCM4
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#define CH_ARCHITECTURE_ARM_v7M
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#define CH_ARCHITECTURE_NAME "ARMv7-M"
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#define CH_CORE_VARIANT_NAME "Cortex-M4"
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#elif CORTEX_MODEL == CORTEX_M3
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#define CH_ARCHITECTURE_ARMCM3
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#define CH_ARCHITECTURE_ARM_v7M
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#define CH_ARCHITECTURE_NAME "ARMv7-M"
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#define CH_CORE_VARIANT_NAME "Cortex-M3"
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#elif CORTEX_MODEL == CORTEX_M1
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#define CH_ARCHITECTURE_ARMCM1
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#define CH_ARCHITECTURE_ARM_v6M
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#define CH_ARCHITECTURE_NAME "ARMv6-M"
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#define CH_CORE_VARIANT_NAME "Cortex-M1"
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#elif CORTEX_MODEL == CORTEX_M0
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#define CH_ARCHITECTURE_ARMCM0
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#define CH_ARCHITECTURE_ARM_v6M
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#define CH_ARCHITECTURE_NAME "ARMv6-M"
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#define CH_CORE_VARIANT_NAME "Cortex-M0"
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#endif
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@ -210,6 +214,7 @@ struct extctx {
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* @details This structure represents the inner stack frame during a context
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* switching.
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*/
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#if defined(CH_ARCHITECTURE_ARM_v6M)
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struct intctx {
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regarm_t r8;
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regarm_t r9;
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@ -221,6 +226,19 @@ struct intctx {
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regarm_t r7;
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regarm_t lr;
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};
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#elif defined(CH_ARCHITECTURE_ARM_v7M)
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struct intctx {
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regarm_t r4;
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regarm_t r5;
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regarm_t r6;
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regarm_t r7;
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regarm_t r8;
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regarm_t r9;
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regarm_t r10;
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regarm_t r11;
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regarm_t lr;
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};
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#endif
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#endif
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#if !defined(__DOXYGEN__)
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